1 /*- 2 * Copyright (c) 2001, 2002, 2005 Genetec corp. 3 * All rights reserved. 4 * 5 * Written by Hiroyuki Bessho for Genetec corp. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of The NetBSD Foundation nor the names of its 16 * contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _EVBARM_G42XXEB_VAR_H 33 #define _EVBARM_G42XXEB_VAR_H 34 35 #include <sys/conf.h> 36 #include <sys/device.h> 37 38 #include <sys/bus.h> 39 #include <evbarm/g42xxeb/g42xxeb_reg.h> 40 41 42 /* 43 * G42xxeb on-board IO bus 44 */ 45 struct obio_softc { 46 device_t sc_dev; 47 bus_space_tag_t sc_iot; 48 bus_space_handle_t sc_obioreg_ioh; 49 50 /* handle to PXA2x0's memory controller. 51 XXX: shouldn't be here. */ 52 bus_space_handle_t sc_memctl_ioh; 53 54 void *sc_ih; /* interrupt handler for obio on pxaip */ 55 void *sc_si; /* software interrupt handler */ 56 int sc_intr; 57 uint16_t sc_intr_mask; 58 uint16_t sc_intr_pending; 59 int sc_ipl; /* Max ipl among sub interrupts */ 60 struct obio_handler { 61 int (* func)(void *); 62 void *arg; 63 int level; 64 } sc_handler[G42XXEB_N_INTS]; 65 }; 66 67 typedef void *obio_chipset_tag_t; 68 69 struct obio_attach_args { 70 obio_chipset_tag_t oba_sc; 71 bus_space_tag_t oba_iot; /* Bus tag */ 72 bus_addr_t oba_addr; /* i/o address */ 73 int oba_intr; 74 }; 75 76 /* on-board hex LED */ 77 void hex_led( uint32_t value ); 78 79 /* 80 * IRQ handler 81 */ 82 void *obio_intr_establish(struct obio_softc *, int, int, int, 83 int (*)(void *), void *); 84 void obio_intr_disestablish(struct obio_softc *, int, int (*)(void *)); 85 void obio_intr_mask(struct obio_softc *, struct obio_handler *); 86 void obio_intr_unmask(struct obio_softc *, struct obio_handler *); 87 88 #define obio_update_intrmask(sc) \ 89 bus_space_write_2( (sc)->sc_iot, (sc)->sc_obioreg_ioh, \ 90 G42XXEB_INTMASK, (sc)->sc_intr_mask | (sc)->sc_intr_pending ); 91 92 void obio_peripheral_reset(struct obio_softc *, int, int); 93 94 #endif /* _EVBARM_G42XXEB_VAR_H */ 95