1 /* $NetBSD: flash_ebus.c,v 1.7 2013/10/13 06:55:34 riz Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code was written by Alessandro Forin and Neil Pittman 8 * at Microsoft Research and contributed to The NetBSD Foundation 9 * by Microsoft Corporation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 __KERNEL_RCSID(0, "$NetBSD: flash_ebus.c,v 1.7 2013/10/13 06:55:34 riz Exp $"); 35 36 /* Driver for the Intel 28F320/640/128 (J3A150) StrataFlash memory device 37 * Extended to include the Intel JS28F256P30T95. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/proc.h> 44 #include <sys/errno.h> 45 #include <sys/ioctl.h> 46 #include <sys/device.h> 47 #include <sys/conf.h> 48 #include <sys/file.h> 49 #include <sys/stat.h> 50 #include <sys/ioctl.h> 51 #include <sys/buf.h> 52 #include <sys/bufq.h> 53 #include <sys/uio.h> 54 #include <sys/malloc.h> 55 #include <uvm/uvm_extern.h> 56 #include <sys/disklabel.h> 57 #include <sys/disk.h> 58 #include <sys/syslog.h> 59 #include <sys/vnode.h> 60 #include <sys/kthread.h> 61 #include <sys/lock.h> 62 #include <sys/queue.h> 63 64 #include <sys/rnd.h> 65 66 #include "locators.h" 67 #include <prop/proplib.h> 68 69 #include <emips/ebus/ebusvar.h> 70 #include <emips/emips/machdep.h> 71 #include <machine/emipsreg.h> 72 73 /* Internal config switches 74 */ 75 #define USE_BUFFERED_WRITES 0 /* Faster, but might not work in some (older) cases */ 76 #define Verbose 0 77 78 /* Debug tools 79 */ 80 #define DEBUG_INTR 0x01 81 #define DEBUG_XFERS 0x02 82 #define DEBUG_STATUS 0x04 83 #define DEBUG_FUNCS 0x08 84 #define DEBUG_PROBE 0x10 85 #define DEBUG_WRITES 0x20 86 #define DEBUG_READS 0x40 87 #define DEBUG_ERRORS 0x80 88 #ifdef DEBUG 89 int eflash_debug = DEBUG_ERRORS; 90 #define EFLASH_DEBUG(x) (eflash_debug & (x)) 91 #define DBGME(_lev_,_x_) if ((_lev_) & eflash_debug) _x_ 92 #else 93 #define EFLASH_DEBUG(x) (0) 94 #define DBGME(_lev_,_x_) 95 #endif 96 #define DEBUG_PRINT(_args_,_lev_) DBGME(_lev_,printf _args_) 97 98 /* Product ID codes 99 */ 100 #define MANUF_INTEL 0x89 101 #define DEVICE_320 0x16 102 #define DEVICE_640 0x17 103 #define DEVICE_128 0x18 104 #define DEVICE_256 0x19 105 106 /* Table of chips we understand. 107 */ 108 #define nDELTAS 3 109 struct flash_type { 110 struct { 111 uint32_t nSectors; 112 uint32_t nKB; 113 } ft_deltas[nDELTAS]; 114 uint8_t ft_manuf_code; 115 uint8_t ft_device_code; 116 uint16_t ft_total_sectors; 117 const char *ft_name; 118 }; 119 120 static const struct flash_type sector_maps[] = { 121 { 122 {{32,128},{0,0},}, 123 MANUF_INTEL, DEVICE_320, 32, /* a J3 part */ 124 "StrataFlash 28F320" 125 }, 126 { 127 {{64,128},{0,0},}, 128 MANUF_INTEL, DEVICE_640, 64, /* a J3 part */ 129 "StrataFlash 28F640" 130 }, 131 { 132 {{128,128},{0,0},}, 133 MANUF_INTEL, DEVICE_128, 128, /* a J3 part */ 134 "StrataFlash 28F128" 135 }, 136 { 137 {{255,128},{4,32},{0,0}}, 138 MANUF_INTEL, DEVICE_256, 259, /* a P30 part */ 139 "StrataFlash 28F256" 140 } 141 }; 142 #define nMAPS ((sizeof sector_maps) / (sizeof sector_maps[0])) 143 144 /* Instead of dragging in atavar.h.. */ 145 struct eflash_bio { 146 volatile int flags;/* cmd flags */ 147 #define ATA_POLL 0x0002 /* poll for completion */ 148 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 149 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 150 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 151 daddr_t blkno; /* block addr */ 152 daddr_t blkdone;/* number of blks transferred */ 153 size_t nblks; /* number of blocks currently transferring */ 154 size_t nbytes; /* number of bytes currently transferring */ 155 char *databuf;/* data buffer address */ 156 volatile int error; 157 u_int32_t r_error;/* copy of status register */ 158 #ifdef HAS_BAD144_HANDLING 159 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 160 #endif 161 }; 162 /* End of atavar.h*/ 163 164 /* chip-specific functions 165 */ 166 struct flash_ops; 167 168 /* 169 * Device softc 170 */ 171 struct eflash_softc { 172 device_t sc_dev; 173 174 /* General disk infos */ 175 struct disk sc_dk; 176 struct bufq_state *sc_q; 177 struct callout sc_restart_ch; 178 179 /* IDE disk soft states */ 180 struct buf *sc_bp; /* buf being transfered */ 181 struct buf *active_xfer; /* buf handoff to thread */ 182 struct eflash_bio sc_bio; /* current transfer */ 183 184 struct proc *ch_thread; 185 int ch_flags; 186 #define ATACH_SHUTDOWN 0x02 /* thread is shutting down */ 187 #define ATACH_IRQ_WAIT 0x10 /* thread is waiting for irq */ 188 #define ATACH_DISABLED 0x80 /* channel is disabled */ 189 #define ATACH_TH_RUN 0x100 /* the kernel thread is working */ 190 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */ 191 192 int openings; 193 int sc_flags; 194 #define EFLASHF_WLABEL 0x004 /* label is writable */ 195 #define EFLASHF_LABELLING 0x008 /* writing label */ 196 #define EFLASHF_LOADED 0x010 /* parameters loaded */ 197 #define EFLASHF_WAIT 0x020 /* waiting for resources */ 198 #define EFLASHF_KLABEL 0x080 /* retain label after 'full' close */ 199 200 int retries; /* number of xfer retry */ 201 202 krndsource_t rnd_source; 203 204 /* flash-specific state */ 205 struct _Flash *sc_dp; 206 uint32_t sc_size; 207 uint32_t sc_capacity; 208 paddr_t sc_base; 209 volatile uint8_t *sc_page0; 210 211 /* current read-write sector mapping */ 212 /*volatile*/ uint8_t *sc_sector; 213 uint32_t sc_sector_size; 214 uint32_t sc_sector_offset; 215 #define NOSECTOR ((uint32_t)(~0)) 216 int sc_erased; 217 218 /* device-specificity */ 219 uint32_t sc_buffersize; 220 vsize_t sc_max_secsize; 221 unsigned int sc_chips; 222 const struct flash_ops *sc_ops; 223 struct flash_type sc_type; 224 }; 225 226 static int eflash_ebus_match (device_t, cfdata_t, void *); 227 static void eflash_ebus_attach (device_t, device_t, void *); 228 229 CFATTACH_DECL_NEW(flash_ebus, sizeof (struct eflash_softc), 230 eflash_ebus_match, eflash_ebus_attach, NULL, NULL); 231 232 /* implementation decls */ 233 static int flash_identify(struct eflash_softc*); 234 static int KBinSector(struct flash_type * SecMap, unsigned int SecNo); 235 static uint32_t SectorStart(struct flash_type * SecMap, int SecNo); 236 static unsigned int SectorNumber(struct flash_type * SecMap, uint32_t Offset); 237 static void eflash_thread(void *arg); 238 static int eflash_read_at (struct eflash_softc *sc, daddr_t start_sector, char *buffer, 239 size_t nblocks, size_t * pSizeRead); 240 static int eflash_write_at(struct eflash_softc *sc, daddr_t start_sector, char *buffer, 241 size_t nblocks, size_t * pSizeWritten); 242 243 /* Config functions 244 */ 245 static int 246 eflash_ebus_match(device_t parent, cfdata_t match, void *aux) 247 { 248 struct ebus_attach_args *ia = aux; 249 struct _Flash *f = (struct _Flash *)ia->ia_vaddr; 250 251 if (strcmp("flash", ia->ia_name) != 0) 252 return (0); 253 if ((f == NULL) || 254 ((f->BaseAddressAndTag & FLASHBT_TAG) != PMTTAG_FLASH)) 255 return (0); 256 257 return (1); 258 } 259 260 static void 261 eflash_ebus_attach(device_t parent, device_t self, void *aux) 262 { 263 struct ebus_attach_args *ia =aux; 264 struct eflash_softc *sc = device_private(self); 265 uint32_t base, ctrl; 266 int error; 267 268 /* Plan. 269 * - mips_map_physmem() (with uncached) first page 270 * - keep it around since we need status ops 271 * - find what type it is. 272 * - then mips_map_physmem() each sector as needed. 273 */ 274 275 sc->sc_dev = self; 276 sc->sc_dp = (struct _Flash*)ia->ia_vaddr; 277 base = sc->sc_dp->BaseAddressAndTag & FLASHBT_BASE; 278 ctrl = sc->sc_dp->Control; 279 280 sc->sc_size = ctrl & FLASHST_SIZE; 281 sc->sc_capacity = sc->sc_size / DEV_BSIZE; 282 sc->sc_base = base; 283 /* The chip is 16bit, so if we get 32bit there are two */ 284 sc->sc_chips = (ctrl & FLASHST_BUS_32) ? 2 : 1; 285 286 /* Map the first page to see what chip we got */ 287 sc->sc_page0 = (volatile uint8_t *) mips_map_physmem(base, PAGE_SIZE); 288 289 if (flash_identify(sc)) { 290 printf(" base %x: %dMB flash memory (%d x %s)\n", base, sc->sc_size >> 20, 291 sc->sc_chips, sc->sc_type.ft_name); 292 } else { 293 /* BUGBUG If we dont identify it stop the driver! */ 294 printf(": unknown manufacturer id %x, device id %x\n", 295 sc->sc_type.ft_manuf_code, sc->sc_type.ft_device_code); 296 } 297 298 config_pending_incr(self); 299 300 error = kthread_create(PRI_NONE, 0, NULL, 301 eflash_thread, sc, NULL, "%s", device_xname(sc->sc_dev)); 302 if (error) 303 aprint_error_dev(sc->sc_dev, 304 "unable to create kernel thread: error %d\n", error); 305 } 306 307 /* Implementation functions 308 */ 309 /* Returns the size in KBytes of a given sector, 310 * or -1 for bad arguments. 311 */ 312 static int KBinSector(struct flash_type * SecMap, unsigned int SecNo) 313 { 314 int i; 315 316 for (i = 0; i < nDELTAS; i++) { 317 if (SecNo < SecMap->ft_deltas[i].nSectors) 318 return SecMap->ft_deltas[i].nKB; 319 SecNo -= SecMap->ft_deltas[i].nSectors; 320 } 321 322 return -1; 323 } 324 325 #define SectorSize(_map_,_sector_) (1024 * KBinSector(_map_,_sector_)) 326 327 /* Whats the starting offset of sector N 328 */ 329 static uint32_t SectorStart(struct flash_type * SecMap, int SecNo) 330 { 331 int i; 332 uint32_t Offset = 0; 333 334 for (i = 0; i < nDELTAS; i++) { 335 if ((unsigned int)SecNo < SecMap->ft_deltas[i].nSectors) 336 return 1024 * (Offset + (SecMap->ft_deltas[i].nKB * SecNo)); 337 SecNo -= SecMap->ft_deltas[i].nSectors; 338 Offset += SecMap->ft_deltas[i].nSectors * SecMap->ft_deltas[i].nKB; 339 } 340 341 return ~0; 342 } 343 344 /* What sector number corresponds to a given offset 345 */ 346 static unsigned int SectorNumber(struct flash_type * SecMap, uint32_t Offset) 347 { 348 unsigned int i; 349 unsigned int SecNo = 0; 350 351 Offset /= 1024; 352 for (i = 0; i < nDELTAS; i++) { 353 if (Offset < (unsigned int) 354 ((SecMap->ft_deltas[i].nSectors * SecMap->ft_deltas[i].nKB))) 355 return SecNo + (Offset / SecMap->ft_deltas[i].nKB); 356 SecNo += SecMap->ft_deltas[i].nSectors; 357 Offset -= SecMap->ft_deltas[i].nSectors * SecMap->ft_deltas[i].nKB; 358 } 359 360 return ~0; 361 } 362 363 /* 364 * Semi-generic operations 365 */ 366 struct flash_ops { 367 void (*write_uint8) (struct eflash_softc *sc, volatile void *Offset, uint8_t Value); 368 void (*read_uint8) (struct eflash_softc *sc, volatile void *Offset, uint8_t *Value); 369 void (*write_uint16) (struct eflash_softc *sc, volatile void *Offset, uint16_t Value); 370 void (*read_uint16) (struct eflash_softc *sc, volatile void *Offset, uint16_t *Value); 371 void (*write_uint32) (struct eflash_softc *sc, volatile void *Offset, uint32_t Value); 372 void (*read_uint32) (struct eflash_softc *sc, volatile void *Offset, uint32_t *Value); 373 int (*program_word) (struct eflash_softc *sc, volatile void *Offset, uint16_t *pValues, 374 int Verify, int *nWritten); 375 int (*program_buffer) (struct eflash_softc *sc, volatile void *Offset, uint16_t *pValues, 376 int Verify, int *nWritten); 377 }; 378 379 /* 380 * Hardware access proper, single-chip 381 */ 382 static void single_write_uint8 (struct eflash_softc *sc,volatile void *Offset,uint8_t Value) 383 { 384 volatile uint8_t * Where = Offset; 385 *Where = Value; 386 } 387 388 static void single_read_uint8 (struct eflash_softc *sc,volatile void *Offset,uint8_t *Value) 389 { 390 volatile uint8_t * Where = Offset; 391 *Value = *Where; 392 } 393 394 static void single_write_uint16 (struct eflash_softc *sc,volatile void *Offset,uint16_t Value) 395 { 396 volatile uint16_t * Where = Offset; 397 *Where = Value; 398 } 399 400 static void single_read_uint16 (struct eflash_softc *sc,volatile void *Offset,uint16_t *Value) 401 { 402 volatile uint16_t * Where = Offset; 403 *Value = *Where; 404 } 405 406 /* This one should not be used, probably */ 407 static void single_write_uint32 (struct eflash_softc *sc,volatile void *Offset,uint32_t Value) 408 { 409 #if 0 410 /* The chip cannot take back-to-back writes */ 411 volatile uint32_t * Where = Offset; 412 *Where = Value; 413 #else 414 volatile uint8_t * Where = Offset; 415 uint16_t v0, v1; 416 417 /* Unfortunately, this is bytesex dependent */ 418 #if (BYTE_ORDER == BIG_ENDIAN) 419 v1 = (uint16_t) Value; 420 v0 = (uint16_t) (Value >> 16); 421 #else 422 v0 = (uint16_t) Value; 423 v1 = (uint16_t) (Value >> 16); 424 #endif 425 single_write_uint16(sc,Where,v0); 426 single_write_uint16(sc,Where+2,v1); 427 #endif 428 } 429 430 static void single_read_uint32 (struct eflash_softc *sc,volatile void *Offset,uint32_t *Value) 431 { 432 /* back-to-back reads must be ok */ 433 volatile uint32_t * Where = Offset; 434 *Value = *Where; 435 } 436 437 /* 438 * Hardware access proper, paired-chips 439 * NB: This set of ops assumes two chips in parallel on a 32bit bus, 440 * each operation is repeated in parallel to both chips 441 */ 442 static void twin_write_uint8 (struct eflash_softc *sc,volatile void *Offset,uint8_t Value) 443 { 444 volatile uint32_t * Where = Offset; 445 uint32_t v = Value | ((uint32_t)Value << 16); 446 447 v = le32toh(v); 448 *Where = v; 449 } 450 451 static void twin_read_uint8 (struct eflash_softc *sc,volatile void *Offset,uint8_t *Value) 452 { 453 volatile uint32_t * Where = Offset; 454 uint32_t v; 455 v = *Where; 456 v = le32toh(v); 457 *Value = (uint8_t) v; 458 } 459 460 /* This one should *not* be used, error-prone */ 461 static void twin_write_uint16 (struct eflash_softc *sc,volatile void *Offset,uint16_t Value) 462 { 463 volatile uint16_t * Where = Offset; 464 *Where = Value; 465 } 466 467 static void twin_read_uint16 (struct eflash_softc *sc,volatile void *Offset,uint16_t *Value) 468 { 469 volatile uint16_t * Where = Offset; 470 *Value = *Where; 471 } 472 473 static void twin_write_uint32 (struct eflash_softc *sc,volatile void *Offset,uint32_t Value) 474 { 475 volatile uint32_t * Where = Offset; 476 Value = le32toh(Value); 477 *Where = Value; 478 } 479 480 static void twin_read_uint32 (struct eflash_softc *sc,volatile void *Offset,uint32_t *Value) 481 { 482 volatile uint32_t * Where = Offset; 483 uint32_t v; 484 v = *Where; 485 v = le32toh(v); 486 *Value = v; 487 } 488 489 /* 490 * Command and status definitions 491 */ 492 493 /* Defines for the STATUS register 494 */ 495 #define ST_reserved 0x01 496 #define ST_BLOCK_LOCKED 0x02 497 #define ST_PROGRAM_SUSPENDED 0x04 498 #define ST_LOW_VOLTAGE 0x08 499 #define ST_LOCK_BIT_ERROR 0x10 500 #define ST_ERASE_ERROR 0x20 501 #define ST_ERASE_SUSPENDED 0x40 502 #define ST_READY 0x80 503 #define ST_ERASE_MASK 0xee /* bits to check after erase command */ 504 #define ST_MASK 0xfe /* ignore reserved */ 505 506 /* Command set (what we use of it) 507 */ 508 #define CMD_CONFIRM 0xd0 509 #define CMD_READ_ARRAY 0xff 510 #define CMD_READ_ID 0x90 511 #define CMD_READ_STATUS 0x70 512 #define CMD_CLEAR_STATUS 0x50 513 #define CMD_WRITE_WORD 0x40 514 #define CMD_WRITE_BUFFER 0xe8 515 #define CMD_ERASE_SETUP 0x20 516 #define CMD_ERASE_CONFIRM CMD_CONFIRM 517 #define CMD_SET_PREFIX 0x60 /* set read config, lock bits */ 518 #define CMD_LOCK 0x01 519 #define CMD_UNLOCK CMD_CONFIRM 520 /* What we dont use of it 521 */ 522 #define CMD_READ_QUERY 0x98 523 # define BUFFER_BYTES 32 524 #define CMD_ERASE_SUSPEND 0xb0 525 #define CMD_ERASE_RESUME CMD_CONFIRM 526 #define CMD_CONFIGURATION 0xb8 527 #define CMD_PROTECT 0xc0 528 529 /* Enter the Product ID mode (Read Identifier Codes) 530 */ 531 static void ProductIdEnter(struct eflash_softc *sc) 532 { 533 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_READ_ID); 534 } 535 536 /* Exit the Product ID mode (enter Read Array mode) 537 */ 538 static void ProductIdExit(struct eflash_softc *sc) 539 { 540 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_READ_ARRAY); 541 } 542 543 /* Read the status register 544 */ 545 static uint8_t ReadStatusRegister(struct eflash_softc *sc) 546 { 547 uint8_t Status; 548 549 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_READ_STATUS); 550 sc->sc_ops->read_uint8(sc,sc->sc_page0,&Status); 551 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_READ_ARRAY); 552 return Status; 553 } 554 555 /* Clear error bits in status 556 */ 557 static void ClearStatusRegister(struct eflash_softc *sc) 558 { 559 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_CLEAR_STATUS); 560 } 561 562 #if DEBUG 563 /* Decode status bits 564 */ 565 typedef const char *string; 566 567 static void PrintStatus(uint8_t Status) 568 { 569 /* BUGBUG there's a %b format I think? */ 570 string BitNames[8] = { 571 "reserved", "BLOCK_LOCKED", 572 "PROGRAM_SUSPENDED", "LOW_VOLTAGE", 573 "LOCK_BIT_ERROR", "ERASE_ERROR", 574 "ERASE_SUSPENDED", "READY" 575 }; 576 int i; 577 int OneSet = FALSE; 578 579 printf("[status %x =",Status); 580 for (i = 0; i < 8; i++) { 581 if (Status & (1<<i)) { 582 printf("%c%s", 583 (OneSet) ? '|' : ' ', 584 BitNames[i]); 585 OneSet = TRUE; 586 } 587 } 588 printf("]\n"); 589 } 590 #else 591 #define PrintStatus(x) 592 #endif 593 594 /* 595 * The device can lock up under certain conditions. 596 * There is no software workaround [must toggle RP# to GND] 597 * Check if it seems that we are in that state. 598 */ 599 static int IsIrresponsive(struct eflash_softc *sc) 600 { 601 uint8_t Status = ReadStatusRegister(sc); 602 603 if (Status & ST_READY) 604 return FALSE; 605 606 if ((Status & ST_ERASE_MASK) == 607 (ST_LOCK_BIT_ERROR|ST_ERASE_SUSPENDED|ST_ERASE_ERROR)) { 608 /* yes, looks that way */ 609 return TRUE; 610 } 611 612 /* Something is indeed amiss, but we dont really know for sure */ 613 PrintStatus(ReadStatusRegister(sc)); 614 ClearStatusRegister(sc); 615 PrintStatus(ReadStatusRegister(sc)); 616 617 if ((Status & ST_MASK) == 618 (ST_LOCK_BIT_ERROR|ST_ERASE_SUSPENDED|ST_ERASE_ERROR)) { 619 /* yes, looks that way */ 620 return TRUE; 621 } 622 623 return FALSE; 624 } 625 626 627 /* Write one 16bit word 628 */ 629 static int 630 single_program_word(struct eflash_softc *sc, volatile void *Offset, uint16_t *Values, 631 int Verify, int *nWritten) 632 { 633 uint8_t Status; 634 uint16_t i, Data16, Value; 635 636 *nWritten = 0; 637 638 Value = Values[0]; 639 640 if (Verify) { 641 sc->sc_ops->read_uint16(sc,Offset,&Data16); 642 #ifdef Verbose 643 if (Verbose) { 644 printf("Location %p was x%x\n", 645 Offset, Data16); 646 } 647 #endif 648 if (Data16 != 0xffff) 649 printf("Offset %p not ERASED, wont take.\n",Offset); 650 } 651 652 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_WRITE_WORD); 653 sc->sc_ops->write_uint16(sc,Offset,Value); 654 655 /* Wait until the operation is completed 656 * Specs say it takes between 210 and 630 us 657 * Errata says 360 TYP and Max=TBD (sic) 658 */ 659 DELAY(800); 660 661 for (i = 0; i < 10; i++) { 662 sc->sc_ops->read_uint8(sc,Offset,&Status); 663 if ((Status & ST_READY)) break; 664 DELAY(100); 665 } 666 667 ProductIdExit(sc); 668 669 if (Verify) { 670 sc->sc_ops->read_uint16(sc,Offset,&Data16); 671 #ifdef Verbose 672 if (Verbose) { 673 printf("Location %p is now x%x\n", 674 Offset, Data16); 675 } 676 #endif 677 if ((Data16 != Value)) { 678 PrintStatus(Status); 679 printf(". That didnt work, try again.. [%x != %x]\n", 680 Data16, Value); 681 ClearStatusRegister(sc); 682 return FALSE; 683 } 684 } 685 686 *nWritten = 2; 687 return TRUE; 688 } 689 690 /* Write one buffer, 16bit words at a time 691 */ 692 static int 693 single_program_buffer(struct eflash_softc *sc, volatile void *Offset, uint16_t *Values, 694 int Verify, int *nWritten) 695 { 696 uint8_t Status; 697 uint16_t i, Data16, Value = 0; 698 volatile uint8_t *Where = Offset; 699 700 *nWritten = 0; 701 if (sc->sc_buffersize == 0) 702 return FALSE; /* sanity */ 703 704 if (Verify) { 705 for (i = 0; i < sc->sc_buffersize; i+= 2) { 706 sc->sc_ops->read_uint16(sc,Where+i,&Data16); 707 #ifdef Verbose 708 if (Verbose) { 709 printf("Location %p was x%x\n", 710 Where+i, Data16); 711 } 712 #endif 713 714 if (Data16 != 0xffff) 715 printf("Offset %p not ERASED, wont take.\n",Where+i); 716 } 717 } 718 719 /* Specs say to retry if necessary */ 720 for (i = 0; i < 5; i++) { 721 sc->sc_ops->write_uint8(sc,Offset,CMD_WRITE_BUFFER); 722 DELAY(10); 723 sc->sc_ops->read_uint8(sc,Offset,&Status); 724 if ((Status & ST_READY)) break; 725 } 726 if (0 == (Status & ST_READY)) { 727 printf("FAILED program_buffer at Location %p, Status= x%x\n", 728 Offset, Status); 729 return FALSE; 730 } 731 732 /* Say how many words we'll be sending */ 733 sc->sc_ops->write_uint8(sc,Offset,(uint8_t)(sc->sc_buffersize/2)); 734 735 /* Send the data */ 736 for (i = 0; i < sc->sc_buffersize; i+= 2) { 737 Value = Values[i/2]; 738 sc->sc_ops->write_uint16(sc,Where+i,Value); 739 DELAY(10);/*jic*/ 740 } 741 742 /* Write confirmation */ 743 sc->sc_ops->write_uint8(sc,Offset,CMD_CONFIRM); 744 745 /* Wait until the operation is completed 746 * Specs say it takes between 800 and 2400 us 747 * Errata says 1600 TYP and Max=TBD (sic), but fixed in stepping A3 and above. 748 */ 749 DELAY(800); 750 751 for (i = 0; i < 20; i++) { 752 sc->sc_ops->write_uint8(sc,Offset,CMD_READ_STATUS); 753 sc->sc_ops->read_uint8(sc,Offset,&Status); 754 if ((Status & ST_READY)) break; 755 DELAY(200); 756 } 757 758 ProductIdExit(sc); 759 760 /* Verify? */ 761 if (Verify) { 762 for (i = 0; i < sc->sc_buffersize; i+= 2) { 763 sc->sc_ops->read_uint16(sc,Where+i,&Data16); 764 #ifdef Verbose 765 if (Verbose) { 766 printf("Location %p is now x%x\n", 767 Where+i, Data16); 768 } 769 #endif 770 Value = Values[i/2]; 771 772 if ((Data16 != Value)) { 773 PrintStatus(Status); 774 printf(". That didnt work, try again.. [%x != %x]\n", 775 Data16, Value); 776 ClearStatusRegister(sc); 777 return FALSE; 778 } 779 } 780 } 781 782 *nWritten = sc->sc_buffersize; 783 return TRUE; 784 } 785 786 /* Write one 32bit word 787 */ 788 static int 789 twin_program_word(struct eflash_softc *sc, volatile void *Offset, uint16_t *Values, 790 int Verify, int *nWritten) 791 { 792 uint8_t Status; 793 uint32_t i, Data32, Value; 794 uint16_t v0, v1; 795 796 *nWritten = 0; 797 798 v0 = Values[0]; 799 v0 = le16toh(v0); 800 v1 = Values[1]; 801 v1 = le16toh(v1); 802 Value = v0 | ((uint32_t)v1 << 16); 803 if (Verify) { 804 sc->sc_ops->read_uint32(sc,Offset,&Data32); 805 #ifdef Verbose 806 if (Verbose) { 807 printf("Location %p was x%x\n", 808 Offset, Data32); 809 } 810 #endif 811 if (Data32 != 0xffffffff) 812 printf("Offset %p not ERASED, wont take.\n",Offset); 813 } 814 815 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_WRITE_WORD); 816 sc->sc_ops->write_uint32(sc,Offset,Value); 817 818 /* Wait until the operation is completed 819 * Specs say it takes between 210 and 630 us 820 * Errata says 360 TYP and Max=TBD (sic) 821 */ 822 DELAY(400); 823 824 for (i = 0; i < 10; i++) { 825 sc->sc_ops->read_uint8(sc,Offset,&Status); 826 if ((Status & ST_READY)) break; 827 DELAY(100); 828 } 829 830 ProductIdExit(sc); 831 832 if (Verify) { 833 sc->sc_ops->read_uint32(sc,Offset,&Data32); 834 #ifdef Verbose 835 if (Verbose) { 836 printf("Location %p is now x%x\n", 837 Offset, Data32); 838 } 839 #endif 840 if ((Data32 != Value)) { 841 PrintStatus(Status); 842 printf(". That didnt work, try again.. [%x != %x]\n", 843 Data32, Value); 844 ClearStatusRegister(sc); 845 return FALSE; 846 } 847 } 848 849 *nWritten = 4; 850 return TRUE; 851 } 852 853 /* Write one buffer, 32bit words at a time 854 */ 855 static int 856 twin_program_buffer(struct eflash_softc *sc, volatile void *Offset, uint16_t *Values, 857 int Verify, int *nWritten) 858 { 859 uint8_t Status; 860 uint32_t i, Data32, Value; 861 uint16_t v0 = 0, v1; 862 volatile uint8_t *Where = Offset; 863 864 *nWritten = 0; 865 if (sc->sc_buffersize == 0) 866 return FALSE; /* sanity */ 867 868 if (Verify) { 869 for (i = 0; i < sc->sc_buffersize; i+= 4) { 870 sc->sc_ops->read_uint32(sc,Where+i,&Data32); 871 #ifdef Verbose 872 if (Verbose) { 873 printf("Location %p was x%x\n", 874 Where+i, Data32); 875 } 876 #endif 877 if (Data32 != 0xffffffff) 878 printf("Offset %p not ERASED, wont take.\n",Where+i); 879 } 880 } 881 882 /* Specs say to retry if necessary */ 883 for (i = 0; i < 5; i++) { 884 sc->sc_ops->write_uint8(sc,Offset,CMD_WRITE_BUFFER); 885 DELAY(10); 886 sc->sc_ops->read_uint8(sc,Offset,&Status); 887 if ((Status & ST_READY)) break; 888 } 889 if (0 == (Status & ST_READY)) { 890 printf("FAILED program_buffer at Location %p, Status= x%x\n", 891 Offset, Status); 892 return FALSE; 893 } 894 895 /* Say how many words we'll be sending */ 896 sc->sc_ops->write_uint8(sc,Offset,(uint8_t)(sc->sc_buffersize/4)); /* to each twin! */ 897 898 /* Send the data */ 899 for (i = 0; i < sc->sc_buffersize; i+= 4) { 900 v0 = Values[i/2]; 901 v0 = le16toh(v0); 902 v1 = Values[1+(i/2)]; 903 v1 = le16toh(v1); 904 Value = v0 | ((uint32_t)v1 << 16); 905 sc->sc_ops->write_uint32(sc,Where+i,Value); 906 DELAY(10);/*jic*/ 907 } 908 909 /* Write confirmation */ 910 sc->sc_ops->write_uint8(sc,Offset,CMD_CONFIRM); 911 912 /* Wait until the operation is completed 913 * Specs say it takes between 800 and 2400 us 914 * Errata says 1600 TYP and Max=TBD (sic), but fixed in stepping A3 and above. 915 */ 916 DELAY(800); 917 918 for (i = 0; i < 20; i++) { 919 sc->sc_ops->write_uint8(sc,Offset,CMD_READ_STATUS); 920 sc->sc_ops->read_uint8(sc,Offset,&Status); 921 if ((Status & ST_READY)) break; 922 DELAY(200); 923 } 924 925 ProductIdExit(sc); 926 927 /* Verify */ 928 if (Verify) { 929 for (i = 0; i < sc->sc_buffersize; i+= 4) { 930 sc->sc_ops->read_uint32(sc,Where+i,&Data32); 931 #ifdef Verbose 932 if (Verbose) { 933 printf("Location %p is now x%x\n", 934 Where+i, Data32); 935 } 936 #endif 937 v0 = Values[i/2]; 938 v0 = le16toh(v0); 939 v1 = Values[1+(i/2)]; 940 v1 = le16toh(v1); 941 Value = v0 | ((uint32_t)v1 << 16); 942 943 if ((Data32 != Value)) { 944 PrintStatus(Status); 945 printf(". That didnt work, try again.. [%x != %x]\n", 946 Data32, Value); 947 ClearStatusRegister(sc); 948 return FALSE; 949 } 950 } 951 } 952 953 *nWritten = sc->sc_buffersize; 954 return TRUE; 955 } 956 957 /* Is there a lock on a given sector 958 */ 959 static int IsSectorLocked(struct eflash_softc *sc, uint8_t *secptr) 960 { 961 uint8_t Data, Data1; 962 963 ProductIdEnter(sc); 964 /* Lockout info is at address 2 of the given sector, meaning A0=0 A1=1. 965 */ 966 sc->sc_ops->read_uint8(sc,secptr+(0x0002*2*sc->sc_chips),&Data); 967 sc->sc_ops->read_uint8(sc,secptr+(0x0003*2*sc->sc_chips),&Data1); 968 969 ProductIdExit(sc); 970 971 return (Data & 1); 972 } 973 974 /* Remove the write-lock to a sector 975 */ 976 static void SectorUnLock(struct eflash_softc *sc, uint8_t *secptr) 977 { 978 uint8_t Status; 979 int i; 980 981 DBGME(DEBUG_FUNCS,printf("%s: Unlocking sector %d [ptr %p] ...\n", 982 device_xname(sc->sc_dev), sc->sc_sector_offset, secptr)); 983 984 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_SET_PREFIX); 985 sc->sc_ops->write_uint8(sc,secptr,CMD_UNLOCK); 986 987 /* Wait until the unlock is complete. 988 * Specs say this takes between 64 and 75 usecs. 989 */ 990 DELAY(100); 991 992 for (i = 0; i < 10; i++) { 993 sc->sc_ops->read_uint8(sc,secptr,&Status); 994 if ((Status & ST_READY)) break; 995 DELAY(100); 996 } 997 998 ProductIdExit(sc); 999 1000 if ((Status & ST_MASK) == ST_READY) { 1001 DBGME(DEBUG_FUNCS,printf("%s: Unlocked ok.\n", 1002 device_xname(sc->sc_dev))); 1003 return; 1004 } 1005 1006 PrintStatus(Status); 1007 DBGME(DEBUG_ERRORS,printf("%s: Unlock of sector %d NOT completed (status=%x).\n", 1008 device_xname(sc->sc_dev), 1009 sc->sc_sector_offset, Status)); 1010 ClearStatusRegister(sc); 1011 } 1012 1013 1014 /* Erase one sector 1015 */ 1016 static int SectorErase(struct eflash_softc *sc, void *secptr) 1017 { 1018 uint8_t Status = 0; 1019 uint16_t i; 1020 1021 DBGME(DEBUG_FUNCS,printf("%s: Erasing sector %d [ptr %p] ...\n", 1022 device_xname(sc->sc_dev), sc->sc_sector_offset, secptr)); 1023 1024 /* On some chips we just cannot avoid the locking business. 1025 */ 1026 if ((sc->sc_chips == 1) && 1027 IsSectorLocked(sc,secptr)) 1028 SectorUnLock(sc,secptr); 1029 1030 sc->sc_ops->write_uint8(sc,secptr,CMD_ERASE_SETUP); 1031 sc->sc_ops->write_uint8(sc,secptr,CMD_ERASE_CONFIRM); 1032 1033 /* Wait until the erase is actually completed 1034 * Specs say it will take between 1 and 5 seconds. 1035 * Errata says it takes 2 sec min and 25 sec max. 1036 * Double that before giving up. 1037 */ 1038 for (i = 0; i < 20; i++) { 1039 /* Sleep for at least 2 seconds 1040 */ 1041 tsleep(sc,PWAIT,"erase", hz * 2); 1042 1043 sc->sc_ops->read_uint8(sc,secptr,&Status); 1044 if ((Status & ST_READY)) break; 1045 PrintStatus(Status); 1046 } 1047 1048 ProductIdExit(sc); 1049 1050 if ((Status & ST_ERASE_MASK) == ST_READY) { 1051 DBGME(DEBUG_FUNCS,printf("%s: Erased ok.\n", device_xname(sc->sc_dev))); 1052 return 0; 1053 } 1054 1055 PrintStatus(Status); 1056 DBGME(DEBUG_ERRORS,printf("%s: Erase of sector %d NOT completed (status=%x).\n", 1057 device_xname(sc->sc_dev), 1058 sc->sc_sector_offset, Status)); 1059 1060 ClearStatusRegister(sc); 1061 return EIO; 1062 } 1063 1064 1065 1066 /* Write (a portion of) a sector 1067 */ 1068 static size_t eflash_write_sector(struct eflash_softc *sc, char *Buffer, size_t n, 1069 uint8_t *Offset, int Verify) 1070 { 1071 size_t i; 1072 1073 /* Make sure the device is not screwed up 1074 */ 1075 if (IsIrresponsive(sc)) { 1076 printf("FLASH is locked-up (or mapped cacheable?), wont work. "); 1077 } 1078 1079 for (i = 0; i < n;) { 1080 int nTries; 1081 int nWritten = 0;/*we expect 2 or 4 */ 1082 1083 if (sc->sc_buffersize && ((n-i) >= sc->sc_buffersize)) { 1084 for (nTries = 0; nTries < 5; nTries++) 1085 if (sc->sc_ops->program_buffer(sc,Offset,(uint16_t*)(Buffer+i),Verify,&nWritten)) 1086 break; 1087 } else { 1088 for (nTries = 0; nTries < 5; nTries++) 1089 if (sc->sc_ops->program_word(sc,Offset,(uint16_t*)(Buffer+i),Verify,&nWritten)) 1090 break; 1091 } 1092 Offset += nWritten; 1093 i += nWritten; 1094 if (nWritten == 0) 1095 break; 1096 } 1097 return i; 1098 } 1099 1100 /* Identify type and the sector map of the FLASH. 1101 * Argument is the base address of the device and the count of chips on the bus (1/2) 1102 * Returns FALSE if failed 1103 */ 1104 static const struct flash_ops single_ops = { 1105 single_write_uint8, 1106 single_read_uint8, 1107 single_write_uint16, 1108 single_read_uint16, 1109 single_write_uint32, 1110 single_read_uint32, 1111 single_program_word, 1112 single_program_buffer 1113 }; 1114 1115 static const struct flash_ops twin_ops = { 1116 twin_write_uint8, 1117 twin_read_uint8, 1118 twin_write_uint16, 1119 twin_read_uint16, 1120 twin_write_uint32, 1121 twin_read_uint32, 1122 twin_program_word, 1123 twin_program_buffer 1124 }; 1125 1126 static int flash_identify(struct eflash_softc *sc) 1127 { 1128 uint8_t Mid, Did; 1129 int i; 1130 1131 if (sc->sc_chips > 1) 1132 sc->sc_ops = &twin_ops; 1133 else 1134 sc->sc_ops = &single_ops; 1135 1136 sc->sc_buffersize = 0; 1137 #if USE_BUFFERED_WRITES 1138 sc->sc_buffersize = BUFFER_BYTES * sc->sc_chips; 1139 #endif 1140 sc->sc_sector = NULL; 1141 sc->sc_sector_size = 0; 1142 sc->sc_sector_offset = NOSECTOR; 1143 sc->sc_erased = FALSE; 1144 1145 ProductIdEnter(sc); 1146 sc->sc_ops->read_uint8(sc,sc->sc_page0+(0x0000*2*sc->sc_chips),&Mid); 1147 sc->sc_ops->read_uint8(sc,sc->sc_page0+(0x0001*2*sc->sc_chips),&Did); 1148 ProductIdExit(sc); 1149 1150 sc->sc_type.ft_manuf_code = Mid; 1151 sc->sc_type.ft_device_code = Did; 1152 1153 for (i = 0; i < nMAPS; i++) { 1154 if ((sector_maps[i].ft_manuf_code == Mid) && (sector_maps[i].ft_device_code == Did)) { 1155 int j; 1156 uint32_t ms = 0; 1157 sc->sc_type = sector_maps[i]; 1158 /* double the sector sizes if twin-chips */ 1159 for (j = 0; j < nDELTAS; j++) { 1160 sc->sc_type.ft_deltas[j].nKB *= sc->sc_chips; 1161 if (ms < sc->sc_type.ft_deltas[j].nKB) 1162 ms = sc->sc_type.ft_deltas[j].nKB; 1163 } 1164 sc->sc_max_secsize = ms * 1024; 1165 return TRUE; 1166 } 1167 } 1168 1169 return FALSE; 1170 } 1171 1172 /* Common code for read&write argument validation 1173 */ 1174 static int eflash_validate(struct eflash_softc *sc, daddr_t start, size_t *pSize, void **pSrc) 1175 { 1176 daddr_t Size; 1177 uint32_t sec; 1178 size_t secsize, secstart; 1179 1180 /* Validate args 1181 */ 1182 if (start >= sc->sc_capacity) { 1183 *pSize = 0; 1184 DBGME(DEBUG_ERRORS,printf("eflash::ValidateArg(%qx) EOF\n", start)); 1185 return E2BIG; 1186 } 1187 1188 /* Map sector if not already 1189 */ 1190 sec = SectorNumber(&sc->sc_type, start << DEV_BSHIFT); 1191 secsize = SectorSize( &sc->sc_type, sec); 1192 secstart = SectorStart(&sc->sc_type,sec); 1193 if (sec != sc->sc_sector_offset) { 1194 int error; 1195 1196 /* unmap previous first */ 1197 if (sc->sc_sector_offset != NOSECTOR) { 1198 DBGME(DEBUG_FUNCS,printf("%s: unmap %p %zx\n", 1199 device_xname(sc->sc_dev), sc->sc_sector, sc->sc_sector_size)); 1200 iounaccess((vaddr_t)sc->sc_sector, sc->sc_sector_size); 1201 sc->sc_sector_offset = NOSECTOR; 1202 } 1203 1204 /* map new */ 1205 error = ioaccess((vaddr_t)sc->sc_sector, 1206 secstart + sc->sc_base, 1207 secsize); 1208 DBGME(DEBUG_FUNCS,printf("%s: mapped %p %zx -> %zx %d\n", 1209 device_xname(sc->sc_dev), 1210 sc->sc_sector, secsize, secstart + sc->sc_base,error)); 1211 if (error) return error; 1212 1213 /* Update state. We have to assume the sector was not erased. Sigh. */ 1214 sc->sc_sector_offset = sec; 1215 sc->sc_sector_size = secsize; 1216 sc->sc_erased = FALSE; 1217 } 1218 1219 /* Adjust size if necessary 1220 */ 1221 Size = start + *pSize; /* last sector */ 1222 if (Size > sc->sc_capacity) { 1223 /* At most this many sectors 1224 */ 1225 Size = sc->sc_capacity - start; 1226 *pSize = (size_t)Size; 1227 } 1228 if (*pSize > (secsize >> DEV_BSHIFT)) { 1229 *pSize = secsize >> DEV_BSHIFT; 1230 } 1231 1232 *pSrc = sc->sc_sector + (start << DEV_BSHIFT) - secstart; 1233 1234 DBGME(DEBUG_FUNCS,printf("%s: Validate %qx %zd %p\n", 1235 device_xname(sc->sc_dev), start,*pSize, *pSrc)); 1236 return 0; 1237 } 1238 1239 static int eflash_read_at (struct eflash_softc *sc, 1240 daddr_t start_sector, char *buffer, size_t nblocks, 1241 size_t * pSizeRead) 1242 { 1243 int error; 1244 uint32_t SizeRead = 0; 1245 void *src; 1246 1247 DBGME(DEBUG_XFERS|DEBUG_READS,printf("%s: EflashReadAt(%qx %p %zd %p)\n", 1248 device_xname(sc->sc_dev), start_sector, buffer, nblocks, pSizeRead)); 1249 1250 /* Validate & trim arguments 1251 */ 1252 error = eflash_validate(sc, start_sector, &nblocks, &src); 1253 1254 /* Copy data if 1255 */ 1256 if (error == 0) { 1257 SizeRead = nblocks; 1258 memcpy(buffer, src, nblocks << DEV_BSHIFT); 1259 } 1260 1261 if (pSizeRead) 1262 *pSizeRead = SizeRead; 1263 return error; 1264 } 1265 1266 /* Write SIZE bytes to device. 1267 */ 1268 static int eflash_write_at (struct eflash_softc *sc, 1269 daddr_t start_sector, char *buffer, size_t nblocks, 1270 size_t * pSizeWritten) 1271 { 1272 int error; 1273 void *src; 1274 size_t SizeWritten = 0; 1275 1276 DBGME(DEBUG_XFERS|DEBUG_WRITES,printf("%s: EflashWriteAt(%qx %p %zd %p)\n", 1277 device_xname(sc->sc_dev), start_sector, buffer, nblocks, pSizeWritten)); 1278 1279 /* Validate & trim arguments 1280 */ 1281 error = eflash_validate(sc, start_sector, &nblocks, &src); 1282 1283 if (error == 0) { 1284 /* Do we have to erase it */ 1285 if (! sc->sc_erased) { 1286 1287 error = SectorErase(sc,src); 1288 if (error) 1289 goto Out; 1290 sc->sc_erased = TRUE; 1291 } 1292 SizeWritten = eflash_write_sector(sc, buffer, nblocks << DEV_BSHIFT, src, TRUE); 1293 SizeWritten >>= DEV_BSHIFT; 1294 } 1295 1296 Out: 1297 if (pSizeWritten) 1298 *pSizeWritten = SizeWritten; 1299 return error; 1300 } 1301 1302 /* Rest of code lifted with mods from the dev\ata\wd.c driver 1303 */ 1304 1305 /* $NetBSD: flash_ebus.c,v 1.7 2013/10/13 06:55:34 riz Exp $ */ 1306 1307 /* 1308 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 1309 * 1310 * Redistribution and use in source and binary forms, with or without 1311 * modification, are permitted provided that the following conditions 1312 * are met: 1313 * 1. Redistributions of source code must retain the above copyright 1314 * notice, this list of conditions and the following disclaimer. 1315 * 2. Redistributions in binary form must reproduce the above copyright 1316 * notice, this list of conditions and the following disclaimer in the 1317 * documentation and/or other materials provided with the distribution. 1318 * 3. All advertising materials mentioning features or use of this software 1319 * must display the following acknowledgement: 1320 * This product includes software developed by Manuel Bouyer. 1321 * 4. The name of the author may not be used to endorse or promote products 1322 * derived from this software without specific prior written permission. 1323 * 1324 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1325 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1326 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1327 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1328 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 1329 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 1330 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 1331 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 1332 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 1333 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 1334 */ 1335 1336 /*- 1337 * Copyright (c) 1998, 2003, 2004 The NetBSD Foundation, Inc. 1338 * All rights reserved. 1339 * 1340 * This code is derived from software contributed to The NetBSD Foundation 1341 * by Charles M. Hannum and by Onno van der Linden. 1342 * 1343 * Redistribution and use in source and binary forms, with or without 1344 * modification, are permitted provided that the following conditions 1345 * are met: 1346 * 1. Redistributions of source code must retain the above copyright 1347 * notice, this list of conditions and the following disclaimer. 1348 * 2. Redistributions in binary form must reproduce the above copyright 1349 * notice, this list of conditions and the following disclaimer in the 1350 * documentation and/or other materials provided with the distribution. 1351 * 3. All advertising materials mentioning features or use of this software 1352 * must display the following acknowledgement: 1353 * This product includes software developed by the NetBSD 1354 * Foundation, Inc. and its contributors. 1355 * 4. Neither the name of The NetBSD Foundation nor the names of its 1356 * contributors may be used to endorse or promote products derived 1357 * from this software without specific prior written permission. 1358 * 1359 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 1360 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 1361 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 1362 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 1363 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 1364 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 1365 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 1366 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 1367 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 1368 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 1369 * POSSIBILITY OF SUCH DAMAGE. 1370 */ 1371 1372 static const char ST506[] = "ST506"; 1373 1374 #define EFLASHIORETRIES_SINGLE 4 /* number of retries before single-sector */ 1375 #define EFLASHIORETRIES 5 /* number of retries before giving up */ 1376 #define RECOVERYTIME hz/2 /* time to wait before retrying a cmd */ 1377 1378 #define EFLASHUNIT(dev) DISKUNIT(dev) 1379 #define EFLASHPART(dev) DISKPART(dev) 1380 #define EFLASHMINOR(unit, part) DISKMINOR(unit, part) 1381 #define MAKEEFLASHDEV(maj, unit, part) MAKEDISKDEV(maj, unit, part) 1382 1383 #define EFLASHLABELDEV(dev) (MAKEEFLASHDEV(major(dev), EFLASHUNIT(dev), RAW_PART)) 1384 1385 void eflashperror(const struct eflash_softc *); 1386 1387 extern struct cfdriver eflash_cd; 1388 1389 dev_type_open(eflashopen); 1390 dev_type_close(eflashclose); 1391 dev_type_read(eflashread); 1392 dev_type_write(eflashwrite); 1393 dev_type_ioctl(eflashioctl); 1394 dev_type_strategy(eflashstrategy); 1395 dev_type_dump(eflashdump); 1396 dev_type_size(eflashsize); 1397 1398 const struct bdevsw eflash_bdevsw = { 1399 eflashopen, eflashclose, eflashstrategy, eflashioctl, eflashdump, eflashsize, D_DISK 1400 }; 1401 1402 const struct cdevsw eflash_cdevsw = { 1403 eflashopen, eflashclose, eflashread, eflashwrite, eflashioctl, 1404 nostop, notty, nopoll, nommap, nokqfilter, D_DISK 1405 }; 1406 1407 void eflashgetdefaultlabel(struct eflash_softc *, struct disklabel *); 1408 void eflashgetdisklabel(struct eflash_softc *); 1409 void eflashstart(void *); 1410 void __eflashstart(struct eflash_softc *, struct buf *); 1411 void eflashrestart(void *); 1412 void eflashattach(struct eflash_softc *); 1413 int eflashdetach(device_t, int); 1414 int eflashactivate(device_t, enum devact); 1415 1416 void eflashdone(struct eflash_softc *); 1417 static void eflash_set_geometry(struct eflash_softc *sc); 1418 1419 struct dkdriver eflashdkdriver = { eflashstrategy, minphys }; 1420 1421 #ifdef HAS_BAD144_HANDLING 1422 static void bad144intern(struct eflash_softc *); 1423 #endif 1424 1425 static void eflash_wedges(void *arg); 1426 1427 void 1428 eflashattach(struct eflash_softc *sc) 1429 { 1430 device_t self = sc->sc_dev; 1431 char pbuf[9]; 1432 DEBUG_PRINT(("%s: eflashattach\n", device_xname(sc->sc_dev)), DEBUG_FUNCS | DEBUG_PROBE); 1433 1434 callout_init(&sc->sc_restart_ch, 0); 1435 bufq_alloc(&sc->sc_q, BUFQ_DISK_DEFAULT_STRAT, BUFQ_SORT_RAWBLOCK); 1436 1437 sc->openings = 1; /* wazziz?*/ 1438 1439 aprint_naive("\n"); 1440 1441 /* setup all required fields so that if the attach fails we are ok */ 1442 sc->sc_dk.dk_driver = &eflashdkdriver; 1443 sc->sc_dk.dk_name = device_xname(sc->sc_dev); 1444 1445 format_bytes(pbuf, sizeof(pbuf), sc->sc_capacity * DEV_BSIZE); 1446 aprint_normal("%s: %s, %d cyl, %d head, %d sec, %d bytes/sect x %llu sectors\n", 1447 device_xname(self), pbuf, 1, 1, sc->sc_capacity, 1448 DEV_BSIZE, (unsigned long long)sc->sc_capacity); 1449 1450 eflash_set_geometry(sc); 1451 1452 /* 1453 * Attach the disk structure. We fill in dk_info later. 1454 */ 1455 disk_attach(&sc->sc_dk); 1456 1457 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 1458 RND_TYPE_DISK, 0); 1459 1460 } 1461 1462 int 1463 eflashactivate(device_t self, enum devact act) 1464 { 1465 int rv = 0; 1466 1467 DEBUG_PRINT(("eflashactivate %x\n", act), DEBUG_FUNCS | DEBUG_PROBE); 1468 1469 switch (act) { 1470 case DVACT_DEACTIVATE: 1471 /* 1472 * Nothing to do; we key off the device's DVF_ACTIVATE. 1473 */ 1474 break; 1475 default: 1476 rv = EOPNOTSUPP; 1477 break; 1478 } 1479 return (rv); 1480 } 1481 1482 int 1483 eflashdetach(device_t self, int flags) 1484 { 1485 struct eflash_softc *sc = device_private(self); 1486 int s, bmaj, cmaj, i, mn; 1487 1488 DEBUG_PRINT(("%s: eflashdetach\n", device_xname(sc->sc_dev)), DEBUG_FUNCS | DEBUG_PROBE); 1489 1490 /* locate the major number */ 1491 bmaj = bdevsw_lookup_major(&eflash_bdevsw); 1492 cmaj = cdevsw_lookup_major(&eflash_cdevsw); 1493 1494 /* Nuke the vnodes for any open instances. */ 1495 for (i = 0; i < MAXPARTITIONS; i++) { 1496 mn = EFLASHMINOR(device_unit(self), i); 1497 vdevgone(bmaj, mn, mn, VBLK); 1498 vdevgone(cmaj, mn, mn, VCHR); 1499 } 1500 1501 /* Delete all of our wedges. */ 1502 dkwedge_delall(&sc->sc_dk); 1503 1504 s = splbio(); 1505 1506 /* Kill off any queued buffers. */ 1507 bufq_drain(sc->sc_q); 1508 1509 bufq_free(sc->sc_q); 1510 /*sc->atabus->ata_killpending(sc->drvp);*/ 1511 1512 splx(s); 1513 1514 /* Detach disk. */ 1515 disk_detach(&sc->sc_dk); 1516 1517 /* Unhook the entropy source. */ 1518 rnd_detach_source(&sc->rnd_source); 1519 1520 /*sc->drvp->drive_flags = 0; -- no drive any more here */ 1521 1522 return (0); 1523 } 1524 1525 extern int dkwedge_autodiscover; 1526 1527 /* Aux temp thread to avoid deadlock when doing the partitio.. ahem wedges thing. 1528 */ 1529 static void 1530 eflash_wedges(void *arg) 1531 { 1532 struct eflash_softc *sc = (struct eflash_softc*)arg; 1533 1534 DBGME(DEBUG_STATUS,printf("%s: wedges started for %p\n", sc->sc_dk.dk_name, sc)); 1535 1536 /* Discover wedges on this disk. */ 1537 dkwedge_autodiscover = 1; 1538 dkwedge_discover(&sc->sc_dk); 1539 1540 config_pending_decr(sc->sc_dev); 1541 1542 DBGME(DEBUG_STATUS,printf("%s: wedges thread done for %p\n", device_xname(sc->sc_dev), sc)); 1543 kthread_exit(0); 1544 } 1545 1546 static void 1547 eflash_thread(void *arg) 1548 { 1549 struct eflash_softc *sc = (struct eflash_softc*)arg; 1550 struct buf *bp; 1551 vaddr_t addr; 1552 int s, error; 1553 1554 DBGME(DEBUG_STATUS,printf("%s: thread started for %p\n", device_xname(sc->sc_dev), sc)); 1555 1556 s = splbio(); 1557 eflashattach(sc); 1558 splx(s); 1559 1560 /* Allocate a VM window large enough to map the largest sector 1561 * BUGBUG We could risk it and allocate/free on open/close? 1562 */ 1563 addr = uvm_km_alloc(kernel_map, sc->sc_max_secsize, 0, UVM_KMF_VAONLY); 1564 if (addr == 0) 1565 panic("eflash_thread: kernel map full (%lx)", (long unsigned)sc->sc_max_secsize); 1566 sc->sc_sector = (/*volatile*/ uint8_t *) addr; 1567 sc->sc_sector_size = 0; 1568 sc->sc_sector_offset = NOSECTOR; 1569 1570 error = kthread_create(PRI_NONE, 0, NULL, 1571 eflash_wedges, sc, NULL, "%s.wedges", device_xname(sc->sc_dev)); 1572 if (error) { 1573 aprint_error_dev(sc->sc_dev, "wedges: unable to create kernel " 1574 "thread: error %d\n", error); 1575 /* XXX: why continue? */ 1576 } 1577 1578 1579 DBGME(DEBUG_STATUS,printf("%s: thread service active for %p\n", device_xname(sc->sc_dev), sc)); 1580 1581 s = splbio(); 1582 for (;;) { 1583 /* Get next I/O request, wait if necessary 1584 */ 1585 if ((sc->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 1586 (sc->active_xfer == NULL)) { 1587 sc->ch_flags &= ~ATACH_TH_RUN; 1588 (void) tsleep(&sc->ch_thread, PRIBIO, "eflashth", 0); 1589 sc->ch_flags |= ATACH_TH_RUN; 1590 } 1591 if (sc->ch_flags & ATACH_SHUTDOWN) { 1592 break; 1593 } 1594 bp = sc->active_xfer; 1595 sc->active_xfer = NULL; 1596 if (bp != NULL) { 1597 1598 size_t sz = DEV_BSIZE, bnow; 1599 1600 DBGME(DEBUG_XFERS,printf("%s: task %p %x %p %qx %d (%zd)\n", device_xname(sc->sc_dev), bp, 1601 sc->sc_bio.flags, sc->sc_bio.databuf, sc->sc_bio.blkno, 1602 sc->sc_bio.nbytes, sc->sc_bio.nblks)); 1603 1604 sc->sc_bio.error = 0; 1605 for (; sc->sc_bio.nblks > 0;) { 1606 1607 bnow = sc->sc_bio.nblks; 1608 if (sc->sc_bio.flags & ATA_SINGLE) bnow = 1; 1609 1610 if (sc->sc_bio.flags & ATA_READ) { 1611 sc->sc_bio.error = 1612 eflash_read_at(sc, sc->sc_bio.blkno, sc->sc_bio.databuf, bnow, &sz); 1613 } else { 1614 sc->sc_bio.error = 1615 eflash_write_at(sc, sc->sc_bio.blkno, sc->sc_bio.databuf, bnow, &sz); 1616 } 1617 1618 if (sc->sc_bio.error) 1619 break; 1620 1621 sc->sc_bio.blkno += sz; /* in blocks */ 1622 sc->sc_bio.nblks -= sz; 1623 sc->sc_bio.blkdone += sz; 1624 sz = sz << DEV_BSHIFT; /* in bytes */ 1625 sc->sc_bio.databuf += sz; 1626 sc->sc_bio.nbytes -= sz; 1627 } 1628 1629 eflashdone(sc); 1630 } 1631 } 1632 1633 splx(s); 1634 sc->ch_thread = NULL; 1635 wakeup(&sc->ch_flags); 1636 1637 DBGME(DEBUG_STATUS,printf("%s: thread service terminated for %p\n", device_xname(sc->sc_dev), sc)); 1638 1639 kthread_exit(0); 1640 } 1641 1642 1643 /* 1644 * Read/write routine for a buffer. Validates the arguments and schedules the 1645 * transfer. Does not wait for the transfer to complete. 1646 */ 1647 void 1648 eflashstrategy(struct buf *bp) 1649 { 1650 struct eflash_softc *sc = device_lookup_private(&eflash_cd, EFLASHUNIT(bp->b_dev)); 1651 struct disklabel *lp = sc->sc_dk.dk_label; 1652 daddr_t blkno; 1653 int s; 1654 1655 DEBUG_PRINT(("%s: eflashstrategy %lld\n", device_xname(sc->sc_dev), bp->b_blkno), 1656 DEBUG_XFERS); 1657 1658 /* Valid request? */ 1659 if (bp->b_blkno < 0 || 1660 (bp->b_bcount % lp->d_secsize) != 0 || 1661 (bp->b_bcount / lp->d_secsize) >= (1 << NBBY)) { 1662 bp->b_error = EINVAL; 1663 goto done; 1664 } 1665 1666 /* If device invalidated (e.g. media change, door open), error. */ 1667 if ((sc->sc_flags & EFLASHF_LOADED) == 0) { 1668 bp->b_error = EIO; 1669 goto done; 1670 } 1671 1672 /* If it's a null transfer, return immediately. */ 1673 if (bp->b_bcount == 0) 1674 goto done; 1675 1676 /* 1677 * Do bounds checking, adjust transfer. if error, process. 1678 * If end of partition, just return. 1679 */ 1680 if (EFLASHPART(bp->b_dev) == RAW_PART) { 1681 if (bounds_check_with_mediasize(bp, DEV_BSIZE, 1682 sc->sc_capacity) <= 0) 1683 goto done; 1684 } else { 1685 if (bounds_check_with_label(&sc->sc_dk, bp, 1686 (sc->sc_flags & (EFLASHF_WLABEL|EFLASHF_LABELLING)) != 0) <= 0) 1687 goto done; 1688 } 1689 1690 /* 1691 * Now convert the block number to absolute and put it in 1692 * terms of the device's logical block size. 1693 */ 1694 if (lp->d_secsize >= DEV_BSIZE) 1695 blkno = bp->b_blkno / (lp->d_secsize / DEV_BSIZE); 1696 else 1697 blkno = bp->b_blkno * (DEV_BSIZE / lp->d_secsize); 1698 1699 if (EFLASHPART(bp->b_dev) != RAW_PART) 1700 blkno += lp->d_partitions[EFLASHPART(bp->b_dev)].p_offset; 1701 1702 bp->b_rawblkno = blkno; 1703 1704 /* Queue transfer on drive, activate drive and controller if idle. */ 1705 s = splbio(); 1706 bufq_put(sc->sc_q, bp); 1707 eflashstart(sc); 1708 splx(s); 1709 return; 1710 done: 1711 /* Toss transfer; we're done early. */ 1712 bp->b_resid = bp->b_bcount; 1713 biodone(bp); 1714 } 1715 1716 /* 1717 * Queue a drive for I/O. 1718 */ 1719 void 1720 eflashstart(void *arg) 1721 { 1722 struct eflash_softc *sc = arg; 1723 struct buf *bp = NULL; 1724 1725 DEBUG_PRINT(("%s: eflashstart\n", device_xname(sc->sc_dev)), 1726 DEBUG_XFERS); 1727 while (sc->openings > 0) { 1728 1729 /* Is there a buf for us ? */ 1730 if ((bp = bufq_get(sc->sc_q)) == NULL) 1731 return; 1732 1733 /* 1734 * Make the command. First lock the device 1735 */ 1736 sc->openings--; 1737 1738 sc->retries = 0; 1739 __eflashstart(sc, bp); 1740 } 1741 } 1742 1743 void 1744 __eflashstart(struct eflash_softc *sc, struct buf *bp) 1745 { 1746 DEBUG_PRINT(("%s: __eflashstart %p\n", device_xname(sc->sc_dev), bp), 1747 DEBUG_XFERS); 1748 1749 sc->sc_bp = bp; 1750 /* 1751 * If we're retrying, retry in single-sector mode. This will give us 1752 * the sector number of the problem, and will eventually allow the 1753 * transfer to succeed. 1754 */ 1755 if (sc->retries >= EFLASHIORETRIES_SINGLE) 1756 sc->sc_bio.flags = ATA_SINGLE; 1757 else 1758 sc->sc_bio.flags = 0; 1759 if (bp->b_flags & B_READ) 1760 sc->sc_bio.flags |= ATA_READ; 1761 sc->sc_bio.blkno = bp->b_rawblkno; 1762 sc->sc_bio.blkdone = 0; 1763 sc->sc_bio.nbytes = bp->b_bcount; 1764 sc->sc_bio.nblks = bp->b_bcount >> DEV_BSHIFT; 1765 sc->sc_bio.databuf = bp->b_data; 1766 /* Instrumentation. */ 1767 disk_busy(&sc->sc_dk); 1768 sc->active_xfer = bp; 1769 wakeup(&sc->ch_thread); 1770 } 1771 1772 void 1773 eflashdone(struct eflash_softc *sc) 1774 { 1775 struct buf *bp = sc->sc_bp; 1776 const char *errmsg; 1777 int do_perror = 0; 1778 1779 DEBUG_PRINT(("%s: eflashdone %p\n", device_xname(sc->sc_dev), bp), 1780 DEBUG_XFERS); 1781 1782 if (bp == NULL) 1783 return; 1784 1785 bp->b_resid = sc->sc_bio.nbytes; 1786 switch (sc->sc_bio.error) { 1787 case ETIMEDOUT: 1788 errmsg = "device timeout"; 1789 do_perror = 1; 1790 goto retry; 1791 case EBUSY: 1792 errmsg = "device stuck"; 1793 retry: /* Just reset and retry. Can we do more ? */ 1794 /*eflash_reset(sc);*/ 1795 diskerr(bp, "flash", errmsg, LOG_PRINTF, 1796 sc->sc_bio.blkdone, sc->sc_dk.dk_label); 1797 if (sc->retries < EFLASHIORETRIES) 1798 printf(", retrying"); 1799 printf("\n"); 1800 if (do_perror) 1801 eflashperror(sc); 1802 if (sc->retries < EFLASHIORETRIES) { 1803 sc->retries++; 1804 callout_reset(&sc->sc_restart_ch, RECOVERYTIME, 1805 eflashrestart, sc); 1806 return; 1807 } 1808 1809 bp->b_error = EIO; 1810 break; 1811 case 0: 1812 if ((sc->sc_bio.flags & ATA_CORR) || sc->retries > 0) 1813 printf("%s: soft error (corrected)\n", 1814 device_xname(sc->sc_dev)); 1815 break; 1816 case ENODEV: 1817 case E2BIG: 1818 bp->b_error = EIO; 1819 break; 1820 } 1821 disk_unbusy(&sc->sc_dk, (bp->b_bcount - bp->b_resid), 1822 (bp->b_flags & B_READ)); 1823 rnd_add_uint32(&sc->rnd_source, bp->b_blkno); 1824 biodone(bp); 1825 sc->openings++; 1826 eflashstart(sc); 1827 } 1828 1829 void 1830 eflashrestart(void *v) 1831 { 1832 struct eflash_softc *sc = v; 1833 struct buf *bp = sc->sc_bp; 1834 int s; 1835 DEBUG_PRINT(("%s: eflashrestart\n", device_xname(sc->sc_dev)), 1836 DEBUG_XFERS); 1837 1838 s = splbio(); 1839 __eflashstart(v, bp); 1840 splx(s); 1841 } 1842 1843 int 1844 eflashread(dev_t dev, struct uio *uio, int flags) 1845 { 1846 DEBUG_PRINT(("eflashread\n"), DEBUG_XFERS); 1847 return (physio(eflashstrategy, NULL, dev, B_READ, minphys, uio)); 1848 } 1849 1850 int 1851 eflashwrite(dev_t dev, struct uio *uio, int flags) 1852 { 1853 DEBUG_PRINT(("eflashwrite\n"), DEBUG_XFERS); 1854 return (physio(eflashstrategy, NULL, dev, B_WRITE, minphys, uio)); 1855 } 1856 1857 int 1858 eflashopen(dev_t dev, int flag, int fmt, struct lwp *l) 1859 { 1860 struct eflash_softc *sc; 1861 int part, error; 1862 1863 DEBUG_PRINT(("eflashopen %" PRIx64 "\n", dev), DEBUG_FUNCS); 1864 sc = device_lookup_private(&eflash_cd, EFLASHUNIT(dev)); 1865 if (sc == NULL) 1866 return (ENXIO); 1867 1868 if (! device_is_active(sc->sc_dev)) 1869 return (ENODEV); 1870 1871 part = EFLASHPART(dev); 1872 1873 mutex_enter(&sc->sc_dk.dk_openlock); 1874 1875 /* 1876 * If there are wedges, and this is not RAW_PART, then we 1877 * need to fail. 1878 */ 1879 if (sc->sc_dk.dk_nwedges != 0 && part != RAW_PART) { 1880 error = EBUSY; 1881 goto bad; 1882 } 1883 1884 if (sc->sc_dk.dk_openmask != 0) { 1885 /* 1886 * If any partition is open, but the disk has been invalidated, 1887 * disallow further opens. 1888 */ 1889 if ((sc->sc_flags & EFLASHF_LOADED) == 0) { 1890 error = EIO; 1891 goto bad; 1892 } 1893 } else { 1894 if ((sc->sc_flags & EFLASHF_LOADED) == 0) { 1895 sc->sc_flags |= EFLASHF_LOADED; 1896 1897 /* Load the partition info if not already loaded. */ 1898 eflashgetdisklabel(sc); 1899 } 1900 } 1901 1902 /* Check that the partition exists. */ 1903 if (part != RAW_PART && 1904 (part >= sc->sc_dk.dk_label->d_npartitions || 1905 sc->sc_dk.dk_label->d_partitions[part].p_fstype == FS_UNUSED)) { 1906 error = ENXIO; 1907 goto bad; 1908 } 1909 1910 /* Insure only one open at a time. */ 1911 switch (fmt) { 1912 case S_IFCHR: 1913 sc->sc_dk.dk_copenmask |= (1 << part); 1914 break; 1915 case S_IFBLK: 1916 sc->sc_dk.dk_bopenmask |= (1 << part); 1917 break; 1918 } 1919 sc->sc_dk.dk_openmask = 1920 sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask; 1921 1922 mutex_exit(&sc->sc_dk.dk_openlock); 1923 return 0; 1924 1925 bad: 1926 mutex_exit(&sc->sc_dk.dk_openlock); 1927 DEBUG_PRINT(("%s: eflashopen -> %d\n", device_xname(sc->sc_dev), error), 1928 DEBUG_XFERS); 1929 return error; 1930 } 1931 1932 int 1933 eflashclose(dev_t dev, int flag, int fmt, struct lwp *l) 1934 { 1935 struct eflash_softc *sc = device_lookup_private(&eflash_cd, EFLASHUNIT(dev)); 1936 int part = EFLASHPART(dev); 1937 1938 DEBUG_PRINT(("eflashclose %" PRIx64 "\n", dev), DEBUG_FUNCS); 1939 1940 mutex_enter(&sc->sc_dk.dk_openlock); 1941 1942 switch (fmt) { 1943 case S_IFCHR: 1944 sc->sc_dk.dk_copenmask &= ~(1 << part); 1945 break; 1946 case S_IFBLK: 1947 sc->sc_dk.dk_bopenmask &= ~(1 << part); 1948 break; 1949 } 1950 sc->sc_dk.dk_openmask = 1951 sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask; 1952 1953 if (sc->sc_dk.dk_openmask == 0) { 1954 1955 if (! (sc->sc_flags & EFLASHF_KLABEL)) 1956 sc->sc_flags &= ~EFLASHF_LOADED; 1957 1958 DEBUG_PRINT(("%s: eflashclose flg %x\n", device_xname(sc->sc_dev), sc->sc_flags), 1959 DEBUG_XFERS); 1960 1961 } 1962 1963 mutex_exit(&sc->sc_dk.dk_openlock); 1964 return 0; 1965 } 1966 1967 void 1968 eflashgetdefaultlabel(struct eflash_softc *sc, struct disklabel *lp) 1969 { 1970 1971 DEBUG_PRINT(("%s: eflashgetdefaultlabel\n", device_xname(sc->sc_dev)), DEBUG_FUNCS); 1972 memset(lp, 0, sizeof(struct disklabel)); 1973 1974 lp->d_secsize = DEV_BSIZE; 1975 lp->d_ntracks = 1; 1976 lp->d_nsectors = sc->sc_capacity; 1977 lp->d_ncylinders = 1; 1978 lp->d_secpercyl = lp->d_ntracks * lp->d_nsectors; 1979 1980 lp->d_type = DTYPE_ST506; /* ?!? */ 1981 1982 strncpy(lp->d_typename, ST506, 16); 1983 strncpy(lp->d_packname, "fictitious", 16); 1984 if (sc->sc_capacity > UINT32_MAX) 1985 lp->d_secperunit = UINT32_MAX; 1986 else 1987 lp->d_secperunit = sc->sc_capacity; 1988 lp->d_rpm = 3600; 1989 lp->d_interleave = 1; 1990 lp->d_flags = 0; 1991 1992 lp->d_partitions[RAW_PART].p_offset = 0; 1993 lp->d_partitions[RAW_PART].p_size = 1994 lp->d_secperunit * (lp->d_secsize / DEV_BSIZE); 1995 lp->d_partitions[RAW_PART].p_fstype = FS_UNUSED; 1996 lp->d_npartitions = RAW_PART + 1; 1997 1998 lp->d_magic = DISKMAGIC; 1999 lp->d_magic2 = DISKMAGIC; 2000 lp->d_checksum = dkcksum(lp); 2001 } 2002 2003 /* 2004 * Fabricate a default disk label, and try to read the correct one. 2005 */ 2006 void 2007 eflashgetdisklabel(struct eflash_softc *sc) 2008 { 2009 struct disklabel *lp = sc->sc_dk.dk_label; 2010 const char *errstring; 2011 2012 DEBUG_PRINT(("%s: eflashgetdisklabel\n", device_xname(sc->sc_dev)), DEBUG_FUNCS); 2013 2014 memset(sc->sc_dk.dk_cpulabel, 0, sizeof(struct cpu_disklabel)); 2015 2016 eflashgetdefaultlabel(sc, lp); 2017 2018 #ifdef HAS_BAD144_HANDLING 2019 sc->sc_bio.badsect[0] = -1; 2020 #endif 2021 2022 /* BUGBUG: maj==0?? why is this not EFLASHLABELDEV(??sc->sc_dev) */ 2023 errstring = readdisklabel(MAKEEFLASHDEV(0, device_unit(sc->sc_dev), 2024 RAW_PART), eflashstrategy, lp, 2025 sc->sc_dk.dk_cpulabel); 2026 if (errstring) { 2027 printf("%s: %s\n", device_xname(sc->sc_dev), errstring); 2028 return; 2029 } 2030 2031 #if DEBUG 2032 if (EFLASH_DEBUG(DEBUG_WRITES)) { 2033 int i, n = sc->sc_dk.dk_label->d_npartitions; 2034 printf("%s: %d parts\n", device_xname(sc->sc_dev), n); 2035 for (i = 0; i < n; i++) { 2036 printf("\t[%d]: t=%x s=%d o=%d\n", i, 2037 sc->sc_dk.dk_label->d_partitions[i].p_fstype, 2038 sc->sc_dk.dk_label->d_partitions[i].p_size, 2039 sc->sc_dk.dk_label->d_partitions[i].p_offset); 2040 } 2041 } 2042 #endif 2043 2044 #ifdef HAS_BAD144_HANDLING 2045 if ((lp->d_flags & D_BADSECT) != 0) 2046 bad144intern(sc); 2047 #endif 2048 } 2049 2050 void 2051 eflashperror(const struct eflash_softc *sc) 2052 { 2053 const char *devname = device_xname(sc->sc_dev); 2054 u_int32_t Status = sc->sc_bio.r_error; 2055 2056 printf("%s: (", devname); 2057 2058 if (Status == 0) 2059 printf("error not notified"); 2060 else 2061 printf("status=x%x", Status); 2062 2063 printf(")\n"); 2064 } 2065 2066 int 2067 eflashioctl(dev_t dev, u_long xfer, void *addr, int flag, struct lwp *l) 2068 { 2069 struct eflash_softc *sc = device_lookup_private(&eflash_cd, EFLASHUNIT(dev)); 2070 int error = 0, s; 2071 2072 DEBUG_PRINT(("eflashioctl(%lx)\n",xfer), DEBUG_FUNCS); 2073 2074 if ((sc->sc_flags & EFLASHF_LOADED) == 0) 2075 return EIO; 2076 2077 error = disk_ioctl(&sc->sc_dk, xfer, addr, flag, l); 2078 if (error != EPASSTHROUGH) 2079 return (error); 2080 2081 switch (xfer) { 2082 #ifdef HAS_BAD144_HANDLING 2083 case DIOCSBAD: 2084 if ((flag & FWRITE) == 0) 2085 return EBADF; 2086 sc->sc_dk.dk_cpulabel->bad = *(struct dkbad *)addr; 2087 sc->sc_dk.dk_label->d_flags |= D_BADSECT; 2088 bad144intern(sc); 2089 return 0; 2090 #endif 2091 case DIOCGDINFO: 2092 *(struct disklabel *)addr = *(sc->sc_dk.dk_label); 2093 return 0; 2094 2095 case DIOCGPART: 2096 ((struct partinfo *)addr)->disklab = sc->sc_dk.dk_label; 2097 ((struct partinfo *)addr)->part = 2098 &sc->sc_dk.dk_label->d_partitions[EFLASHPART(dev)]; 2099 return 0; 2100 2101 case DIOCWDINFO: 2102 case DIOCSDINFO: 2103 { 2104 struct disklabel *lp; 2105 2106 if ((flag & FWRITE) == 0) 2107 return EBADF; 2108 2109 lp = (struct disklabel *)addr; 2110 2111 mutex_enter(&sc->sc_dk.dk_openlock); 2112 sc->sc_flags |= EFLASHF_LABELLING; 2113 2114 error = setdisklabel(sc->sc_dk.dk_label, 2115 lp, /*sc->sc_dk.dk_openmask : */0, 2116 sc->sc_dk.dk_cpulabel); 2117 if (error == 0) { 2118 if (xfer == DIOCWDINFO) 2119 error = writedisklabel(EFLASHLABELDEV(dev), 2120 eflashstrategy, sc->sc_dk.dk_label, 2121 sc->sc_dk.dk_cpulabel); 2122 } 2123 2124 sc->sc_flags &= ~EFLASHF_LABELLING; 2125 mutex_exit(&sc->sc_dk.dk_openlock); 2126 return error; 2127 } 2128 2129 case DIOCKLABEL: 2130 if (*(int *)addr) 2131 sc->sc_flags |= EFLASHF_KLABEL; 2132 else 2133 sc->sc_flags &= ~EFLASHF_KLABEL; 2134 return 0; 2135 2136 case DIOCWLABEL: 2137 if ((flag & FWRITE) == 0) 2138 return EBADF; 2139 if (*(int *)addr) 2140 sc->sc_flags |= EFLASHF_WLABEL; 2141 else 2142 sc->sc_flags &= ~EFLASHF_WLABEL; 2143 return 0; 2144 2145 case DIOCGDEFLABEL: 2146 eflashgetdefaultlabel(sc, (struct disklabel *)addr); 2147 return 0; 2148 2149 case DIOCCACHESYNC: 2150 return 0; 2151 2152 case DIOCAWEDGE: 2153 { 2154 struct dkwedge_info *dkw = (void *) addr; 2155 2156 if ((flag & FWRITE) == 0) 2157 return (EBADF); 2158 2159 /* If the ioctl happens here, the parent is us. */ 2160 strcpy(dkw->dkw_parent, device_xname(sc->sc_dev)); 2161 return (dkwedge_add(dkw)); 2162 } 2163 2164 case DIOCDWEDGE: 2165 { 2166 struct dkwedge_info *dkw = (void *) addr; 2167 2168 if ((flag & FWRITE) == 0) 2169 return (EBADF); 2170 2171 /* If the ioctl happens here, the parent is us. */ 2172 strcpy(dkw->dkw_parent, device_xname(sc->sc_dev)); 2173 return (dkwedge_del(dkw)); 2174 } 2175 2176 case DIOCLWEDGES: 2177 { 2178 struct dkwedge_list *dkwl = (void *) addr; 2179 2180 return (dkwedge_list(&sc->sc_dk, dkwl, l)); 2181 } 2182 2183 case DIOCGSTRATEGY: 2184 { 2185 struct disk_strategy *dks = (void *)addr; 2186 2187 s = splbio(); 2188 strlcpy(dks->dks_name, bufq_getstrategyname(sc->sc_q), 2189 sizeof(dks->dks_name)); 2190 splx(s); 2191 dks->dks_paramlen = 0; 2192 2193 return 0; 2194 } 2195 2196 case DIOCSSTRATEGY: 2197 { 2198 struct disk_strategy *dks = (void *)addr; 2199 struct bufq_state *new; 2200 struct bufq_state *old; 2201 2202 if ((flag & FWRITE) == 0) { 2203 return EBADF; 2204 } 2205 if (dks->dks_param != NULL) { 2206 return EINVAL; 2207 } 2208 dks->dks_name[sizeof(dks->dks_name) - 1] = 0; /* ensure term */ 2209 error = bufq_alloc(&new, dks->dks_name, 2210 BUFQ_EXACT|BUFQ_SORT_RAWBLOCK); 2211 if (error) { 2212 return error; 2213 } 2214 s = splbio(); 2215 old = sc->sc_q; 2216 bufq_move(new, old); 2217 sc->sc_q = new; 2218 splx(s); 2219 bufq_free(old); 2220 2221 return 0; 2222 } 2223 2224 default: 2225 /* NB: we get a DIOCGWEDGEINFO, but nobody else handles it either */ 2226 DEBUG_PRINT(("eflashioctl: unsup x%lx\n", xfer), DEBUG_FUNCS); 2227 return ENOTTY; 2228 } 2229 } 2230 2231 int 2232 eflashsize(dev_t dev) 2233 { 2234 struct eflash_softc *sc; 2235 int part, omask; 2236 int size; 2237 2238 DEBUG_PRINT(("eflashsize\n"), DEBUG_FUNCS); 2239 2240 sc = device_lookup_private(&eflash_cd, EFLASHUNIT(dev)); 2241 if (sc == NULL) 2242 return (-1); 2243 2244 part = EFLASHPART(dev); 2245 omask = sc->sc_dk.dk_openmask & (1 << part); 2246 2247 if (omask == 0 && eflashopen(dev, 0, S_IFBLK, NULL) != 0) 2248 return (-1); 2249 if (sc->sc_dk.dk_label->d_partitions[part].p_fstype != FS_SWAP) 2250 size = -1; 2251 else 2252 size = sc->sc_dk.dk_label->d_partitions[part].p_size * 2253 (sc->sc_dk.dk_label->d_secsize / DEV_BSIZE); 2254 if (omask == 0 && eflashclose(dev, 0, S_IFBLK, NULL) != 0) 2255 return (-1); 2256 return (size); 2257 } 2258 2259 /* 2260 * Dump core after a system crash. 2261 */ 2262 int 2263 eflashdump(dev_t dev, daddr_t blkno, void *va, size_t size) 2264 { 2265 /* no we dont */ 2266 return (ENXIO); 2267 } 2268 2269 #ifdef HAS_BAD144_HANDLING 2270 /* 2271 * Internalize the bad sector table. 2272 */ 2273 void 2274 bad144intern(struct eflash_softc *sc) 2275 { 2276 struct dkbad *bt = &sc->sc_dk.dk_cpulabel->bad; 2277 struct disklabel *lp = sc->sc_dk.dk_label; 2278 int i = 0; 2279 2280 DEBUG_PRINT(("bad144intern\n"), DEBUG_XFERS); 2281 2282 for (; i < NBT_BAD; i++) { 2283 if (bt->bt_bad[i].bt_cyl == 0xffff) 2284 break; 2285 sc->sc_bio.badsect[i] = 2286 bt->bt_bad[i].bt_cyl * lp->d_secpercyl + 2287 (bt->bt_bad[i].bt_trksec >> 8) * lp->d_nsectors + 2288 (bt->bt_bad[i].bt_trksec & 0xff); 2289 } 2290 for (; i < NBT_BAD+1; i++) 2291 sc->sc_bio.badsect[i] = -1; 2292 } 2293 #endif 2294 2295 static void 2296 eflash_set_geometry(struct eflash_softc *sc) 2297 { 2298 struct disk_geom *dg = &sc->sc_dk.dk_geom; 2299 2300 memset(dg, 0, sizeof(*dg)); 2301 2302 dg->dg_secperunit = sc->sc_capacity; 2303 dg->dg_secsize = DEV_BSIZE /* XXX 512? */; 2304 dg->dg_nsectors = sc->sc_capacity; 2305 dg->dg_ntracks = 1; 2306 dg->dg_ncylinders = sc->sc_capacity; 2307 2308 disk_set_info(sc->sc_dev, &sc->sc_dk, ST506); 2309 } 2310