1 /* $NetBSD: flash_ebus.c,v 1.25 2023/12/20 06:36:03 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code was written by Alessandro Forin and Neil Pittman
8 * at Microsoft Research and contributed to The NetBSD Foundation
9 * by Microsoft Corporation.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
34 __KERNEL_RCSID(0, "$NetBSD: flash_ebus.c,v 1.25 2023/12/20 06:36:03 thorpej Exp $");
35
36 /* Driver for the Intel 28F320/640/128 (J3A150) StrataFlash memory device
37 * Extended to include the Intel JS28F256P30T95.
38 */
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/proc.h>
44 #include <sys/errno.h>
45 #include <sys/ioctl.h>
46 #include <sys/device.h>
47 #include <sys/conf.h>
48 #include <sys/file.h>
49 #include <sys/stat.h>
50 #include <sys/ioctl.h>
51 #include <sys/buf.h>
52 #include <sys/bufq.h>
53 #include <sys/uio.h>
54 #include <uvm/uvm_extern.h>
55 #include <sys/disklabel.h>
56 #include <sys/disk.h>
57 #include <sys/syslog.h>
58 #include <sys/vnode.h>
59 #include <sys/kthread.h>
60 #include <sys/lock.h>
61 #include <sys/queue.h>
62
63 #include <sys/rndsource.h>
64
65 #include "locators.h"
66 #include <prop/proplib.h>
67
68 #include <emips/ebus/ebusvar.h>
69 #include <emips/emips/machdep.h>
70 #include <machine/emipsreg.h>
71
72 /* Internal config switches
73 */
74 #define USE_BUFFERED_WRITES 0 /* Faster, but might not work in some (older) cases */
75 #define Verbose 0
76
77 /* Debug tools
78 */
79 #define DEBUG_INTR 0x01
80 #define DEBUG_XFERS 0x02
81 #define DEBUG_STATUS 0x04
82 #define DEBUG_FUNCS 0x08
83 #define DEBUG_PROBE 0x10
84 #define DEBUG_WRITES 0x20
85 #define DEBUG_READS 0x40
86 #define DEBUG_ERRORS 0x80
87 #ifdef DEBUG
88 int eflash_debug = DEBUG_ERRORS;
89 #define EFLASH_DEBUG(x) (eflash_debug & (x))
90 #define DBGME(_lev_,_x_) if ((_lev_) & eflash_debug) _x_
91 #else
92 #define EFLASH_DEBUG(x) (0)
93 #define DBGME(_lev_,_x_)
94 #endif
95 #define DEBUG_PRINT(_args_,_lev_) DBGME(_lev_,printf _args_)
96
97 /* Product ID codes
98 */
99 #define MANUF_INTEL 0x89
100 #define DEVICE_320 0x16
101 #define DEVICE_640 0x17
102 #define DEVICE_128 0x18
103 #define DEVICE_256 0x19
104
105 /* Table of chips we understand.
106 */
107 #define nDELTAS 3
108 struct flash_type {
109 struct {
110 uint32_t nSectors;
111 uint32_t nKB;
112 } ft_deltas[nDELTAS];
113 uint8_t ft_manuf_code;
114 uint8_t ft_device_code;
115 uint16_t ft_total_sectors;
116 const char *ft_name;
117 };
118
119 static const struct flash_type sector_maps[] = {
120 {
121 {{32,128},{0,0},},
122 MANUF_INTEL, DEVICE_320, 32, /* a J3 part */
123 "StrataFlash 28F320"
124 },
125 {
126 {{64,128},{0,0},},
127 MANUF_INTEL, DEVICE_640, 64, /* a J3 part */
128 "StrataFlash 28F640"
129 },
130 {
131 {{128,128},{0,0},},
132 MANUF_INTEL, DEVICE_128, 128, /* a J3 part */
133 "StrataFlash 28F128"
134 },
135 {
136 {{255,128},{4,32},{0,0}},
137 MANUF_INTEL, DEVICE_256, 259, /* a P30 part */
138 "StrataFlash 28F256"
139 }
140 };
141 #define nMAPS ((sizeof sector_maps) / (sizeof sector_maps[0]))
142
143 /* Instead of dragging in atavar.h.. */
144 struct eflash_bio {
145 volatile int flags;/* cmd flags */
146 #define ATA_POLL 0x0002 /* poll for completion */
147 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */
148 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */
149 #define ATA_CORR 0x0040 /* transfer had a corrected error */
150 daddr_t blkno; /* block addr */
151 daddr_t blkdone;/* number of blks transferred */
152 size_t nblks; /* number of blocks currently transferring */
153 size_t nbytes; /* number of bytes currently transferring */
154 char *databuf;/* data buffer address */
155 volatile int error;
156 u_int32_t r_error;/* copy of status register */
157 #ifdef HAS_BAD144_HANDLING
158 daddr_t badsect[127];/* 126 plus trailing -1 marker */
159 #endif
160 };
161 /* End of atavar.h*/
162
163 /* chip-specific functions
164 */
165 struct flash_ops;
166
167 /*
168 * Device softc
169 */
170 struct eflash_softc {
171 device_t sc_dev;
172
173 /* General disk infos */
174 struct disk sc_dk;
175 struct bufq_state *sc_q;
176 struct callout sc_restart_ch;
177
178 /* IDE disk soft states */
179 struct buf *sc_bp; /* buf being transferred */
180 struct buf *active_xfer; /* buf handoff to thread */
181 struct eflash_bio sc_bio; /* current transfer */
182
183 struct proc *ch_thread;
184 int ch_flags;
185 #define ATACH_SHUTDOWN 0x02 /* thread is shutting down */
186 #define ATACH_IRQ_WAIT 0x10 /* thread is waiting for irq */
187 #define ATACH_DISABLED 0x80 /* channel is disabled */
188 #define ATACH_TH_RUN 0x100 /* the kernel thread is working */
189 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */
190
191 int openings;
192 int sc_flags;
193 #define EFLASHF_WLABEL 0x004 /* label is writable */
194 #define EFLASHF_LABELLING 0x008 /* writing label */
195 #define EFLASHF_LOADED 0x010 /* parameters loaded */
196 #define EFLASHF_WAIT 0x020 /* waiting for resources */
197 #define EFLASHF_KLABEL 0x080 /* retain label after 'full' close */
198
199 int retries; /* number of xfer retry */
200
201 krndsource_t rnd_source;
202
203 /* flash-specific state */
204 struct _Flash *sc_dp;
205 uint32_t sc_size;
206 uint32_t sc_capacity;
207 paddr_t sc_base;
208 volatile uint8_t *sc_page0;
209
210 /* current read-write sector mapping */
211 /*volatile*/ uint8_t *sc_sector;
212 uint32_t sc_sector_size;
213 uint32_t sc_sector_offset;
214 #define NOSECTOR ((uint32_t)(~0))
215 int sc_erased;
216
217 /* device-specificity */
218 uint32_t sc_buffersize;
219 vsize_t sc_max_secsize;
220 unsigned int sc_chips;
221 const struct flash_ops *sc_ops;
222 struct flash_type sc_type;
223 };
224
225 static int eflash_ebus_match (device_t, cfdata_t, void *);
226 static void eflash_ebus_attach (device_t, device_t, void *);
227
228 CFATTACH_DECL_NEW(flash_ebus, sizeof (struct eflash_softc),
229 eflash_ebus_match, eflash_ebus_attach, NULL, NULL);
230
231 /* implementation decls */
232 static int flash_identify(struct eflash_softc*);
233 static int KBinSector(struct flash_type * SecMap, unsigned int SecNo);
234 static uint32_t SectorStart(struct flash_type * SecMap, int SecNo);
235 static unsigned int SectorNumber(struct flash_type * SecMap, uint32_t Offset);
236 static void eflash_thread(void *arg);
237 static int eflash_read_at (struct eflash_softc *sc, daddr_t start_sector, char *buffer,
238 size_t nblocks, size_t * pSizeRead);
239 static int eflash_write_at(struct eflash_softc *sc, daddr_t start_sector, char *buffer,
240 size_t nblocks, size_t * pSizeWritten);
241
242 /* Config functions
243 */
244 static int
eflash_ebus_match(device_t parent,cfdata_t match,void * aux)245 eflash_ebus_match(device_t parent, cfdata_t match, void *aux)
246 {
247 struct ebus_attach_args *ia = aux;
248 struct _Flash *f = (struct _Flash *)ia->ia_vaddr;
249
250 if (strcmp("flash", ia->ia_name) != 0)
251 return (0);
252 if ((f == NULL) ||
253 ((f->BaseAddressAndTag & FLASHBT_TAG) != PMTTAG_FLASH))
254 return (0);
255
256 return (1);
257 }
258
259 static void
eflash_ebus_attach(device_t parent,device_t self,void * aux)260 eflash_ebus_attach(device_t parent, device_t self, void *aux)
261 {
262 struct ebus_attach_args *ia =aux;
263 struct eflash_softc *sc = device_private(self);
264 uint32_t base, ctrl;
265 int error;
266
267 /* Plan.
268 * - mips_map_physmem() (with uncached) first page
269 * - keep it around since we need status ops
270 * - find what type it is.
271 * - then mips_map_physmem() each sector as needed.
272 */
273
274 sc->sc_dev = self;
275 sc->sc_dp = (struct _Flash*)ia->ia_vaddr;
276 base = sc->sc_dp->BaseAddressAndTag & FLASHBT_BASE;
277 ctrl = sc->sc_dp->Control;
278
279 sc->sc_size = ctrl & FLASHST_SIZE;
280 sc->sc_capacity = sc->sc_size / DEV_BSIZE;
281 sc->sc_base = base;
282 /* The chip is 16bit, so if we get 32bit there are two */
283 sc->sc_chips = (ctrl & FLASHST_BUS_32) ? 2 : 1;
284
285 /* Map the first page to see what chip we got */
286 sc->sc_page0 = (volatile uint8_t *) mips_map_physmem(base, PAGE_SIZE);
287
288 if (flash_identify(sc)) {
289 printf(" base %x: %dMB flash memory (%d x %s)\n", base, sc->sc_size >> 20,
290 sc->sc_chips, sc->sc_type.ft_name);
291 } else {
292 /* BUGBUG If we dont identify it stop the driver! */
293 printf(": unknown manufacturer id %x, device id %x\n",
294 sc->sc_type.ft_manuf_code, sc->sc_type.ft_device_code);
295 }
296
297 config_pending_incr(self);
298
299 error = kthread_create(PRI_NONE, 0, NULL,
300 eflash_thread, sc, NULL, "%s", device_xname(sc->sc_dev));
301 if (error)
302 aprint_error_dev(sc->sc_dev,
303 "unable to create kernel thread: error %d\n", error);
304 }
305
306 /* Implementation functions
307 */
308 /* Returns the size in KBytes of a given sector,
309 * or -1 for bad arguments.
310 */
KBinSector(struct flash_type * SecMap,unsigned int SecNo)311 static int KBinSector(struct flash_type * SecMap, unsigned int SecNo)
312 {
313 int i;
314
315 for (i = 0; i < nDELTAS; i++) {
316 if (SecNo < SecMap->ft_deltas[i].nSectors)
317 return SecMap->ft_deltas[i].nKB;
318 SecNo -= SecMap->ft_deltas[i].nSectors;
319 }
320
321 return -1;
322 }
323
324 #define SectorSize(_map_,_sector_) (1024 * KBinSector(_map_,_sector_))
325
326 /* Whats the starting offset of sector N
327 */
SectorStart(struct flash_type * SecMap,int SecNo)328 static uint32_t SectorStart(struct flash_type * SecMap, int SecNo)
329 {
330 int i;
331 uint32_t Offset = 0;
332
333 for (i = 0; i < nDELTAS; i++) {
334 if ((unsigned int)SecNo < SecMap->ft_deltas[i].nSectors)
335 return 1024 * (Offset + (SecMap->ft_deltas[i].nKB * SecNo));
336 SecNo -= SecMap->ft_deltas[i].nSectors;
337 Offset += SecMap->ft_deltas[i].nSectors * SecMap->ft_deltas[i].nKB;
338 }
339
340 return ~0;
341 }
342
343 /* What sector number corresponds to a given offset
344 */
SectorNumber(struct flash_type * SecMap,uint32_t Offset)345 static unsigned int SectorNumber(struct flash_type * SecMap, uint32_t Offset)
346 {
347 unsigned int i;
348 unsigned int SecNo = 0;
349
350 Offset /= 1024;
351 for (i = 0; i < nDELTAS; i++) {
352 if (Offset < (unsigned int)
353 ((SecMap->ft_deltas[i].nSectors * SecMap->ft_deltas[i].nKB)))
354 return SecNo + (Offset / SecMap->ft_deltas[i].nKB);
355 SecNo += SecMap->ft_deltas[i].nSectors;
356 Offset -= SecMap->ft_deltas[i].nSectors * SecMap->ft_deltas[i].nKB;
357 }
358
359 return ~0;
360 }
361
362 /*
363 * Semi-generic operations
364 */
365 struct flash_ops {
366 void (*write_uint8) (struct eflash_softc *sc, volatile void *Offset, uint8_t Value);
367 void (*read_uint8) (struct eflash_softc *sc, volatile void *Offset, uint8_t *Value);
368 void (*write_uint16) (struct eflash_softc *sc, volatile void *Offset, uint16_t Value);
369 void (*read_uint16) (struct eflash_softc *sc, volatile void *Offset, uint16_t *Value);
370 void (*write_uint32) (struct eflash_softc *sc, volatile void *Offset, uint32_t Value);
371 void (*read_uint32) (struct eflash_softc *sc, volatile void *Offset, uint32_t *Value);
372 int (*program_word) (struct eflash_softc *sc, volatile void *Offset, uint16_t *pValues,
373 int Verify, int *nWritten);
374 int (*program_buffer) (struct eflash_softc *sc, volatile void *Offset, uint16_t *pValues,
375 int Verify, int *nWritten);
376 };
377
378 /*
379 * Hardware access proper, single-chip
380 */
single_write_uint8(struct eflash_softc * sc,volatile void * Offset,uint8_t Value)381 static void single_write_uint8 (struct eflash_softc *sc,volatile void *Offset,uint8_t Value)
382 {
383 volatile uint8_t * Where = Offset;
384 *Where = Value;
385 }
386
single_read_uint8(struct eflash_softc * sc,volatile void * Offset,uint8_t * Value)387 static void single_read_uint8 (struct eflash_softc *sc,volatile void *Offset,uint8_t *Value)
388 {
389 volatile uint8_t * Where = Offset;
390 *Value = *Where;
391 }
392
single_write_uint16(struct eflash_softc * sc,volatile void * Offset,uint16_t Value)393 static void single_write_uint16 (struct eflash_softc *sc,volatile void *Offset,uint16_t Value)
394 {
395 volatile uint16_t * Where = Offset;
396 *Where = Value;
397 }
398
single_read_uint16(struct eflash_softc * sc,volatile void * Offset,uint16_t * Value)399 static void single_read_uint16 (struct eflash_softc *sc,volatile void *Offset,uint16_t *Value)
400 {
401 volatile uint16_t * Where = Offset;
402 *Value = *Where;
403 }
404
405 /* This one should not be used, probably */
single_write_uint32(struct eflash_softc * sc,volatile void * Offset,uint32_t Value)406 static void single_write_uint32 (struct eflash_softc *sc,volatile void *Offset,uint32_t Value)
407 {
408 #if 0
409 /* The chip cannot take back-to-back writes */
410 volatile uint32_t * Where = Offset;
411 *Where = Value;
412 #else
413 volatile uint8_t * Where = Offset;
414 uint16_t v0, v1;
415
416 /* Unfortunately, this is bytesex dependent */
417 #if (BYTE_ORDER == BIG_ENDIAN)
418 v1 = (uint16_t) Value;
419 v0 = (uint16_t) (Value >> 16);
420 #else
421 v0 = (uint16_t) Value;
422 v1 = (uint16_t) (Value >> 16);
423 #endif
424 single_write_uint16(sc,Where,v0);
425 single_write_uint16(sc,Where+2,v1);
426 #endif
427 }
428
single_read_uint32(struct eflash_softc * sc,volatile void * Offset,uint32_t * Value)429 static void single_read_uint32 (struct eflash_softc *sc,volatile void *Offset,uint32_t *Value)
430 {
431 /* back-to-back reads must be ok */
432 volatile uint32_t * Where = Offset;
433 *Value = *Where;
434 }
435
436 /*
437 * Hardware access proper, paired-chips
438 * NB: This set of ops assumes two chips in parallel on a 32bit bus,
439 * each operation is repeated in parallel to both chips
440 */
twin_write_uint8(struct eflash_softc * sc,volatile void * Offset,uint8_t Value)441 static void twin_write_uint8 (struct eflash_softc *sc,volatile void *Offset,uint8_t Value)
442 {
443 volatile uint32_t * Where = Offset;
444 uint32_t v = Value | ((uint32_t)Value << 16);
445
446 v = le32toh(v);
447 *Where = v;
448 }
449
twin_read_uint8(struct eflash_softc * sc,volatile void * Offset,uint8_t * Value)450 static void twin_read_uint8 (struct eflash_softc *sc,volatile void *Offset,uint8_t *Value)
451 {
452 volatile uint32_t * Where = Offset;
453 uint32_t v;
454 v = *Where;
455 v = le32toh(v);
456 *Value = (uint8_t) v;
457 }
458
459 /* This one should *not* be used, error-prone */
twin_write_uint16(struct eflash_softc * sc,volatile void * Offset,uint16_t Value)460 static void twin_write_uint16 (struct eflash_softc *sc,volatile void *Offset,uint16_t Value)
461 {
462 volatile uint16_t * Where = Offset;
463 *Where = Value;
464 }
465
twin_read_uint16(struct eflash_softc * sc,volatile void * Offset,uint16_t * Value)466 static void twin_read_uint16 (struct eflash_softc *sc,volatile void *Offset,uint16_t *Value)
467 {
468 volatile uint16_t * Where = Offset;
469 *Value = *Where;
470 }
471
twin_write_uint32(struct eflash_softc * sc,volatile void * Offset,uint32_t Value)472 static void twin_write_uint32 (struct eflash_softc *sc,volatile void *Offset,uint32_t Value)
473 {
474 volatile uint32_t * Where = Offset;
475 Value = le32toh(Value);
476 *Where = Value;
477 }
478
twin_read_uint32(struct eflash_softc * sc,volatile void * Offset,uint32_t * Value)479 static void twin_read_uint32 (struct eflash_softc *sc,volatile void *Offset,uint32_t *Value)
480 {
481 volatile uint32_t * Where = Offset;
482 uint32_t v;
483 v = *Where;
484 v = le32toh(v);
485 *Value = v;
486 }
487
488 /*
489 * Command and status definitions
490 */
491
492 /* Defines for the STATUS register
493 */
494 #define ST_reserved 0x01
495 #define ST_BLOCK_LOCKED 0x02
496 #define ST_PROGRAM_SUSPENDED 0x04
497 #define ST_LOW_VOLTAGE 0x08
498 #define ST_LOCK_BIT_ERROR 0x10
499 #define ST_ERASE_ERROR 0x20
500 #define ST_ERASE_SUSPENDED 0x40
501 #define ST_READY 0x80
502 #define ST_ERASE_MASK 0xee /* bits to check after erase command */
503 #define ST_MASK 0xfe /* ignore reserved */
504
505 /* Command set (what we use of it)
506 */
507 #define CMD_CONFIRM 0xd0
508 #define CMD_READ_ARRAY 0xff
509 #define CMD_READ_ID 0x90
510 #define CMD_READ_STATUS 0x70
511 #define CMD_CLEAR_STATUS 0x50
512 #define CMD_WRITE_WORD 0x40
513 #define CMD_WRITE_BUFFER 0xe8
514 #define CMD_ERASE_SETUP 0x20
515 #define CMD_ERASE_CONFIRM CMD_CONFIRM
516 #define CMD_SET_PREFIX 0x60 /* set read config, lock bits */
517 #define CMD_LOCK 0x01
518 #define CMD_UNLOCK CMD_CONFIRM
519 /* What we dont use of it
520 */
521 #define CMD_READ_QUERY 0x98
522 # define BUFFER_BYTES 32
523 #define CMD_ERASE_SUSPEND 0xb0
524 #define CMD_ERASE_RESUME CMD_CONFIRM
525 #define CMD_CONFIGURATION 0xb8
526 #define CMD_PROTECT 0xc0
527
528 /* Enter the Product ID mode (Read Identifier Codes)
529 */
ProductIdEnter(struct eflash_softc * sc)530 static void ProductIdEnter(struct eflash_softc *sc)
531 {
532 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_READ_ID);
533 }
534
535 /* Exit the Product ID mode (enter Read Array mode)
536 */
ProductIdExit(struct eflash_softc * sc)537 static void ProductIdExit(struct eflash_softc *sc)
538 {
539 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_READ_ARRAY);
540 }
541
542 /* Read the status register
543 */
ReadStatusRegister(struct eflash_softc * sc)544 static uint8_t ReadStatusRegister(struct eflash_softc *sc)
545 {
546 uint8_t Status;
547
548 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_READ_STATUS);
549 sc->sc_ops->read_uint8(sc,sc->sc_page0,&Status);
550 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_READ_ARRAY);
551 return Status;
552 }
553
554 /* Clear error bits in status
555 */
ClearStatusRegister(struct eflash_softc * sc)556 static void ClearStatusRegister(struct eflash_softc *sc)
557 {
558 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_CLEAR_STATUS);
559 }
560
561 #if DEBUG
562 /* Decode status bits
563 */
564 typedef const char *string;
565
PrintStatus(uint8_t Status)566 static void PrintStatus(uint8_t Status)
567 {
568 /* BUGBUG there's a %b format I think? */
569 string BitNames[8] = {
570 "reserved", "BLOCK_LOCKED",
571 "PROGRAM_SUSPENDED", "LOW_VOLTAGE",
572 "LOCK_BIT_ERROR", "ERASE_ERROR",
573 "ERASE_SUSPENDED", "READY"
574 };
575 int i;
576 int OneSet = FALSE;
577
578 printf("[status %x =",Status);
579 for (i = 0; i < 8; i++) {
580 if (Status & (1<<i)) {
581 printf("%c%s",
582 (OneSet) ? '|' : ' ',
583 BitNames[i]);
584 OneSet = TRUE;
585 }
586 }
587 printf("]\n");
588 }
589 #else
590 #define PrintStatus(x)
591 #endif
592
593 /*
594 * The device can lock up under certain conditions.
595 * There is no software workaround [must toggle RP# to GND]
596 * Check if it seems that we are in that state.
597 */
IsIrresponsive(struct eflash_softc * sc)598 static int IsIrresponsive(struct eflash_softc *sc)
599 {
600 uint8_t Status = ReadStatusRegister(sc);
601
602 if (Status & ST_READY)
603 return FALSE;
604
605 if ((Status & ST_MASK) ==
606 (ST_LOCK_BIT_ERROR|ST_ERASE_SUSPENDED|ST_ERASE_ERROR)) {
607 /* yes, looks that way */
608 return TRUE;
609 }
610
611 /* Something is indeed amiss, but we dont really know for sure */
612 PrintStatus(ReadStatusRegister(sc));
613 ClearStatusRegister(sc);
614 PrintStatus(ReadStatusRegister(sc));
615
616 if ((Status & ST_MASK) ==
617 (ST_LOCK_BIT_ERROR|ST_ERASE_SUSPENDED|ST_ERASE_ERROR)) {
618 /* yes, looks that way */
619 return TRUE;
620 }
621
622 return FALSE;
623 }
624
625
626 /* Write one 16bit word
627 */
628 static int
single_program_word(struct eflash_softc * sc,volatile void * Offset,uint16_t * Values,int Verify,int * nWritten)629 single_program_word(struct eflash_softc *sc, volatile void *Offset, uint16_t *Values,
630 int Verify, int *nWritten)
631 {
632 uint8_t Status;
633 uint16_t i, Data16, Value;
634
635 *nWritten = 0;
636
637 Value = Values[0];
638
639 if (Verify) {
640 sc->sc_ops->read_uint16(sc,Offset,&Data16);
641 #ifdef Verbose
642 if (Verbose) {
643 printf("Location %p was x%x\n",
644 Offset, Data16);
645 }
646 #endif
647 if (Data16 != 0xffff)
648 printf("Offset %p not ERASED, wont take.\n",Offset);
649 }
650
651 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_WRITE_WORD);
652 sc->sc_ops->write_uint16(sc,Offset,Value);
653
654 /* Wait until the operation is completed
655 * Specs say it takes between 210 and 630 us
656 * Errata says 360 TYP and Max=TBD (sic)
657 */
658 DELAY(800);
659
660 for (i = 0; i < 10; i++) {
661 sc->sc_ops->read_uint8(sc,Offset,&Status);
662 if ((Status & ST_READY)) break;
663 DELAY(100);
664 }
665
666 ProductIdExit(sc);
667
668 if (Verify) {
669 sc->sc_ops->read_uint16(sc,Offset,&Data16);
670 #ifdef Verbose
671 if (Verbose) {
672 printf("Location %p is now x%x\n",
673 Offset, Data16);
674 }
675 #endif
676 if ((Data16 != Value)) {
677 PrintStatus(Status);
678 printf(". That didnt work, try again.. [%x != %x]\n",
679 Data16, Value);
680 ClearStatusRegister(sc);
681 return FALSE;
682 }
683 }
684
685 *nWritten = 2;
686 return TRUE;
687 }
688
689 /* Write one buffer, 16bit words at a time
690 */
691 static int
single_program_buffer(struct eflash_softc * sc,volatile void * Offset,uint16_t * Values,int Verify,int * nWritten)692 single_program_buffer(struct eflash_softc *sc, volatile void *Offset, uint16_t *Values,
693 int Verify, int *nWritten)
694 {
695 uint8_t Status;
696 uint16_t i, Data16, Value = 0;
697 volatile uint8_t *Where = Offset;
698
699 *nWritten = 0;
700 if (sc->sc_buffersize == 0)
701 return FALSE; /* sanity */
702
703 if (Verify) {
704 for (i = 0; i < sc->sc_buffersize; i+= 2) {
705 sc->sc_ops->read_uint16(sc,Where+i,&Data16);
706 #ifdef Verbose
707 if (Verbose) {
708 printf("Location %p was x%x\n",
709 Where+i, Data16);
710 }
711 #endif
712
713 if (Data16 != 0xffff)
714 printf("Offset %p not ERASED, wont take.\n",Where+i);
715 }
716 }
717
718 /* Specs say to retry if necessary */
719 for (i = 0; i < 5; i++) {
720 sc->sc_ops->write_uint8(sc,Offset,CMD_WRITE_BUFFER);
721 DELAY(10);
722 sc->sc_ops->read_uint8(sc,Offset,&Status);
723 if ((Status & ST_READY)) break;
724 }
725 if (0 == (Status & ST_READY)) {
726 printf("FAILED program_buffer at Location %p, Status= x%x\n",
727 Offset, Status);
728 return FALSE;
729 }
730
731 /* Say how many words we'll be sending */
732 sc->sc_ops->write_uint8(sc,Offset,(uint8_t)(sc->sc_buffersize/2));
733
734 /* Send the data */
735 for (i = 0; i < sc->sc_buffersize; i+= 2) {
736 Value = Values[i/2];
737 sc->sc_ops->write_uint16(sc,Where+i,Value);
738 DELAY(10);/*jic*/
739 }
740
741 /* Write confirmation */
742 sc->sc_ops->write_uint8(sc,Offset,CMD_CONFIRM);
743
744 /* Wait until the operation is completed
745 * Specs say it takes between 800 and 2400 us
746 * Errata says 1600 TYP and Max=TBD (sic), but fixed in stepping A3 and above.
747 */
748 DELAY(800);
749
750 for (i = 0; i < 20; i++) {
751 sc->sc_ops->write_uint8(sc,Offset,CMD_READ_STATUS);
752 sc->sc_ops->read_uint8(sc,Offset,&Status);
753 if ((Status & ST_READY)) break;
754 DELAY(200);
755 }
756
757 ProductIdExit(sc);
758
759 /* Verify? */
760 if (Verify) {
761 for (i = 0; i < sc->sc_buffersize; i+= 2) {
762 sc->sc_ops->read_uint16(sc,Where+i,&Data16);
763 #ifdef Verbose
764 if (Verbose) {
765 printf("Location %p is now x%x\n",
766 Where+i, Data16);
767 }
768 #endif
769 Value = Values[i/2];
770
771 if ((Data16 != Value)) {
772 PrintStatus(Status);
773 printf(". That didnt work, try again.. [%x != %x]\n",
774 Data16, Value);
775 ClearStatusRegister(sc);
776 return FALSE;
777 }
778 }
779 }
780
781 *nWritten = sc->sc_buffersize;
782 return TRUE;
783 }
784
785 /* Write one 32bit word
786 */
787 static int
twin_program_word(struct eflash_softc * sc,volatile void * Offset,uint16_t * Values,int Verify,int * nWritten)788 twin_program_word(struct eflash_softc *sc, volatile void *Offset, uint16_t *Values,
789 int Verify, int *nWritten)
790 {
791 uint8_t Status;
792 uint32_t i, Data32, Value;
793 uint16_t v0, v1;
794
795 *nWritten = 0;
796
797 v0 = Values[0];
798 v0 = le16toh(v0);
799 v1 = Values[1];
800 v1 = le16toh(v1);
801 Value = v0 | ((uint32_t)v1 << 16);
802 if (Verify) {
803 sc->sc_ops->read_uint32(sc,Offset,&Data32);
804 #ifdef Verbose
805 if (Verbose) {
806 printf("Location %p was x%x\n",
807 Offset, Data32);
808 }
809 #endif
810 if (Data32 != 0xffffffff)
811 printf("Offset %p not ERASED, wont take.\n",Offset);
812 }
813
814 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_WRITE_WORD);
815 sc->sc_ops->write_uint32(sc,Offset,Value);
816
817 /* Wait until the operation is completed
818 * Specs say it takes between 210 and 630 us
819 * Errata says 360 TYP and Max=TBD (sic)
820 */
821 DELAY(400);
822
823 for (i = 0; i < 10; i++) {
824 sc->sc_ops->read_uint8(sc,Offset,&Status);
825 if ((Status & ST_READY)) break;
826 DELAY(100);
827 }
828
829 ProductIdExit(sc);
830
831 if (Verify) {
832 sc->sc_ops->read_uint32(sc,Offset,&Data32);
833 #ifdef Verbose
834 if (Verbose) {
835 printf("Location %p is now x%x\n",
836 Offset, Data32);
837 }
838 #endif
839 if ((Data32 != Value)) {
840 PrintStatus(Status);
841 printf(". That didnt work, try again.. [%x != %x]\n",
842 Data32, Value);
843 ClearStatusRegister(sc);
844 return FALSE;
845 }
846 }
847
848 *nWritten = 4;
849 return TRUE;
850 }
851
852 /* Write one buffer, 32bit words at a time
853 */
854 static int
twin_program_buffer(struct eflash_softc * sc,volatile void * Offset,uint16_t * Values,int Verify,int * nWritten)855 twin_program_buffer(struct eflash_softc *sc, volatile void *Offset, uint16_t *Values,
856 int Verify, int *nWritten)
857 {
858 uint8_t Status;
859 uint32_t i, Data32, Value;
860 uint16_t v0 = 0, v1;
861 volatile uint8_t *Where = Offset;
862
863 *nWritten = 0;
864 if (sc->sc_buffersize == 0)
865 return FALSE; /* sanity */
866
867 if (Verify) {
868 for (i = 0; i < sc->sc_buffersize; i+= 4) {
869 sc->sc_ops->read_uint32(sc,Where+i,&Data32);
870 #ifdef Verbose
871 if (Verbose) {
872 printf("Location %p was x%x\n",
873 Where+i, Data32);
874 }
875 #endif
876 if (Data32 != 0xffffffff)
877 printf("Offset %p not ERASED, wont take.\n",Where+i);
878 }
879 }
880
881 /* Specs say to retry if necessary */
882 for (i = 0; i < 5; i++) {
883 sc->sc_ops->write_uint8(sc,Offset,CMD_WRITE_BUFFER);
884 DELAY(10);
885 sc->sc_ops->read_uint8(sc,Offset,&Status);
886 if ((Status & ST_READY)) break;
887 }
888 if (0 == (Status & ST_READY)) {
889 printf("FAILED program_buffer at Location %p, Status= x%x\n",
890 Offset, Status);
891 return FALSE;
892 }
893
894 /* Say how many words we'll be sending */
895 sc->sc_ops->write_uint8(sc,Offset,(uint8_t)(sc->sc_buffersize/4)); /* to each twin! */
896
897 /* Send the data */
898 for (i = 0; i < sc->sc_buffersize; i+= 4) {
899 v0 = Values[i/2];
900 v0 = le16toh(v0);
901 v1 = Values[1+(i/2)];
902 v1 = le16toh(v1);
903 Value = v0 | ((uint32_t)v1 << 16);
904 sc->sc_ops->write_uint32(sc,Where+i,Value);
905 DELAY(10);/*jic*/
906 }
907
908 /* Write confirmation */
909 sc->sc_ops->write_uint8(sc,Offset,CMD_CONFIRM);
910
911 /* Wait until the operation is completed
912 * Specs say it takes between 800 and 2400 us
913 * Errata says 1600 TYP and Max=TBD (sic), but fixed in stepping A3 and above.
914 */
915 DELAY(800);
916
917 for (i = 0; i < 20; i++) {
918 sc->sc_ops->write_uint8(sc,Offset,CMD_READ_STATUS);
919 sc->sc_ops->read_uint8(sc,Offset,&Status);
920 if ((Status & ST_READY)) break;
921 DELAY(200);
922 }
923
924 ProductIdExit(sc);
925
926 /* Verify */
927 if (Verify) {
928 for (i = 0; i < sc->sc_buffersize; i+= 4) {
929 sc->sc_ops->read_uint32(sc,Where+i,&Data32);
930 #ifdef Verbose
931 if (Verbose) {
932 printf("Location %p is now x%x\n",
933 Where+i, Data32);
934 }
935 #endif
936 v0 = Values[i/2];
937 v0 = le16toh(v0);
938 v1 = Values[1+(i/2)];
939 v1 = le16toh(v1);
940 Value = v0 | ((uint32_t)v1 << 16);
941
942 if ((Data32 != Value)) {
943 PrintStatus(Status);
944 printf(". That didnt work, try again.. [%x != %x]\n",
945 Data32, Value);
946 ClearStatusRegister(sc);
947 return FALSE;
948 }
949 }
950 }
951
952 *nWritten = sc->sc_buffersize;
953 return TRUE;
954 }
955
956 /* Is there a lock on a given sector
957 */
IsSectorLocked(struct eflash_softc * sc,uint8_t * secptr)958 static int IsSectorLocked(struct eflash_softc *sc, uint8_t *secptr)
959 {
960 uint8_t Data, Data1;
961
962 ProductIdEnter(sc);
963 /* Lockout info is at address 2 of the given sector, meaning A0=0 A1=1.
964 */
965 sc->sc_ops->read_uint8(sc,secptr+(0x0002*2*sc->sc_chips),&Data);
966 sc->sc_ops->read_uint8(sc,secptr+(0x0003*2*sc->sc_chips),&Data1);
967
968 ProductIdExit(sc);
969
970 return (Data & 1);
971 }
972
973 /* Remove the write-lock to a sector
974 */
SectorUnLock(struct eflash_softc * sc,uint8_t * secptr)975 static void SectorUnLock(struct eflash_softc *sc, uint8_t *secptr)
976 {
977 uint8_t Status;
978 int i;
979
980 DBGME(DEBUG_FUNCS,printf("%s: Unlocking sector %d [ptr %p] ...\n",
981 device_xname(sc->sc_dev), sc->sc_sector_offset, secptr));
982
983 sc->sc_ops->write_uint8(sc,sc->sc_page0,CMD_SET_PREFIX);
984 sc->sc_ops->write_uint8(sc,secptr,CMD_UNLOCK);
985
986 /* Wait until the unlock is complete.
987 * Specs say this takes between 64 and 75 usecs.
988 */
989 DELAY(100);
990
991 for (i = 0; i < 10; i++) {
992 sc->sc_ops->read_uint8(sc,secptr,&Status);
993 if ((Status & ST_READY)) break;
994 DELAY(100);
995 }
996
997 ProductIdExit(sc);
998
999 if ((Status & ST_MASK) == ST_READY) {
1000 DBGME(DEBUG_FUNCS,printf("%s: Unlocked ok.\n",
1001 device_xname(sc->sc_dev)));
1002 return;
1003 }
1004
1005 PrintStatus(Status);
1006 DBGME(DEBUG_ERRORS,printf("%s: Unlock of sector %d NOT completed (status=%x).\n",
1007 device_xname(sc->sc_dev),
1008 sc->sc_sector_offset, Status));
1009 ClearStatusRegister(sc);
1010 }
1011
1012
1013 /* Erase one sector
1014 */
SectorErase(struct eflash_softc * sc,void * secptr)1015 static int SectorErase(struct eflash_softc *sc, void *secptr)
1016 {
1017 uint8_t Status = 0;
1018 uint16_t i;
1019
1020 DBGME(DEBUG_FUNCS,printf("%s: Erasing sector %d [ptr %p] ...\n",
1021 device_xname(sc->sc_dev), sc->sc_sector_offset, secptr));
1022
1023 /* On some chips we just cannot avoid the locking business.
1024 */
1025 if ((sc->sc_chips == 1) &&
1026 IsSectorLocked(sc,secptr))
1027 SectorUnLock(sc,secptr);
1028
1029 sc->sc_ops->write_uint8(sc,secptr,CMD_ERASE_SETUP);
1030 sc->sc_ops->write_uint8(sc,secptr,CMD_ERASE_CONFIRM);
1031
1032 /* Wait until the erase is actually completed
1033 * Specs say it will take between 1 and 5 seconds.
1034 * Errata says it takes 2 sec min and 25 sec max.
1035 * Double that before giving up.
1036 */
1037 for (i = 0; i < 20; i++) {
1038 /* Sleep for at least 2 seconds
1039 */
1040 tsleep(sc,PWAIT,"erase", hz * 2);
1041
1042 sc->sc_ops->read_uint8(sc,secptr,&Status);
1043 if ((Status & ST_READY)) break;
1044 PrintStatus(Status);
1045 }
1046
1047 ProductIdExit(sc);
1048
1049 if ((Status & ST_ERASE_MASK) == ST_READY) {
1050 DBGME(DEBUG_FUNCS,printf("%s: Erased ok.\n", device_xname(sc->sc_dev)));
1051 return 0;
1052 }
1053
1054 PrintStatus(Status);
1055 DBGME(DEBUG_ERRORS,printf("%s: Erase of sector %d NOT completed (status=%x).\n",
1056 device_xname(sc->sc_dev),
1057 sc->sc_sector_offset, Status));
1058
1059 ClearStatusRegister(sc);
1060 return EIO;
1061 }
1062
1063
1064
1065 /* Write (a portion of) a sector
1066 */
eflash_write_sector(struct eflash_softc * sc,char * Buffer,size_t n,uint8_t * Offset,int Verify)1067 static size_t eflash_write_sector(struct eflash_softc *sc, char *Buffer, size_t n,
1068 uint8_t *Offset, int Verify)
1069 {
1070 size_t i;
1071
1072 /* Make sure the device is not screwed up
1073 */
1074 if (IsIrresponsive(sc)) {
1075 printf("FLASH is locked-up (or mapped cacheable?), wont work. ");
1076 }
1077
1078 for (i = 0; i < n;) {
1079 int nTries;
1080 int nWritten = 0;/*we expect 2 or 4 */
1081
1082 if (sc->sc_buffersize && ((n-i) >= sc->sc_buffersize)) {
1083 for (nTries = 0; nTries < 5; nTries++)
1084 if (sc->sc_ops->program_buffer(sc,Offset,(uint16_t*)(Buffer+i),Verify,&nWritten))
1085 break;
1086 } else {
1087 for (nTries = 0; nTries < 5; nTries++)
1088 if (sc->sc_ops->program_word(sc,Offset,(uint16_t*)(Buffer+i),Verify,&nWritten))
1089 break;
1090 }
1091 Offset += nWritten;
1092 i += nWritten;
1093 if (nWritten == 0)
1094 break;
1095 }
1096 return i;
1097 }
1098
1099 /* Identify type and the sector map of the FLASH.
1100 * Argument is the base address of the device and the count of chips on the bus (1/2)
1101 * Returns FALSE if failed
1102 */
1103 static const struct flash_ops single_ops = {
1104 single_write_uint8,
1105 single_read_uint8,
1106 single_write_uint16,
1107 single_read_uint16,
1108 single_write_uint32,
1109 single_read_uint32,
1110 single_program_word,
1111 single_program_buffer
1112 };
1113
1114 static const struct flash_ops twin_ops = {
1115 twin_write_uint8,
1116 twin_read_uint8,
1117 twin_write_uint16,
1118 twin_read_uint16,
1119 twin_write_uint32,
1120 twin_read_uint32,
1121 twin_program_word,
1122 twin_program_buffer
1123 };
1124
flash_identify(struct eflash_softc * sc)1125 static int flash_identify(struct eflash_softc *sc)
1126 {
1127 uint8_t Mid, Did;
1128 int i;
1129
1130 if (sc->sc_chips > 1)
1131 sc->sc_ops = &twin_ops;
1132 else
1133 sc->sc_ops = &single_ops;
1134
1135 sc->sc_buffersize = 0;
1136 #if USE_BUFFERED_WRITES
1137 sc->sc_buffersize = BUFFER_BYTES * sc->sc_chips;
1138 #endif
1139 sc->sc_sector = NULL;
1140 sc->sc_sector_size = 0;
1141 sc->sc_sector_offset = NOSECTOR;
1142 sc->sc_erased = FALSE;
1143
1144 ProductIdEnter(sc);
1145 sc->sc_ops->read_uint8(sc,sc->sc_page0+(0x0000*2*sc->sc_chips),&Mid);
1146 sc->sc_ops->read_uint8(sc,sc->sc_page0+(0x0001*2*sc->sc_chips),&Did);
1147 ProductIdExit(sc);
1148
1149 sc->sc_type.ft_manuf_code = Mid;
1150 sc->sc_type.ft_device_code = Did;
1151
1152 for (i = 0; i < nMAPS; i++) {
1153 if ((sector_maps[i].ft_manuf_code == Mid) && (sector_maps[i].ft_device_code == Did)) {
1154 int j;
1155 uint32_t ms = 0;
1156 sc->sc_type = sector_maps[i];
1157 /* double the sector sizes if twin-chips */
1158 for (j = 0; j < nDELTAS; j++) {
1159 sc->sc_type.ft_deltas[j].nKB *= sc->sc_chips;
1160 if (ms < sc->sc_type.ft_deltas[j].nKB)
1161 ms = sc->sc_type.ft_deltas[j].nKB;
1162 }
1163 sc->sc_max_secsize = ms * 1024;
1164 return TRUE;
1165 }
1166 }
1167
1168 return FALSE;
1169 }
1170
1171 /* Common code for read&write argument validation
1172 */
eflash_validate(struct eflash_softc * sc,daddr_t start,size_t * pSize,void ** pSrc)1173 static int eflash_validate(struct eflash_softc *sc, daddr_t start, size_t *pSize, void **pSrc)
1174 {
1175 daddr_t Size;
1176 uint32_t sec;
1177 size_t secsize, secstart;
1178
1179 /* Validate args
1180 */
1181 if (start >= sc->sc_capacity) {
1182 *pSize = 0;
1183 DBGME(DEBUG_ERRORS,printf("eflash::ValidateArg(%qx) EOF\n", start));
1184 return E2BIG;
1185 }
1186
1187 /* Map sector if not already
1188 */
1189 sec = SectorNumber(&sc->sc_type, start << DEV_BSHIFT);
1190 secsize = SectorSize( &sc->sc_type, sec);
1191 secstart = SectorStart(&sc->sc_type,sec);
1192 if (sec != sc->sc_sector_offset) {
1193 int error;
1194
1195 /* unmap previous first */
1196 if (sc->sc_sector_offset != NOSECTOR) {
1197 DBGME(DEBUG_FUNCS,printf("%s: unmap %p %zx\n",
1198 device_xname(sc->sc_dev), sc->sc_sector, sc->sc_sector_size));
1199 iounaccess((vaddr_t)sc->sc_sector, sc->sc_sector_size);
1200 sc->sc_sector_offset = NOSECTOR;
1201 }
1202
1203 /* map new */
1204 error = ioaccess((vaddr_t)sc->sc_sector,
1205 secstart + sc->sc_base,
1206 secsize);
1207 DBGME(DEBUG_FUNCS,printf("%s: mapped %p %zx -> %zx %d\n",
1208 device_xname(sc->sc_dev),
1209 sc->sc_sector, secsize, secstart + sc->sc_base,error));
1210 if (error) return error;
1211
1212 /* Update state. We have to assume the sector was not erased. Sigh. */
1213 sc->sc_sector_offset = sec;
1214 sc->sc_sector_size = secsize;
1215 sc->sc_erased = FALSE;
1216 }
1217
1218 /* Adjust size if necessary
1219 */
1220 Size = start + *pSize; /* last sector */
1221 if (Size > sc->sc_capacity) {
1222 /* At most this many sectors
1223 */
1224 Size = sc->sc_capacity - start;
1225 *pSize = (size_t)Size;
1226 }
1227 if (*pSize > (secsize >> DEV_BSHIFT)) {
1228 *pSize = secsize >> DEV_BSHIFT;
1229 }
1230
1231 *pSrc = sc->sc_sector + (start << DEV_BSHIFT) - secstart;
1232
1233 DBGME(DEBUG_FUNCS,printf("%s: Validate %qx %zd %p\n",
1234 device_xname(sc->sc_dev), start,*pSize, *pSrc));
1235 return 0;
1236 }
1237
eflash_read_at(struct eflash_softc * sc,daddr_t start_sector,char * buffer,size_t nblocks,size_t * pSizeRead)1238 static int eflash_read_at (struct eflash_softc *sc,
1239 daddr_t start_sector, char *buffer, size_t nblocks,
1240 size_t * pSizeRead)
1241 {
1242 int error;
1243 uint32_t SizeRead = 0;
1244 void *src;
1245
1246 DBGME(DEBUG_XFERS|DEBUG_READS,printf("%s: EflashReadAt(%qx %p %zd %p)\n",
1247 device_xname(sc->sc_dev), start_sector, buffer, nblocks, pSizeRead));
1248
1249 /* Validate & trim arguments
1250 */
1251 error = eflash_validate(sc, start_sector, &nblocks, &src);
1252
1253 /* Copy data if
1254 */
1255 if (error == 0) {
1256 SizeRead = nblocks;
1257 memcpy(buffer, src, nblocks << DEV_BSHIFT);
1258 }
1259
1260 if (pSizeRead)
1261 *pSizeRead = SizeRead;
1262 return error;
1263 }
1264
1265 /* Write SIZE bytes to device.
1266 */
eflash_write_at(struct eflash_softc * sc,daddr_t start_sector,char * buffer,size_t nblocks,size_t * pSizeWritten)1267 static int eflash_write_at (struct eflash_softc *sc,
1268 daddr_t start_sector, char *buffer, size_t nblocks,
1269 size_t * pSizeWritten)
1270 {
1271 int error;
1272 void *src;
1273 size_t SizeWritten = 0;
1274
1275 DBGME(DEBUG_XFERS|DEBUG_WRITES,printf("%s: EflashWriteAt(%qx %p %zd %p)\n",
1276 device_xname(sc->sc_dev), start_sector, buffer, nblocks, pSizeWritten));
1277
1278 /* Validate & trim arguments
1279 */
1280 error = eflash_validate(sc, start_sector, &nblocks, &src);
1281
1282 if (error == 0) {
1283 /* Do we have to erase it */
1284 if (! sc->sc_erased) {
1285
1286 error = SectorErase(sc,src);
1287 if (error)
1288 goto Out;
1289 sc->sc_erased = TRUE;
1290 }
1291 SizeWritten = eflash_write_sector(sc, buffer, nblocks << DEV_BSHIFT, src, TRUE);
1292 SizeWritten >>= DEV_BSHIFT;
1293 }
1294
1295 Out:
1296 if (pSizeWritten)
1297 *pSizeWritten = SizeWritten;
1298 return error;
1299 }
1300
1301 /* Rest of code lifted with mods from the dev\ata\wd.c driver
1302 */
1303
1304 /*
1305 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved.
1306 *
1307 * Redistribution and use in source and binary forms, with or without
1308 * modification, are permitted provided that the following conditions
1309 * are met:
1310 * 1. Redistributions of source code must retain the above copyright
1311 * notice, this list of conditions and the following disclaimer.
1312 * 2. Redistributions in binary form must reproduce the above copyright
1313 * notice, this list of conditions and the following disclaimer in the
1314 * documentation and/or other materials provided with the distribution.
1315 *
1316 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1317 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1318 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1319 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1320 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1321 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
1322 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
1323 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1324 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1325 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1326 */
1327
1328 /*-
1329 * Copyright (c) 1998, 2003, 2004 The NetBSD Foundation, Inc.
1330 * All rights reserved.
1331 *
1332 * This code is derived from software contributed to The NetBSD Foundation
1333 * by Charles M. Hannum and by Onno van der Linden.
1334 *
1335 * Redistribution and use in source and binary forms, with or without
1336 * modification, are permitted provided that the following conditions
1337 * are met:
1338 * 1. Redistributions of source code must retain the above copyright
1339 * notice, this list of conditions and the following disclaimer.
1340 * 2. Redistributions in binary form must reproduce the above copyright
1341 * notice, this list of conditions and the following disclaimer in the
1342 * documentation and/or other materials provided with the distribution.
1343 *
1344 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
1345 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
1346 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
1347 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
1348 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1349 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1350 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1351 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1352 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1353 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1354 * POSSIBILITY OF SUCH DAMAGE.
1355 */
1356
1357 static const char ST506[] = "ST506";
1358
1359 #define EFLASHIORETRIES_SINGLE 4 /* number of retries before single-sector */
1360 #define EFLASHIORETRIES 5 /* number of retries before giving up */
1361 #define RECOVERYTIME hz/2 /* time to wait before retrying a cmd */
1362
1363 #define EFLASHUNIT(dev) DISKUNIT(dev)
1364 #define EFLASHPART(dev) DISKPART(dev)
1365 #define EFLASHMINOR(unit, part) DISKMINOR(unit, part)
1366 #define MAKEEFLASHDEV(maj, unit, part) MAKEDISKDEV(maj, unit, part)
1367
1368 #define EFLASHLABELDEV(dev) (MAKEEFLASHDEV(major(dev), EFLASHUNIT(dev), RAW_PART))
1369
1370 void eflashperror(const struct eflash_softc *);
1371
1372 extern struct cfdriver eflash_cd;
1373
1374 dev_type_open(eflashopen);
1375 dev_type_close(eflashclose);
1376 dev_type_read(eflashread);
1377 dev_type_write(eflashwrite);
1378 dev_type_ioctl(eflashioctl);
1379 dev_type_strategy(eflashstrategy);
1380 dev_type_dump(eflashdump);
1381 dev_type_size(eflashsize);
1382
1383 const struct bdevsw eflash_bdevsw = {
1384 .d_open = eflashopen,
1385 .d_close = eflashclose,
1386 .d_strategy = eflashstrategy,
1387 .d_ioctl = eflashioctl,
1388 .d_dump = eflashdump,
1389 .d_psize = eflashsize,
1390 .d_discard = nodiscard,
1391 .d_flag = D_DISK
1392 };
1393
1394 const struct cdevsw eflash_cdevsw = {
1395 .d_open = eflashopen,
1396 .d_close = eflashclose,
1397 .d_read = eflashread,
1398 .d_write = eflashwrite,
1399 .d_ioctl = eflashioctl,
1400 .d_stop = nostop,
1401 .d_tty = notty,
1402 .d_poll = nopoll,
1403 .d_mmap = nommap,
1404 .d_kqfilter = nokqfilter,
1405 .d_discard = nodiscard,
1406 .d_flag = D_DISK
1407 };
1408
1409 void eflashgetdefaultlabel(struct eflash_softc *, struct disklabel *);
1410 void eflashgetdisklabel(struct eflash_softc *);
1411 void eflashstart(void *);
1412 void __eflashstart(struct eflash_softc *, struct buf *);
1413 void eflashrestart(void *);
1414 void eflashattach(struct eflash_softc *);
1415 int eflashdetach(device_t, int);
1416 int eflashactivate(device_t, enum devact);
1417
1418 void eflashdone(struct eflash_softc *);
1419 static void eflash_set_geometry(struct eflash_softc *sc);
1420
1421 struct dkdriver eflashdkdriver = {
1422 .d_strategy = eflashstrategy,
1423 .d_minphys = minphys
1424 };
1425
1426 #ifdef HAS_BAD144_HANDLING
1427 static void bad144intern(struct eflash_softc *);
1428 #endif
1429
1430 static void eflash_wedges(void *arg);
1431
1432 void
eflashattach(struct eflash_softc * sc)1433 eflashattach(struct eflash_softc *sc)
1434 {
1435 device_t self = sc->sc_dev;
1436 char pbuf[9];
1437 DEBUG_PRINT(("%s: eflashattach\n", device_xname(sc->sc_dev)), DEBUG_FUNCS | DEBUG_PROBE);
1438
1439 callout_init(&sc->sc_restart_ch, 0);
1440 bufq_alloc(&sc->sc_q, BUFQ_DISK_DEFAULT_STRAT, BUFQ_SORT_RAWBLOCK);
1441
1442 sc->openings = 1; /* wazziz?*/
1443
1444 aprint_naive("\n");
1445
1446 /* setup all required fields so that if the attach fails we are ok */
1447 sc->sc_dk.dk_driver = &eflashdkdriver;
1448 sc->sc_dk.dk_name = device_xname(sc->sc_dev);
1449
1450 format_bytes(pbuf, sizeof(pbuf), sc->sc_capacity * DEV_BSIZE);
1451 aprint_normal("%s: %s, %d cyl, %d head, %d sec, %d bytes/sect x %llu sectors\n",
1452 device_xname(self), pbuf, 1, 1, sc->sc_capacity,
1453 DEV_BSIZE, (unsigned long long)sc->sc_capacity);
1454
1455 eflash_set_geometry(sc);
1456
1457 /*
1458 * Attach the disk structure. We fill in dk_info later.
1459 */
1460 disk_attach(&sc->sc_dk);
1461
1462 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
1463 RND_TYPE_DISK, RND_FLAG_DEFAULT);
1464
1465 }
1466
1467 int
eflashactivate(device_t self,enum devact act)1468 eflashactivate(device_t self, enum devact act)
1469 {
1470 int rv = 0;
1471
1472 DEBUG_PRINT(("eflashactivate %x\n", act), DEBUG_FUNCS | DEBUG_PROBE);
1473
1474 switch (act) {
1475 case DVACT_DEACTIVATE:
1476 /*
1477 * Nothing to do; we key off the device's DVF_ACTIVATE.
1478 */
1479 break;
1480 default:
1481 rv = EOPNOTSUPP;
1482 break;
1483 }
1484 return (rv);
1485 }
1486
1487 int
eflashdetach(device_t self,int flags)1488 eflashdetach(device_t self, int flags)
1489 {
1490 struct eflash_softc *sc = device_private(self);
1491 int s, bmaj, cmaj, i, mn;
1492
1493 DEBUG_PRINT(("%s: eflashdetach\n", device_xname(sc->sc_dev)), DEBUG_FUNCS | DEBUG_PROBE);
1494
1495 /* locate the major number */
1496 bmaj = bdevsw_lookup_major(&eflash_bdevsw);
1497 cmaj = cdevsw_lookup_major(&eflash_cdevsw);
1498
1499 /* Nuke the vnodes for any open instances. */
1500 for (i = 0; i < MAXPARTITIONS; i++) {
1501 mn = EFLASHMINOR(device_unit(self), i);
1502 vdevgone(bmaj, mn, mn, VBLK);
1503 vdevgone(cmaj, mn, mn, VCHR);
1504 }
1505
1506 /* Delete all of our wedges. */
1507 dkwedge_delall(&sc->sc_dk);
1508
1509 s = splbio();
1510
1511 /* Kill off any queued buffers. */
1512 bufq_drain(sc->sc_q);
1513
1514 /*sc->atabus->ata_killpending(sc->drvp);*/
1515
1516 splx(s);
1517 bufq_free(sc->sc_q);
1518
1519 /* Detach disk. */
1520 disk_detach(&sc->sc_dk);
1521
1522 /* Unhook the entropy source. */
1523 rnd_detach_source(&sc->rnd_source);
1524
1525 /*sc->drvp->drive_flags = 0; -- no drive any more here */
1526
1527 return (0);
1528 }
1529
1530 extern int dkwedge_autodiscover;
1531
1532 /* Aux temp thread to avoid deadlock when doing the partitio.. ahem wedges thing.
1533 */
1534 static void
eflash_wedges(void * arg)1535 eflash_wedges(void *arg)
1536 {
1537 struct eflash_softc *sc = (struct eflash_softc*)arg;
1538
1539 DBGME(DEBUG_STATUS,printf("%s: wedges started for %p\n", sc->sc_dk.dk_name, sc));
1540
1541 /* Discover wedges on this disk. */
1542 dkwedge_autodiscover = 1;
1543 dkwedge_discover(&sc->sc_dk);
1544
1545 config_pending_decr(sc->sc_dev);
1546
1547 DBGME(DEBUG_STATUS,printf("%s: wedges thread done for %p\n", device_xname(sc->sc_dev), sc));
1548 kthread_exit(0);
1549 }
1550
1551 static void
eflash_thread(void * arg)1552 eflash_thread(void *arg)
1553 {
1554 struct eflash_softc *sc = (struct eflash_softc*)arg;
1555 struct buf *bp;
1556 vaddr_t addr;
1557 int s, error;
1558
1559 DBGME(DEBUG_STATUS,printf("%s: thread started for %p\n", device_xname(sc->sc_dev), sc));
1560
1561 s = splbio();
1562 eflashattach(sc);
1563 splx(s);
1564
1565 /* Allocate a VM window large enough to map the largest sector
1566 * BUGBUG We could risk it and allocate/free on open/close?
1567 */
1568 addr = uvm_km_alloc(kernel_map, sc->sc_max_secsize, 0, UVM_KMF_VAONLY);
1569 if (addr == 0)
1570 panic("eflash_thread: kernel map full (%lx)", (long unsigned)sc->sc_max_secsize);
1571 sc->sc_sector = (/*volatile*/ uint8_t *) addr;
1572 sc->sc_sector_size = 0;
1573 sc->sc_sector_offset = NOSECTOR;
1574
1575 error = kthread_create(PRI_NONE, 0, NULL,
1576 eflash_wedges, sc, NULL, "%s.wedges", device_xname(sc->sc_dev));
1577 if (error) {
1578 aprint_error_dev(sc->sc_dev, "wedges: unable to create kernel "
1579 "thread: error %d\n", error);
1580 /* XXX: why continue? */
1581 }
1582
1583
1584 DBGME(DEBUG_STATUS,printf("%s: thread service active for %p\n", device_xname(sc->sc_dev), sc));
1585
1586 s = splbio();
1587 for (;;) {
1588 /* Get next I/O request, wait if necessary
1589 */
1590 if ((sc->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 &&
1591 (sc->active_xfer == NULL)) {
1592 sc->ch_flags &= ~ATACH_TH_RUN;
1593 (void) tsleep(&sc->ch_thread, PRIBIO, "eflashth", 0);
1594 sc->ch_flags |= ATACH_TH_RUN;
1595 }
1596 if (sc->ch_flags & ATACH_SHUTDOWN) {
1597 break;
1598 }
1599 bp = sc->active_xfer;
1600 sc->active_xfer = NULL;
1601 if (bp != NULL) {
1602
1603 size_t sz = DEV_BSIZE, bnow;
1604
1605 DBGME(DEBUG_XFERS,printf("%s: task %p %x %p %qx %d (%zd)\n", device_xname(sc->sc_dev), bp,
1606 sc->sc_bio.flags, sc->sc_bio.databuf, sc->sc_bio.blkno,
1607 sc->sc_bio.nbytes, sc->sc_bio.nblks));
1608
1609 sc->sc_bio.error = 0;
1610 for (; sc->sc_bio.nblks > 0;) {
1611
1612 bnow = sc->sc_bio.nblks;
1613 if (sc->sc_bio.flags & ATA_SINGLE) bnow = 1;
1614
1615 if (sc->sc_bio.flags & ATA_READ) {
1616 sc->sc_bio.error =
1617 eflash_read_at(sc, sc->sc_bio.blkno, sc->sc_bio.databuf, bnow, &sz);
1618 } else {
1619 sc->sc_bio.error =
1620 eflash_write_at(sc, sc->sc_bio.blkno, sc->sc_bio.databuf, bnow, &sz);
1621 }
1622
1623 if (sc->sc_bio.error)
1624 break;
1625
1626 sc->sc_bio.blkno += sz; /* in blocks */
1627 sc->sc_bio.nblks -= sz;
1628 sc->sc_bio.blkdone += sz;
1629 sz = sz << DEV_BSHIFT; /* in bytes */
1630 sc->sc_bio.databuf += sz;
1631 sc->sc_bio.nbytes -= sz;
1632 }
1633
1634 eflashdone(sc);
1635 }
1636 }
1637
1638 splx(s);
1639 sc->ch_thread = NULL;
1640 wakeup(&sc->ch_flags);
1641
1642 DBGME(DEBUG_STATUS,printf("%s: thread service terminated for %p\n", device_xname(sc->sc_dev), sc));
1643
1644 kthread_exit(0);
1645 }
1646
1647
1648 /*
1649 * Read/write routine for a buffer. Validates the arguments and schedules the
1650 * transfer. Does not wait for the transfer to complete.
1651 */
1652 void
eflashstrategy(struct buf * bp)1653 eflashstrategy(struct buf *bp)
1654 {
1655 struct eflash_softc *sc = device_lookup_private(&eflash_cd, EFLASHUNIT(bp->b_dev));
1656 struct disklabel *lp = sc->sc_dk.dk_label;
1657 daddr_t blkno;
1658 int s;
1659
1660 DEBUG_PRINT(("%s: eflashstrategy %lld\n", device_xname(sc->sc_dev), bp->b_blkno),
1661 DEBUG_XFERS);
1662
1663 /* Valid request? */
1664 if (bp->b_blkno < 0 ||
1665 (bp->b_bcount % lp->d_secsize) != 0 ||
1666 (bp->b_bcount / lp->d_secsize) >= (1 << NBBY)) {
1667 bp->b_error = EINVAL;
1668 goto done;
1669 }
1670
1671 /* If device invalidated (e.g. media change, door open), error. */
1672 if ((sc->sc_flags & EFLASHF_LOADED) == 0) {
1673 bp->b_error = EIO;
1674 goto done;
1675 }
1676
1677 /* If it's a null transfer, return immediately. */
1678 if (bp->b_bcount == 0)
1679 goto done;
1680
1681 /*
1682 * Do bounds checking, adjust transfer. if error, process.
1683 * If end of partition, just return.
1684 */
1685 if (EFLASHPART(bp->b_dev) == RAW_PART) {
1686 if (bounds_check_with_mediasize(bp, DEV_BSIZE,
1687 sc->sc_capacity) <= 0)
1688 goto done;
1689 } else {
1690 if (bounds_check_with_label(&sc->sc_dk, bp,
1691 (sc->sc_flags & (EFLASHF_WLABEL|EFLASHF_LABELLING)) != 0) <= 0)
1692 goto done;
1693 }
1694
1695 /*
1696 * Now convert the block number to absolute and put it in
1697 * terms of the device's logical block size.
1698 */
1699 if (lp->d_secsize >= DEV_BSIZE)
1700 blkno = bp->b_blkno / (lp->d_secsize / DEV_BSIZE);
1701 else
1702 blkno = bp->b_blkno * (DEV_BSIZE / lp->d_secsize);
1703
1704 if (EFLASHPART(bp->b_dev) != RAW_PART)
1705 blkno += lp->d_partitions[EFLASHPART(bp->b_dev)].p_offset;
1706
1707 bp->b_rawblkno = blkno;
1708
1709 /* Queue transfer on drive, activate drive and controller if idle. */
1710 s = splbio();
1711 bufq_put(sc->sc_q, bp);
1712 eflashstart(sc);
1713 splx(s);
1714 return;
1715 done:
1716 /* Toss transfer; we're done early. */
1717 bp->b_resid = bp->b_bcount;
1718 biodone(bp);
1719 }
1720
1721 /*
1722 * Queue a drive for I/O.
1723 */
1724 void
eflashstart(void * arg)1725 eflashstart(void *arg)
1726 {
1727 struct eflash_softc *sc = arg;
1728 struct buf *bp = NULL;
1729
1730 DEBUG_PRINT(("%s: eflashstart\n", device_xname(sc->sc_dev)),
1731 DEBUG_XFERS);
1732 while (sc->openings > 0) {
1733
1734 /* Is there a buf for us ? */
1735 if ((bp = bufq_get(sc->sc_q)) == NULL)
1736 return;
1737
1738 /*
1739 * Make the command. First lock the device
1740 */
1741 sc->openings--;
1742
1743 sc->retries = 0;
1744 __eflashstart(sc, bp);
1745 }
1746 }
1747
1748 void
__eflashstart(struct eflash_softc * sc,struct buf * bp)1749 __eflashstart(struct eflash_softc *sc, struct buf *bp)
1750 {
1751 DEBUG_PRINT(("%s: __eflashstart %p\n", device_xname(sc->sc_dev), bp),
1752 DEBUG_XFERS);
1753
1754 sc->sc_bp = bp;
1755 /*
1756 * If we're retrying, retry in single-sector mode. This will give us
1757 * the sector number of the problem, and will eventually allow the
1758 * transfer to succeed.
1759 */
1760 if (sc->retries >= EFLASHIORETRIES_SINGLE)
1761 sc->sc_bio.flags = ATA_SINGLE;
1762 else
1763 sc->sc_bio.flags = 0;
1764 if (bp->b_flags & B_READ)
1765 sc->sc_bio.flags |= ATA_READ;
1766 sc->sc_bio.blkno = bp->b_rawblkno;
1767 sc->sc_bio.blkdone = 0;
1768 sc->sc_bio.nbytes = bp->b_bcount;
1769 sc->sc_bio.nblks = bp->b_bcount >> DEV_BSHIFT;
1770 sc->sc_bio.databuf = bp->b_data;
1771 /* Instrumentation. */
1772 disk_busy(&sc->sc_dk);
1773 sc->active_xfer = bp;
1774 wakeup(&sc->ch_thread);
1775 }
1776
1777 void
eflashdone(struct eflash_softc * sc)1778 eflashdone(struct eflash_softc *sc)
1779 {
1780 struct buf *bp = sc->sc_bp;
1781 const char *errmsg;
1782 int do_perror = 0;
1783
1784 DEBUG_PRINT(("%s: eflashdone %p\n", device_xname(sc->sc_dev), bp),
1785 DEBUG_XFERS);
1786
1787 if (bp == NULL)
1788 return;
1789
1790 bp->b_resid = sc->sc_bio.nbytes;
1791 switch (sc->sc_bio.error) {
1792 case ETIMEDOUT:
1793 errmsg = "device timeout";
1794 do_perror = 1;
1795 goto retry;
1796 case EBUSY:
1797 errmsg = "device stuck";
1798 retry: /* Just reset and retry. Can we do more ? */
1799 /*eflash_reset(sc);*/
1800 diskerr(bp, "flash", errmsg, LOG_PRINTF,
1801 sc->sc_bio.blkdone, sc->sc_dk.dk_label);
1802 if (sc->retries < EFLASHIORETRIES)
1803 printf(", retrying");
1804 printf("\n");
1805 if (do_perror)
1806 eflashperror(sc);
1807 if (sc->retries < EFLASHIORETRIES) {
1808 sc->retries++;
1809 callout_reset(&sc->sc_restart_ch, RECOVERYTIME,
1810 eflashrestart, sc);
1811 return;
1812 }
1813
1814 bp->b_error = EIO;
1815 break;
1816 case 0:
1817 if ((sc->sc_bio.flags & ATA_CORR) || sc->retries > 0)
1818 printf("%s: soft error (corrected)\n",
1819 device_xname(sc->sc_dev));
1820 break;
1821 case ENODEV:
1822 case E2BIG:
1823 bp->b_error = EIO;
1824 break;
1825 }
1826 disk_unbusy(&sc->sc_dk, (bp->b_bcount - bp->b_resid),
1827 (bp->b_flags & B_READ));
1828 rnd_add_uint32(&sc->rnd_source, bp->b_blkno);
1829 biodone(bp);
1830 sc->openings++;
1831 eflashstart(sc);
1832 }
1833
1834 void
eflashrestart(void * v)1835 eflashrestart(void *v)
1836 {
1837 struct eflash_softc *sc = v;
1838 struct buf *bp = sc->sc_bp;
1839 int s;
1840 DEBUG_PRINT(("%s: eflashrestart\n", device_xname(sc->sc_dev)),
1841 DEBUG_XFERS);
1842
1843 s = splbio();
1844 __eflashstart(v, bp);
1845 splx(s);
1846 }
1847
1848 int
eflashread(dev_t dev,struct uio * uio,int flags)1849 eflashread(dev_t dev, struct uio *uio, int flags)
1850 {
1851 DEBUG_PRINT(("eflashread\n"), DEBUG_XFERS);
1852 return (physio(eflashstrategy, NULL, dev, B_READ, minphys, uio));
1853 }
1854
1855 int
eflashwrite(dev_t dev,struct uio * uio,int flags)1856 eflashwrite(dev_t dev, struct uio *uio, int flags)
1857 {
1858 DEBUG_PRINT(("eflashwrite\n"), DEBUG_XFERS);
1859 return (physio(eflashstrategy, NULL, dev, B_WRITE, minphys, uio));
1860 }
1861
1862 int
eflashopen(dev_t dev,int flag,int fmt,struct lwp * l)1863 eflashopen(dev_t dev, int flag, int fmt, struct lwp *l)
1864 {
1865 struct eflash_softc *sc;
1866 int part, error;
1867
1868 DEBUG_PRINT(("eflashopen %" PRIx64 "\n", dev), DEBUG_FUNCS);
1869 sc = device_lookup_private(&eflash_cd, EFLASHUNIT(dev));
1870 if (sc == NULL)
1871 return (ENXIO);
1872
1873 if (! device_is_active(sc->sc_dev))
1874 return (ENODEV);
1875
1876 part = EFLASHPART(dev);
1877
1878 mutex_enter(&sc->sc_dk.dk_openlock);
1879
1880 /*
1881 * If there are wedges, and this is not RAW_PART, then we
1882 * need to fail.
1883 */
1884 if (sc->sc_dk.dk_nwedges != 0 && part != RAW_PART) {
1885 error = EBUSY;
1886 goto bad;
1887 }
1888
1889 if (sc->sc_dk.dk_openmask != 0) {
1890 /*
1891 * If any partition is open, but the disk has been invalidated,
1892 * disallow further opens.
1893 */
1894 if ((sc->sc_flags & EFLASHF_LOADED) == 0) {
1895 error = EIO;
1896 goto bad;
1897 }
1898 } else {
1899 if ((sc->sc_flags & EFLASHF_LOADED) == 0) {
1900 sc->sc_flags |= EFLASHF_LOADED;
1901
1902 /* Load the partition info if not already loaded. */
1903 eflashgetdisklabel(sc);
1904 }
1905 }
1906
1907 /* Check that the partition exists. */
1908 if (part != RAW_PART &&
1909 (part >= sc->sc_dk.dk_label->d_npartitions ||
1910 sc->sc_dk.dk_label->d_partitions[part].p_fstype == FS_UNUSED)) {
1911 error = ENXIO;
1912 goto bad;
1913 }
1914
1915 /* Insure only one open at a time. */
1916 switch (fmt) {
1917 case S_IFCHR:
1918 sc->sc_dk.dk_copenmask |= (1 << part);
1919 break;
1920 case S_IFBLK:
1921 sc->sc_dk.dk_bopenmask |= (1 << part);
1922 break;
1923 }
1924 sc->sc_dk.dk_openmask =
1925 sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask;
1926
1927 mutex_exit(&sc->sc_dk.dk_openlock);
1928 return 0;
1929
1930 bad:
1931 mutex_exit(&sc->sc_dk.dk_openlock);
1932 DEBUG_PRINT(("%s: eflashopen -> %d\n", device_xname(sc->sc_dev), error),
1933 DEBUG_XFERS);
1934 return error;
1935 }
1936
1937 int
eflashclose(dev_t dev,int flag,int fmt,struct lwp * l)1938 eflashclose(dev_t dev, int flag, int fmt, struct lwp *l)
1939 {
1940 struct eflash_softc *sc = device_lookup_private(&eflash_cd, EFLASHUNIT(dev));
1941 int part = EFLASHPART(dev);
1942
1943 DEBUG_PRINT(("eflashclose %" PRIx64 "\n", dev), DEBUG_FUNCS);
1944
1945 mutex_enter(&sc->sc_dk.dk_openlock);
1946
1947 switch (fmt) {
1948 case S_IFCHR:
1949 sc->sc_dk.dk_copenmask &= ~(1 << part);
1950 break;
1951 case S_IFBLK:
1952 sc->sc_dk.dk_bopenmask &= ~(1 << part);
1953 break;
1954 }
1955 sc->sc_dk.dk_openmask =
1956 sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask;
1957
1958 if (sc->sc_dk.dk_openmask == 0) {
1959
1960 if (! (sc->sc_flags & EFLASHF_KLABEL))
1961 sc->sc_flags &= ~EFLASHF_LOADED;
1962
1963 DEBUG_PRINT(("%s: eflashclose flg %x\n", device_xname(sc->sc_dev), sc->sc_flags),
1964 DEBUG_XFERS);
1965
1966 }
1967
1968 mutex_exit(&sc->sc_dk.dk_openlock);
1969 return 0;
1970 }
1971
1972 void
eflashgetdefaultlabel(struct eflash_softc * sc,struct disklabel * lp)1973 eflashgetdefaultlabel(struct eflash_softc *sc, struct disklabel *lp)
1974 {
1975
1976 DEBUG_PRINT(("%s: eflashgetdefaultlabel\n", device_xname(sc->sc_dev)), DEBUG_FUNCS);
1977 memset(lp, 0, sizeof(struct disklabel));
1978
1979 lp->d_secsize = DEV_BSIZE;
1980 lp->d_ntracks = 1;
1981 lp->d_nsectors = sc->sc_capacity;
1982 lp->d_ncylinders = 1;
1983 lp->d_secpercyl = lp->d_ntracks * lp->d_nsectors;
1984
1985 lp->d_type = DKTYPE_ST506; /* ?!? */
1986
1987 strncpy(lp->d_typename, ST506, 16);
1988 strncpy(lp->d_packname, "fictitious", 16);
1989 if (sc->sc_capacity > UINT32_MAX)
1990 lp->d_secperunit = UINT32_MAX;
1991 else
1992 lp->d_secperunit = sc->sc_capacity;
1993 lp->d_rpm = 3600;
1994 lp->d_interleave = 1;
1995 lp->d_flags = 0;
1996
1997 lp->d_partitions[RAW_PART].p_offset = 0;
1998 lp->d_partitions[RAW_PART].p_size =
1999 lp->d_secperunit * (lp->d_secsize / DEV_BSIZE);
2000 lp->d_partitions[RAW_PART].p_fstype = FS_UNUSED;
2001 lp->d_npartitions = RAW_PART + 1;
2002
2003 lp->d_magic = DISKMAGIC;
2004 lp->d_magic2 = DISKMAGIC;
2005 lp->d_checksum = dkcksum(lp);
2006 }
2007
2008 /*
2009 * Fabricate a default disk label, and try to read the correct one.
2010 */
2011 void
eflashgetdisklabel(struct eflash_softc * sc)2012 eflashgetdisklabel(struct eflash_softc *sc)
2013 {
2014 struct disklabel *lp = sc->sc_dk.dk_label;
2015 const char *errstring;
2016
2017 DEBUG_PRINT(("%s: eflashgetdisklabel\n", device_xname(sc->sc_dev)), DEBUG_FUNCS);
2018
2019 memset(sc->sc_dk.dk_cpulabel, 0, sizeof(struct cpu_disklabel));
2020
2021 eflashgetdefaultlabel(sc, lp);
2022
2023 #ifdef HAS_BAD144_HANDLING
2024 sc->sc_bio.badsect[0] = -1;
2025 #endif
2026
2027 /* BUGBUG: maj==0?? why is this not EFLASHLABELDEV(??sc->sc_dev) */
2028 errstring = readdisklabel(MAKEEFLASHDEV(0, device_unit(sc->sc_dev),
2029 RAW_PART), eflashstrategy, lp,
2030 sc->sc_dk.dk_cpulabel);
2031 if (errstring) {
2032 printf("%s: %s\n", device_xname(sc->sc_dev), errstring);
2033 return;
2034 }
2035
2036 #if DEBUG
2037 if (EFLASH_DEBUG(DEBUG_WRITES)) {
2038 int i, n = sc->sc_dk.dk_label->d_npartitions;
2039 printf("%s: %d parts\n", device_xname(sc->sc_dev), n);
2040 for (i = 0; i < n; i++) {
2041 printf("\t[%d]: t=%x s=%d o=%d\n", i,
2042 sc->sc_dk.dk_label->d_partitions[i].p_fstype,
2043 sc->sc_dk.dk_label->d_partitions[i].p_size,
2044 sc->sc_dk.dk_label->d_partitions[i].p_offset);
2045 }
2046 }
2047 #endif
2048
2049 #ifdef HAS_BAD144_HANDLING
2050 if ((lp->d_flags & D_BADSECT) != 0)
2051 bad144intern(sc);
2052 #endif
2053 }
2054
2055 void
eflashperror(const struct eflash_softc * sc)2056 eflashperror(const struct eflash_softc *sc)
2057 {
2058 const char *devname = device_xname(sc->sc_dev);
2059 u_int32_t Status = sc->sc_bio.r_error;
2060
2061 printf("%s: (", devname);
2062
2063 if (Status == 0)
2064 printf("error not notified");
2065 else
2066 printf("status=x%x", Status);
2067
2068 printf(")\n");
2069 }
2070
2071 int
eflashioctl(dev_t dev,u_long xfer,void * addr,int flag,struct lwp * l)2072 eflashioctl(dev_t dev, u_long xfer, void *addr, int flag, struct lwp *l)
2073 {
2074 struct eflash_softc *sc = device_lookup_private(&eflash_cd, EFLASHUNIT(dev));
2075 int error = 0, s;
2076
2077 DEBUG_PRINT(("eflashioctl(%lx)\n",xfer), DEBUG_FUNCS);
2078
2079 if ((sc->sc_flags & EFLASHF_LOADED) == 0)
2080 return EIO;
2081
2082 error = disk_ioctl(&sc->sc_dk, dev, xfer, addr, flag, l);
2083 if (error != EPASSTHROUGH)
2084 return (error);
2085
2086 switch (xfer) {
2087 #ifdef HAS_BAD144_HANDLING
2088 case DIOCSBAD:
2089 if ((flag & FWRITE) == 0)
2090 return EBADF;
2091 sc->sc_dk.dk_cpulabel->bad = *(struct dkbad *)addr;
2092 sc->sc_dk.dk_label->d_flags |= D_BADSECT;
2093 bad144intern(sc);
2094 return 0;
2095 #endif
2096
2097 case DIOCWDINFO:
2098 case DIOCSDINFO:
2099 {
2100 struct disklabel *lp;
2101
2102 if ((flag & FWRITE) == 0)
2103 return EBADF;
2104
2105 lp = (struct disklabel *)addr;
2106
2107 mutex_enter(&sc->sc_dk.dk_openlock);
2108 sc->sc_flags |= EFLASHF_LABELLING;
2109
2110 error = setdisklabel(sc->sc_dk.dk_label,
2111 lp, /*sc->sc_dk.dk_openmask : */0,
2112 sc->sc_dk.dk_cpulabel);
2113 if (error == 0) {
2114 if (xfer == DIOCWDINFO)
2115 error = writedisklabel(EFLASHLABELDEV(dev),
2116 eflashstrategy, sc->sc_dk.dk_label,
2117 sc->sc_dk.dk_cpulabel);
2118 }
2119
2120 sc->sc_flags &= ~EFLASHF_LABELLING;
2121 mutex_exit(&sc->sc_dk.dk_openlock);
2122 return error;
2123 }
2124
2125 case DIOCKLABEL:
2126 if (*(int *)addr)
2127 sc->sc_flags |= EFLASHF_KLABEL;
2128 else
2129 sc->sc_flags &= ~EFLASHF_KLABEL;
2130 return 0;
2131
2132 case DIOCWLABEL:
2133 if ((flag & FWRITE) == 0)
2134 return EBADF;
2135 if (*(int *)addr)
2136 sc->sc_flags |= EFLASHF_WLABEL;
2137 else
2138 sc->sc_flags &= ~EFLASHF_WLABEL;
2139 return 0;
2140
2141 case DIOCGDEFLABEL:
2142 eflashgetdefaultlabel(sc, (struct disklabel *)addr);
2143 return 0;
2144
2145 case DIOCCACHESYNC:
2146 return 0;
2147
2148 case DIOCGSTRATEGY:
2149 {
2150 struct disk_strategy *dks = (void *)addr;
2151
2152 s = splbio();
2153 strlcpy(dks->dks_name, bufq_getstrategyname(sc->sc_q),
2154 sizeof(dks->dks_name));
2155 splx(s);
2156 dks->dks_paramlen = 0;
2157
2158 return 0;
2159 }
2160
2161 case DIOCSSTRATEGY:
2162 {
2163 struct disk_strategy *dks = (void *)addr;
2164 struct bufq_state *new;
2165 struct bufq_state *old;
2166
2167 if ((flag & FWRITE) == 0) {
2168 return EBADF;
2169 }
2170 if (dks->dks_param != NULL) {
2171 return EINVAL;
2172 }
2173 dks->dks_name[sizeof(dks->dks_name) - 1] = 0; /* ensure term */
2174 error = bufq_alloc(&new, dks->dks_name,
2175 BUFQ_EXACT|BUFQ_SORT_RAWBLOCK);
2176 if (error) {
2177 return error;
2178 }
2179 s = splbio();
2180 old = sc->sc_q;
2181 bufq_move(new, old);
2182 sc->sc_q = new;
2183 splx(s);
2184 bufq_free(old);
2185
2186 return 0;
2187 }
2188
2189 default:
2190 /* NB: we get a DIOCGWEDGEINFO, but nobody else handles it either */
2191 DEBUG_PRINT(("eflashioctl: unsup x%lx\n", xfer), DEBUG_FUNCS);
2192 return ENOTTY;
2193 }
2194 }
2195
2196 int
eflashsize(dev_t dev)2197 eflashsize(dev_t dev)
2198 {
2199 struct eflash_softc *sc;
2200 int part, omask;
2201 int size;
2202
2203 DEBUG_PRINT(("eflashsize\n"), DEBUG_FUNCS);
2204
2205 sc = device_lookup_private(&eflash_cd, EFLASHUNIT(dev));
2206 if (sc == NULL)
2207 return (-1);
2208
2209 part = EFLASHPART(dev);
2210 omask = sc->sc_dk.dk_openmask & (1 << part);
2211
2212 if (omask == 0 && eflashopen(dev, 0, S_IFBLK, NULL) != 0)
2213 return (-1);
2214 if (sc->sc_dk.dk_label->d_partitions[part].p_fstype != FS_SWAP)
2215 size = -1;
2216 else
2217 size = sc->sc_dk.dk_label->d_partitions[part].p_size *
2218 (sc->sc_dk.dk_label->d_secsize / DEV_BSIZE);
2219 if (omask == 0 && eflashclose(dev, 0, S_IFBLK, NULL) != 0)
2220 return (-1);
2221 return (size);
2222 }
2223
2224 /*
2225 * Dump core after a system crash.
2226 */
2227 int
eflashdump(dev_t dev,daddr_t blkno,void * va,size_t size)2228 eflashdump(dev_t dev, daddr_t blkno, void *va, size_t size)
2229 {
2230 /* no we dont */
2231 return (ENXIO);
2232 }
2233
2234 #ifdef HAS_BAD144_HANDLING
2235 /*
2236 * Internalize the bad sector table.
2237 */
2238 void
bad144intern(struct eflash_softc * sc)2239 bad144intern(struct eflash_softc *sc)
2240 {
2241 struct dkbad *bt = &sc->sc_dk.dk_cpulabel->bad;
2242 struct disklabel *lp = sc->sc_dk.dk_label;
2243 int i = 0;
2244
2245 DEBUG_PRINT(("bad144intern\n"), DEBUG_XFERS);
2246
2247 for (; i < NBT_BAD; i++) {
2248 if (bt->bt_bad[i].bt_cyl == 0xffff)
2249 break;
2250 sc->sc_bio.badsect[i] =
2251 bt->bt_bad[i].bt_cyl * lp->d_secpercyl +
2252 (bt->bt_bad[i].bt_trksec >> 8) * lp->d_nsectors +
2253 (bt->bt_bad[i].bt_trksec & 0xff);
2254 }
2255 for (; i < NBT_BAD+1; i++)
2256 sc->sc_bio.badsect[i] = -1;
2257 }
2258 #endif
2259
2260 static void
eflash_set_geometry(struct eflash_softc * sc)2261 eflash_set_geometry(struct eflash_softc *sc)
2262 {
2263 struct disk_geom *dg = &sc->sc_dk.dk_geom;
2264
2265 memset(dg, 0, sizeof(*dg));
2266
2267 dg->dg_secperunit = sc->sc_capacity;
2268 dg->dg_secsize = DEV_BSIZE /* XXX 512? */;
2269 dg->dg_nsectors = sc->sc_capacity;
2270 dg->dg_ntracks = 1;
2271 dg->dg_ncylinders = sc->sc_capacity;
2272
2273 disk_set_info(sc->sc_dev, &sc->sc_dk, ST506);
2274 }
2275