xref: /netbsd-src/sys/arch/arm/xscale/i80312_mem.c (revision 4885faf54d02537d387d020189c00ee1f3ecde96)
1 /*	$NetBSD: i80312_mem.c,v 1.6 2018/07/31 06:46:25 skrll Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Intel i80312 Companion I/O memory controller support.
40  */
41 
42 #include "opt_arm_debug.h"
43 
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: i80312_mem.c,v 1.6 2018/07/31 06:46:25 skrll Exp $");
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 
50 #include <sys/bus.h>
51 
52 #include <arm/xscale/i80312reg.h>
53 #include <arm/xscale/i80312var.h>
54 
55 /*
56  * i80312_sdram_bounds:
57  *
58  *	Retrieve the start and size of SDRAM.
59  */
60 void
i80312_sdram_bounds(bus_space_tag_t st,bus_space_handle_t sh,paddr_t * start,psize_t * size)61 i80312_sdram_bounds(bus_space_tag_t st, bus_space_handle_t sh,
62     paddr_t *start, psize_t *size)
63 {
64 	uint32_t sdbr, sbr0, sbr1;
65 	uint32_t bank0, bank1;
66 
67 	sdbr = bus_space_read_4(st, sh, I80312_MEM_SB);
68 	sbr0 = bus_space_read_4(st, sh, I80312_MEM_SB0);
69 	sbr1 = bus_space_read_4(st, sh, I80312_MEM_SB1);
70 
71 #ifdef VERBOSE_INIT_ARM
72 	printf("i80312: SBDR = 0x%08x SBR0 = 0x%08x SBR1 = 0x%08x\n",
73 	    sdbr, sbr0, sbr1);
74 #endif
75 
76 	*start = sdbr;
77 
78 	sdbr = (sdbr >> 25) & 0xf;
79 
80 	sbr0 = ((sbr0 >> 3) & 0x1f) - sdbr;
81 	sbr1 = ((sbr1 >> 3) & 0x1f) - sbr0;
82 
83 	bank0 = sbr0 << 25;
84 	bank1 = sbr1 << 25;
85 
86 #ifdef VERBOSE_INIT_ARM
87 	printf("i80312: BANK0 = 0x%08x BANK1 = 0x%08x\n", bank0, bank1);
88 #endif
89 
90 	*size = bank0 + bank1;
91 }
92