1 /* $NetBSD: becc_timer.c,v 1.2 2003/05/23 05:21:26 briggs Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Timer/clock support for the ADI Engineering Big Endian Companion Chip. 40 */ 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/time.h> 46 47 #include <machine/bus.h> 48 #include <arm/cpufunc.h> 49 50 #include <arm/xscale/beccreg.h> 51 #include <arm/xscale/beccvar.h> 52 53 void (*becc_hardclock_hook)(void); 54 55 /* 56 * Note, since COUNTS_PER_USEC doesn't divide evenly, we round up. 57 */ 58 #define COUNTS_PER_SEC BECC_PERIPH_CLOCK 59 #define COUNTS_PER_USEC ((COUNTS_PER_SEC / 1000000) + 1) 60 61 static void *clock_ih; 62 63 /* 64 * Since the timer interrupts when the counter underflows, we need to 65 * subtract 1 from counts_per_hz when loading the preload register. 66 */ 67 static uint32_t counts_per_hz; 68 69 int clockhandler(void *); 70 71 /* 72 * becc_calibrate_delay: 73 * 74 * Calibrate the delay loop. 75 */ 76 void 77 becc_calibrate_delay(void) 78 { 79 80 /* 81 * Just use hz=100 for now -- we'll adjust it, if necessary, 82 * in cpu_initclocks(). 83 */ 84 counts_per_hz = COUNTS_PER_SEC / 100; 85 86 /* Stop both timers, clear interrupts. */ 87 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TIF); 88 BECC_CSR_WRITE(BECC_TSCRB, TSCRx_TIF); 89 90 /* Set the timer preload value. */ 91 BECC_CSR_WRITE(BECC_TPRA, counts_per_hz - 1); 92 93 /* Start the timer. */ 94 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM); 95 } 96 97 /* 98 * cpu_initclocks: 99 * 100 * Initialize the clock and get them going. 101 */ 102 void 103 cpu_initclocks(void) 104 { 105 u_int oldirqstate; 106 107 #if 0 108 if (hz < 50 || COUNTS_PER_SEC % hz) { 109 printf("Cannot get %d Hz clock; using 100 Hz\n", hz); 110 hz = 100; 111 } 112 #endif 113 tick = 1000000 / hz; /* number of microseconds between interrupts */ 114 tickfix = 1000000 - (hz * tick); 115 if (tickfix) { 116 int ftp; 117 118 ftp = min(ffs(tickfix), ffs(hz)); 119 tickfix >>= (ftp - 1); 120 tickfixinterval = hz >> (ftp - 1); 121 } 122 123 /* 124 * We only have one timer available; stathz and profhz are 125 * always left as 0 (the upper-layer clock code deals with 126 * this situation). 127 */ 128 if (stathz != 0) 129 printf("Cannot get %d Hz statclock\n", stathz); 130 stathz = 0; 131 132 if (profhz != 0) 133 printf("Cannot get %d Hz profclock\n", profhz); 134 profhz = 0; 135 136 /* Report the clock frequency. */ 137 aprint_normal("clock: hz=%d stathz=%d profhz=%d\n", hz, stathz, profhz); 138 139 oldirqstate = disable_interrupts(I32_bit); 140 141 /* Hook up the clock interrupt handler. */ 142 clock_ih = becc_intr_establish(ICU_TIMERA, IPL_CLOCK, 143 clockhandler, NULL); 144 if (clock_ih == NULL) 145 panic("cpu_initclocks: unable to register timer interrupt"); 146 147 /* Set up the new clock parameters. */ 148 149 /* Stop timer, clear interrupt */ 150 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TIF); 151 152 counts_per_hz = COUNTS_PER_SEC / hz; 153 154 /* Set the timer preload value. */ 155 BECC_CSR_WRITE(BECC_TPRA, counts_per_hz - 1); 156 157 /* ...and start it in motion. */ 158 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM); 159 160 /* register soft interrupt handler as well */ 161 becc_intr_establish(ICU_SOFT, IPL_SOFT, becc_softint, NULL); 162 163 restore_interrupts(oldirqstate); 164 } 165 166 /* 167 * setstatclockrate: 168 * 169 * Set the rate of the statistics clock. 170 * 171 * We assume that hz is either stathz or profhz, and that neither 172 * will change after being set by cpu_initclocks(). We could 173 * recalculate the intervals here, but that would be a pain. 174 */ 175 void 176 setstatclockrate(int hz) 177 { 178 179 /* 180 * XXX Use TMR1? 181 */ 182 } 183 184 /* 185 * microtime: 186 * 187 * Fill in the specified timeval struct with the current time 188 * accurate to the microsecond. 189 */ 190 void 191 microtime(struct timeval *tvp) 192 { 193 static struct timeval lasttv; 194 u_int oldirqstate; 195 uint32_t counts; 196 197 oldirqstate = disable_interrupts(I32_bit); 198 199 /* 200 * XXX How do we compensate for the -1 behavior of the preload value? 201 */ 202 counts = counts_per_hz - BECC_CSR_READ(BECC_TCVRA); 203 204 /* Fill in the timeval struct. */ 205 *tvp = time; 206 tvp->tv_usec += (counts / COUNTS_PER_USEC); 207 208 /* Make sure microseconds doesn't overflow. */ 209 while (tvp->tv_usec >= 1000000) { 210 tvp->tv_usec -= 1000000; 211 tvp->tv_sec++; 212 } 213 214 /* Make sure the time has advanced. */ 215 if (tvp->tv_sec == lasttv.tv_sec && 216 tvp->tv_usec <= lasttv.tv_usec) { 217 tvp->tv_usec = lasttv.tv_usec + 1; 218 if (tvp->tv_usec >= 1000000) { 219 tvp->tv_usec -= 1000000; 220 tvp->tv_sec++; 221 } 222 } 223 224 lasttv = *tvp; 225 226 restore_interrupts(oldirqstate); 227 } 228 229 /* 230 * delay: 231 * 232 * Delay for at least N microseconds. 233 */ 234 void 235 delay(u_int n) 236 { 237 uint32_t cur, last, delta, usecs; 238 239 /* 240 * This works by polling the timer and counting the 241 * number of microseconds that go by. 242 */ 243 last = BECC_CSR_READ(BECC_TCVRA); 244 delta = usecs = 0; 245 246 while (n > usecs) { 247 cur = BECC_CSR_READ(BECC_TCVRA); 248 249 /* Check to see if the timer has wrapped around. */ 250 if (last < cur) 251 delta += (last + (counts_per_hz - cur)); 252 else 253 delta += (last - cur); 254 255 last = cur; 256 257 if (delta >= COUNTS_PER_USEC) { 258 usecs += delta / COUNTS_PER_USEC; 259 delta %= COUNTS_PER_USEC; 260 } 261 } 262 } 263 264 /* 265 * inittodr: 266 * 267 * Initialize time from the time-of-day register. 268 */ 269 void 270 inittodr(time_t base) 271 { 272 273 time.tv_sec = base; 274 time.tv_usec = 0; 275 } 276 277 /* 278 * resettodr: 279 * 280 * Reset the time-of-day register with the current time. 281 */ 282 void 283 resettodr(void) 284 { 285 } 286 287 /* 288 * clockhandler: 289 * 290 * Handle the hardclock interrupt. 291 */ 292 int 293 clockhandler(void *arg) 294 { 295 struct clockframe *frame = arg; 296 297 /* ACK the interrupt. */ 298 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM | TSCRx_TIF); 299 300 hardclock(frame); 301 302 if (becc_hardclock_hook != NULL) 303 (*becc_hardclock_hook)(); 304 305 return (1); 306 } 307