xref: /netbsd-src/sys/arch/arm/sunxi/sunxi_twi.c (revision 181254a7b1bdde6873432bffef2d2decc4b5c22f)
1 /* $NetBSD: sunxi_twi.c,v 1.11 2020/01/12 17:48:42 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 
31 __KERNEL_RCSID(0, "$NetBSD: sunxi_twi.c,v 1.11 2020/01/12 17:48:42 thorpej Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/intr.h>
37 #include <sys/systm.h>
38 #include <sys/time.h>
39 
40 #include <dev/i2c/i2cvar.h>
41 #include <dev/i2c/gttwsivar.h>
42 #include <dev/i2c/gttwsireg.h>
43 
44 #include <dev/fdt/fdtvar.h>
45 
46 #define	TWI_CCR_REG	0x14
47 #define	 TWI_CCR_CLK_M	__BITS(6,3)
48 #define	 TWI_CCR_CLK_N	__BITS(2,0)
49 
50 static const bus_size_t sunxi_twi_regmap[] = {
51 	[TWSI_SLAVEADDR]	= TWSI_ALLWINNER_SLAVEADDR,
52 	[TWSI_EXTEND_SLAVEADDR]	= TWSI_ALLWINNER_EXTEND_SLAVEADDR,
53 	[TWSI_DATA]		= TWSI_ALLWINNER_DATA,
54 	[TWSI_CONTROL]		= TWSI_ALLWINNER_CONTROL,
55 	[TWSI_STATUS]		= TWSI_ALLWINNER_STATUS,
56 	[TWSI_BAUDRATE]		= TWSI_ALLWINNER_BAUDRATE,
57 	[TWSI_SOFTRESET]	= TWSI_ALLWINNER_SOFTRESET,
58 };
59 
60 static int sunxi_twi_match(device_t, cfdata_t, void *);
61 static void sunxi_twi_attach(device_t, device_t, void *);
62 
63 struct sunxi_twi_config {
64 	bool		iflg_rwc;
65 };
66 
67 static const struct sunxi_twi_config sun4i_a10_i2c_config = {
68 	.iflg_rwc = false,
69 };
70 
71 static const struct sunxi_twi_config sun6i_a31_i2c_config = {
72 	.iflg_rwc = true,
73 };
74 
75 static const struct of_compat_data compat_data[] = {
76 	{ "allwinner,sun4i-a10-i2c",	(uintptr_t)&sun4i_a10_i2c_config },
77 	{ "allwinner,sun6i-a31-i2c",	(uintptr_t)&sun6i_a31_i2c_config },
78 	{ NULL }
79 };
80 
81 CFATTACH_DECL_NEW(sunxi_twi, sizeof(struct gttwsi_softc),
82 	sunxi_twi_match, sunxi_twi_attach, NULL, NULL);
83 
84 static i2c_tag_t
85 sunxi_twi_get_tag(device_t dev)
86 {
87 	struct gttwsi_softc * const sc = device_private(dev);
88 
89 	return &sc->sc_i2c;
90 }
91 
92 const struct fdtbus_i2c_controller_func sunxi_twi_funcs = {
93 	.get_tag = sunxi_twi_get_tag,
94 };
95 
96 static u_int
97 sunxi_twi_calc_rate(u_int parent_rate, u_int n, u_int m)
98 {
99 	return parent_rate / (10 * (m + 1) * (1 << n));
100 }
101 
102 static void
103 sunxi_twi_set_clock(struct gttwsi_softc *sc, u_int parent_rate, u_int rate)
104 {
105 	uint32_t baud;
106 	u_int n, m, best_rate;
107 
108 	baud = gttwsi_read_4(sc, TWSI_BAUDRATE);
109 
110 	for (best_rate = 0, n = 0; n < 8; n++) {
111 		for (m = 0; m < 16; m++) {
112 			const u_int tmp_rate =
113 			    sunxi_twi_calc_rate(parent_rate, n, m);
114 			if (tmp_rate <= rate && tmp_rate > best_rate) {
115 				best_rate = tmp_rate;
116 				baud = __SHIFTIN(n, TWI_CCR_CLK_N) |
117 				       __SHIFTIN(m, TWI_CCR_CLK_M);
118 			}
119 		}
120 	}
121 
122 	gttwsi_write_4(sc, TWSI_BAUDRATE, baud);
123 	delay(10000);
124 }
125 
126 static int
127 sunxi_twi_match(device_t parent, cfdata_t cf, void *aux)
128 {
129 	struct fdt_attach_args * const faa = aux;
130 
131 	return of_match_compat_data(faa->faa_phandle, compat_data);
132 }
133 
134 static void
135 sunxi_twi_attach(device_t parent, device_t self, void *aux)
136 {
137 	struct gttwsi_softc * const sc = device_private(self);
138 	struct fdt_attach_args * const faa = aux;
139 	const struct sunxi_twi_config *conf;
140 	const int phandle = faa->faa_phandle;
141 	bus_space_tag_t bst = faa->faa_bst;
142 	bus_space_handle_t bsh;
143 	struct fdtbus_reset *rst;
144 	struct clk *clk;
145 	char intrstr[128];
146 	bus_addr_t addr;
147 	bus_size_t size;
148 	void *ih;
149 
150 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
151 		aprint_error(": couldn't get registers\n");
152 		return;
153 	}
154 
155 	if (bus_space_map(bst, addr, size, 0, &bsh) != 0) {
156 		aprint_error(": couldn't map registers\n");
157 		return;
158 	}
159 
160 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
161 		aprint_error(": failed to decode interrupt\n");
162 		return;
163 	}
164 
165 	if ((clk = fdtbus_clock_get_index(phandle, 0)) != NULL)
166 		if (clk_enable(clk) != 0) {
167 			aprint_error(": couldn't enable clock\n");
168 			return;
169 		}
170 	if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL)
171 		if (fdtbus_reset_deassert(rst) != 0) {
172 			aprint_error(": couldn't de-assert reset\n");
173 			return;
174 		}
175 
176 	conf = (void *)of_search_compatible(phandle, compat_data)->data;
177 	prop_dictionary_set_bool(device_properties(self), "iflg-rwc",
178 	    conf->iflg_rwc);
179 
180 	/* Attach gttwsi core */
181 	gttwsi_attach_subr(self, bst, bsh, sunxi_twi_regmap);
182 
183 	/*
184 	 * Set clock rate to 100kHz.
185 	 */
186 	if (clk != NULL)
187 		sunxi_twi_set_clock(sc, clk_get_rate(clk), 100000);
188 
189 	ih = fdtbus_intr_establish(phandle, 0, IPL_VM, 0, gttwsi_intr, sc);
190 	if (ih == NULL) {
191 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
192 		    intrstr);
193 		return;
194 	}
195 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
196 
197 	fdtbus_register_i2c_controller(self, phandle, &sunxi_twi_funcs);
198 
199 	fdtbus_attach_i2cbus(self, phandle, &sc->sc_i2c, iicbus_print);
200 }
201