xref: /netbsd-src/sys/arch/arm/sunxi/sunxi_mc_mpstart.S (revision c6fbbfc1f198cb8aafef9b12a9f4c122e912054e)
1/* $NetBSD: sunxi_mc_mpstart.S,v 1.2 2019/02/06 13:15:59 skrll Exp $ */
2
3/*-
4 * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30
31#include <arm/asm.h>
32#include <arm/armreg.h>
33#include "assym.h"
34
35#define	CCI_SNOOP_CTRL		0x000
36#define	 CCI_SNOOP_CTRL_DVM	__BIT(1)
37#define	 CCI_SNOOP_CTRL_SNOOP	__BIT(0)
38
39	R_TMP1		.req r8
40	R_VTOPDIFF	.req r10
41
42	.global _C_LABEL(sunxi_mc_mpstart)
43_C_LABEL(sunxi_mc_mpstart):
44
45	adr     R_TMP1, sunxi_mc_mpstart
46	ldr     R_VTOPDIFF, =sunxi_mc_mpstart
47	sub     R_VTOPDIFF, R_VTOPDIFF, R_TMP1
48
49	mrc	p15, 0, r4, c0, c0, 5		// MPIDR get
50	and	r4, #(MPIDR_AFF2|MPIDR_AFF1|MPIDR_AFF0)
51
52	mov	r0, #0
53	ldr	r1, =cpu_mpidr
54	sub	r1, R_VTOPDIFF
551:
56
57	ldr	r2, [r1, r0, lsl #2]		// r2 = cpu_mpidr[r0]
58	cmp	r2, r4
59	beq	2f				// found our mpidr
60
61	add	r0, #1
62	cmp	r0, #MAXCPUS
63	bne	1b
64
65	// Not found our mpidr in the list - use Aff0 for cpuindex
66	and	r0, r4, #7
672:
68
69	// Find our CCI-400 interface's base address by cpuindex
70	ldr	r1, =sunxi_mc_cci_port
71	sub	r1, R_VTOPDIFF
72	ldr	r2, [r1, r0, lsl #2]		// r2 = sunxi_mc_cci_port[r0]
73
74	cmp	r2, #0
75	beq	3f
76
77	// Enable snooping and DVM broadcast on our CCI-400 interface
78	mov	r3, #(CCI_SNOOP_CTRL_DVM|CCI_SNOOP_CTRL_SNOOP)
79	str	r3, [r2, #CCI_SNOOP_CTRL]
80
813:
82	b cpu_mpstart
83