xref: /netbsd-src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.h (revision a5198ca09c034ee7dc43e0679c99a9662d94fd23)
1 /* $NetBSD: sun8i_h3_r_ccu.h,v 1.1 2017/09/30 12:48:58 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef _ARM_SUN8I_H3_R_CCU_H
30 #define _ARM_SUN8I_H3_R_CCU_H
31 
32 #define	H3_R_RST_APB0_IR		0
33 #define	H3_R_RST_APB0_TIMER		1
34 #define	H3_R_RST_APB0_RSB		2
35 #define	H3_R_RST_APB0_UART		3
36 #define	H3_R_RST_APB0_I2C		5
37 
38 #define	H3_R_CLK_AR100			0
39 #define	H3_R_CLK_AHB0			1
40 #define	H3_R_CLK_APB0			2
41 #define	H3_R_CLK_APB0_PIO		3
42 #define	H3_R_CLK_APB0_IR		4
43 #define	H3_R_CLK_APB0_TIMER		5
44 #define	H3_R_CLK_APB0_RSB		6
45 #define	H3_R_CLK_APB0_UART		7
46 #define	H3_R_CLK_APB0_I2C		9
47 #define	H3_R_CLK_APB0_TWD		10
48 #define	H3_R_CLK_IR			11
49 
50 #endif /* _ARM_SUN8I_H3_R_CCU_H */
51