xref: /netbsd-src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.c (revision 6e54367a22fbc89a1139d033e95bec0c0cf0975b)
1 /* $NetBSD: sun8i_h3_r_ccu.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 
31 __KERNEL_RCSID(1, "$NetBSD: sun8i_h3_r_ccu.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/systm.h>
37 
38 #include <dev/fdt/fdtvar.h>
39 
40 #include <arm/sunxi/sunxi_ccu.h>
41 #include <arm/sunxi/sun8i_h3_r_ccu.h>
42 
43 #define	AR100_CFG_REG		0x00
44 #define	APB0_CFG_REG		0x0c
45 #define	APB0_GATE_REG		0x28
46 #define	APB0_RESET_REG		0xb0
47 
48 static int sun8i_h3_r_ccu_match(device_t, cfdata_t, void *);
49 static void sun8i_h3_r_ccu_attach(device_t, device_t, void *);
50 
51 static const struct device_compatible_entry compat_data[] = {
52 	{ .compat = "allwinner,sun8i-h3-r-ccu" },
53 	DEVICE_COMPAT_EOL
54 };
55 
56 CFATTACH_DECL_NEW(sunxi_h3_r_ccu, sizeof(struct sunxi_ccu_softc),
57 	sun8i_h3_r_ccu_match, sun8i_h3_r_ccu_attach, NULL, NULL);
58 
59 static struct sunxi_ccu_reset sun8i_h3_r_ccu_resets[] = {
60 	SUNXI_CCU_RESET(H3_R_RST_APB0_IR, APB0_RESET_REG, 1),
61 	SUNXI_CCU_RESET(H3_R_RST_APB0_TIMER, APB0_RESET_REG, 2),
62 	SUNXI_CCU_RESET(H3_R_RST_APB0_UART, APB0_RESET_REG, 4),
63 	SUNXI_CCU_RESET(H3_R_RST_APB0_I2C, APB0_RESET_REG, 6),
64 };
65 
66 static const char *ar100_parents[] = { "losc", "hosc", "pll_periph0", "losc" };
67 static const char *apb0_parents[] = { "ahb0" };
68 
69 static struct sunxi_ccu_clk sun8i_h3_r_ccu_clks[] = {
70 	SUNXI_CCU_PREDIV(H3_R_CLK_AR100, "ar100", ar100_parents,
71 	    AR100_CFG_REG,	/* reg */
72 	    __BITS(12,8),	/* prediv */
73 	    __BIT(2),		/* prediv_sel */
74 	    __BITS(5,4),	/* div */
75 	    __BITS(17,16),	/* sel */
76 	    SUNXI_CCU_PREDIV_POWER_OF_TWO),
77 
78 	SUNXI_CCU_FIXED_FACTOR(H3_R_CLK_AHB0, "ahb0", "ar100", 1, 1),
79 
80 	SUNXI_CCU_DIV(H3_R_CLK_APB0, "apb0", apb0_parents,
81 	    APB0_CFG_REG,	/* reg */
82 	    __BITS(1,0),	/* div */
83 	    0,			/* sel */
84 	    SUNXI_CCU_DIV_POWER_OF_TWO),
85 
86 	SUNXI_CCU_GATE(H3_R_CLK_APB0_PIO, "apb0-pio", "apb0",
87 	    APB0_GATE_REG, 0),
88 	SUNXI_CCU_GATE(H3_R_CLK_APB0_IR, "apb0-ir", "apb0",
89 	    APB0_GATE_REG, 1),
90 	SUNXI_CCU_GATE(H3_R_CLK_APB0_TIMER, "apb0-timer", "apb0",
91 	    APB0_GATE_REG, 2),
92 	SUNXI_CCU_GATE(H3_R_CLK_APB0_UART, "apb0-uart", "apb0",
93 	    APB0_GATE_REG, 4),
94 	SUNXI_CCU_GATE(H3_R_CLK_APB0_I2C, "apb0-i2c", "apb0",
95 	    APB0_GATE_REG, 6),
96 };
97 
98 static int
sun8i_h3_r_ccu_match(device_t parent,cfdata_t cf,void * aux)99 sun8i_h3_r_ccu_match(device_t parent, cfdata_t cf, void *aux)
100 {
101 	struct fdt_attach_args * const faa = aux;
102 
103 	return of_compatible_match(faa->faa_phandle, compat_data);
104 }
105 
106 static void
sun8i_h3_r_ccu_attach(device_t parent,device_t self,void * aux)107 sun8i_h3_r_ccu_attach(device_t parent, device_t self, void *aux)
108 {
109 	struct sunxi_ccu_softc * const sc = device_private(self);
110 	struct fdt_attach_args * const faa = aux;
111 
112 	sc->sc_dev = self;
113 	sc->sc_phandle = faa->faa_phandle;
114 	sc->sc_bst = faa->faa_bst;
115 
116 	sc->sc_resets = sun8i_h3_r_ccu_resets;
117 	sc->sc_nresets = __arraycount(sun8i_h3_r_ccu_resets);
118 
119 	sc->sc_clks = sun8i_h3_r_ccu_clks;
120 	sc->sc_nclks = __arraycount(sun8i_h3_r_ccu_clks);
121 
122 	if (sunxi_ccu_attach(sc) != 0)
123 		return;
124 
125 	aprint_naive("\n");
126 	aprint_normal(": H3 PRCM CCU\n");
127 
128 	sunxi_ccu_print(sc);
129 }
130