1 /* $NetBSD: sun8i_a83t_ccu.h,v 1.2 2017/10/28 12:07:40 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _SUN8I_A83T_CCU_H 30 #define _SUN8I_A83T_CCU_H 31 32 #define A83T_RST_USB_PHY0 0 33 #define A83T_RST_USB_PHY1 1 34 #define A83T_RST_USB_HSIC 2 35 #define A83T_RST_DRAM 3 36 #define A83T_RST_MBUS 4 37 #define A83T_RST_BUS_MIPI_DSI 5 38 #define A83T_RST_BUS_SS 6 39 #define A83T_RST_BUS_DMA 7 40 #define A83T_RST_BUS_MMC0 8 41 #define A83T_RST_BUS_MMC1 9 42 #define A83T_RST_BUS_MMC2 10 43 #define A83T_RST_BUS_NAND 11 44 #define A83T_RST_BUS_DRAM 12 45 #define A83T_RST_BUS_EMAC 13 46 #define A83T_RST_BUS_HSTIMER 14 47 #define A83T_RST_BUS_SPI0 15 48 #define A83T_RST_BUS_SPI1 16 49 #define A83T_RST_BUS_OTG 17 50 #define A83T_RST_BUS_EHCI0 18 51 #define A83T_RST_BUS_EHCI1 19 52 #define A83T_RST_BUS_OHCI0 20 53 #define A83T_RST_BUS_VE 21 54 #define A83T_RST_BUS_TCON0 22 55 #define A83T_RST_BUS_TCON1 23 56 #define A83T_RST_BUS_CSI 24 57 #define A83T_RST_BUS_HDMI0 25 58 #define A83T_RST_BUS_HDMI1 26 59 #define A83T_RST_BUS_DE 27 60 #define A83T_RST_BUS_GPU 28 61 #define A83T_RST_BUS_MSGBOX 29 62 #define A83T_RST_BUS_SPINLOCK 30 63 #define A83T_RST_BUS_LVDS 31 64 #define A83T_RST_BUS_SPDIF 32 65 #define A83T_RST_BUS_I2S0 33 66 #define A83T_RST_BUS_I2S1 34 67 #define A83T_RST_BUS_I2S2 35 68 #define A83T_RST_BUS_TDM 36 69 #define A83T_RST_BUS_I2C0 37 70 #define A83T_RST_BUS_I2C1 38 71 #define A83T_RST_BUS_I2C2 39 72 #define A83T_RST_BUS_UART0 40 73 #define A83T_RST_BUS_UART1 41 74 #define A83T_RST_BUS_UART2 42 75 #define A83T_RST_BUS_UART3 43 76 #define A83T_RST_BUS_UART4 44 77 78 #define A83T_CLK_PLL_C0CPUX 0 79 #define A83T_CLK_PLL_C1CPUX 1 80 #define A83T_CLK_PLL_AUDIO 2 81 #define A83T_CLK_PLL_VIDEO0 3 82 #define A83T_CLK_PLL_VE 4 83 #define A83T_CLK_PLL_DDR 5 84 #define A83T_CLK_PLL_PERIPH 6 85 #define A83T_CLK_PLL_GPU 7 86 #define A83T_CLK_PLL_HSIC 8 87 #define A83T_CLK_PLL_DE 9 88 #define A83T_CLK_PLL_VIDEO1 10 89 #define A83T_CLK_C0CPUX 11 90 #define A83T_CLK_C1CPUX 12 91 #define A83T_CLK_AXI0 13 92 #define A83T_CLK_AXI1 14 93 #define A83T_CLK_AHB1 15 94 #define A83T_CLK_AHB2 16 95 #define A83T_CLK_APB1 17 96 #define A83T_CLK_APB2 18 97 #define A83T_CLK_BUS_MIPI_DSI 19 98 #define A83T_CLK_BUS_SS 20 99 #define A83T_CLK_BUS_DMA 21 100 #define A83T_CLK_BUS_MMC0 22 101 #define A83T_CLK_BUS_MMC1 23 102 #define A83T_CLK_BUS_MMC2 24 103 #define A83T_CLK_BUS_NAND 25 104 #define A83T_CLK_BUS_DRAM 26 105 #define A83T_CLK_BUS_EMAC 27 106 #define A83T_CLK_BUS_HSTIMER 28 107 #define A83T_CLK_BUS_SPI0 29 108 #define A83T_CLK_BUS_SPI1 30 109 #define A83T_CLK_BUS_OTG 31 110 #define A83T_CLK_BUS_EHCI0 32 111 #define A83T_CLK_BUS_EHCI1 33 112 #define A83T_CLK_BUS_OHCI0 34 113 #define A83T_CLK_BUS_VE 35 114 #define A83T_CLK_BUS_TCON0 36 115 #define A83T_CLK_BUS_TCON1 37 116 #define A83T_CLK_BUS_CSI 38 117 #define A83T_CLK_BUS_HDMI 39 118 #define A83T_CLK_BUS_DE 40 119 #define A83T_CLK_BUS_GPU 41 120 #define A83T_CLK_BUS_MSGBOX 42 121 #define A83T_CLK_BUS_SPINLOCK 43 122 #define A83T_CLK_BUS_SPDIF 44 123 #define A83T_CLK_BUS_PIO 45 124 #define A83T_CLK_BUS_I2S0 46 125 #define A83T_CLK_BUS_I2S1 47 126 #define A83T_CLK_BUS_I2S2 48 127 #define A83T_CLK_BUS_TDM 49 128 #define A83T_CLK_BUS_I2C0 50 129 #define A83T_CLK_BUS_I2C1 51 130 #define A83T_CLK_BUS_I2C2 52 131 #define A83T_CLK_BUS_UART0 53 132 #define A83T_CLK_BUS_UART1 54 133 #define A83T_CLK_BUS_UART2 55 134 #define A83T_CLK_BUS_UART3 56 135 #define A83T_CLK_BUS_UART4 57 136 #define A83T_CLK_CCI400 58 137 #define A83T_CLK_NAND 59 138 #define A83T_CLK_MMC0 60 139 #define A83T_CLK_MMC0_SAMPLE 61 140 #define A83T_CLK_MMC0_OUTPUT 62 141 #define A83T_CLK_MMC1 63 142 #define A83T_CLK_MMC1_SAMPLE 64 143 #define A83T_CLK_MMC1_OUTPUT 65 144 #define A83T_CLK_MMC2 66 145 #define A83T_CLK_MMC2_SAMPLE 67 146 #define A83T_CLK_MMC2_OUTPUT 68 147 #define A83T_CLK_SS 69 148 #define A83T_CLK_SPI0 70 149 #define A83T_CLK_SPI1 71 150 #define A83T_CLK_I2S0 72 151 #define A83T_CLK_I2S1 73 152 #define A83T_CLK_I2S2 74 153 #define A83T_CLK_TDM 75 154 #define A83T_CLK_SPDIF 76 155 #define A83T_CLK_USB_PHY0 77 156 #define A83T_CLK_USB_PHY1 78 157 #define A83T_CLK_USB_HSIC 79 158 #define A83T_CLK_USB_HSIC_12M 80 159 #define A83T_CLK_USB_OHCI0 81 160 #define A83T_CLK_DRAM 82 161 #define A83T_CLK_DRAM_VE 83 162 #define A83T_CLK_DRAM_CSI 84 163 #define A83T_CLK_TCON0 85 164 #define A83T_CLK_TCON1 86 165 #define A83T_CLK_CSI_MISC 87 166 #define A83T_CLK_MIPI_CSI 88 167 #define A83T_CLK_CSI_MCLK 89 168 #define A83T_CLK_CSI_SCLK 90 169 #define A83T_CLK_VE 91 170 #define A83T_CLK_AVS 92 171 #define A83T_CLK_HDMI 93 172 #define A83T_CLK_HDMI_SLOW 94 173 #define A83T_CLK_MBUS 95 174 #define A83T_CLK_MIPI_DSI0 96 175 #define A83T_CLK_MIPI_DSI1 97 176 #define A83T_CLK_GPU_CORE 98 177 #define A83T_CLK_GPU_MEMORY 99 178 #define A83T_CLK_GPU_HYD 100 179 180 #endif /* !_SUN8I_A83T_CCU_H */ 181