1 /* $NetBSD: sun50i_a64_r_ccu.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2017-2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30
31 __KERNEL_RCSID(1, "$NetBSD: sun50i_a64_r_ccu.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
32
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/systm.h>
37
38 #include <dev/fdt/fdtvar.h>
39
40 #include <arm/sunxi/sunxi_ccu.h>
41 #include <arm/sunxi/sun50i_a64_r_ccu.h>
42
43 #define AR100_CFG_REG 0x00
44 #define APB0_CFG_REG 0x0c
45 #define APB0_GATE_REG 0x28
46 #define IR_CFG_REG 0x54
47 #define APB0_RESET_REG 0xb0
48
49 static int sun50i_a64_r_ccu_match(device_t, cfdata_t, void *);
50 static void sun50i_a64_r_ccu_attach(device_t, device_t, void *);
51
52 static const struct device_compatible_entry compat_data[] = {
53 { .compat = "allwinner,sun50i-a64-r-ccu" },
54 DEVICE_COMPAT_EOL
55 };
56
57 CFATTACH_DECL_NEW(sunxi_a64_r_ccu, sizeof(struct sunxi_ccu_softc),
58 sun50i_a64_r_ccu_match, sun50i_a64_r_ccu_attach, NULL, NULL);
59
60 static struct sunxi_ccu_reset sun50i_a64_r_ccu_resets[] = {
61 SUNXI_CCU_RESET(A64_R_RST_APB0_IR, APB0_RESET_REG, 1),
62 SUNXI_CCU_RESET(A64_R_RST_APB0_TIMER, APB0_RESET_REG, 2),
63 SUNXI_CCU_RESET(A64_R_RST_APB0_RSB, APB0_RESET_REG, 3),
64 SUNXI_CCU_RESET(A64_R_RST_APB0_UART, APB0_RESET_REG, 4),
65 SUNXI_CCU_RESET(A64_R_RST_APB0_I2C, APB0_RESET_REG, 6),
66 };
67
68 static const char *ar100_parents[] = { "losc", "hosc", "pll_periph0", "losc" };
69 static const char *apb0_parents[] = { "ahb0" };
70 static const char *mod_parents[] = { "losc", "hosc" };
71
72 static struct sunxi_ccu_clk sun50i_a64_r_ccu_clks[] = {
73 SUNXI_CCU_PREDIV(A64_R_CLK_AR100, "ar100", ar100_parents,
74 AR100_CFG_REG, /* reg */
75 __BITS(12,8), /* prediv */
76 __BIT(2), /* prediv_sel */
77 __BITS(5,4), /* div */
78 __BITS(17,16), /* sel */
79 SUNXI_CCU_PREDIV_POWER_OF_TWO),
80
81 SUNXI_CCU_FIXED_FACTOR(A64_R_CLK_AHB0, "ahb0", "ar100", 1, 1),
82
83 SUNXI_CCU_DIV(A64_R_CLK_APB0, "apb0", apb0_parents,
84 APB0_CFG_REG, /* reg */
85 __BITS(1,0), /* div */
86 0, /* sel */
87 SUNXI_CCU_DIV_POWER_OF_TWO),
88
89 SUNXI_CCU_GATE(A64_R_CLK_APB0_PIO, "apb0-pio", "apb0",
90 APB0_GATE_REG, 0),
91 SUNXI_CCU_GATE(A64_R_CLK_APB0_IR, "apb0-ir", "apb0",
92 APB0_GATE_REG, 1),
93 SUNXI_CCU_GATE(A64_R_CLK_APB0_TIMER, "apb0-timer", "apb0",
94 APB0_GATE_REG, 2),
95 SUNXI_CCU_GATE(A64_R_CLK_APB0_RSB, "apb0-rsb", "apb0",
96 APB0_GATE_REG, 3),
97 SUNXI_CCU_GATE(A64_R_CLK_APB0_UART, "apb0-uart", "apb0",
98 APB0_GATE_REG, 4),
99 SUNXI_CCU_GATE(A64_R_CLK_APB0_I2C, "apb0-i2c", "apb0",
100 APB0_GATE_REG, 6),
101 SUNXI_CCU_GATE(A64_R_CLK_APB0_TWD, "apb0-twd", "apb0",
102 APB0_GATE_REG, 7),
103 SUNXI_CCU_NM(A64_R_CLK_IR, "ir", mod_parents,
104 IR_CFG_REG, /* reg */
105 __BITS(3,0), /* n */
106 __BITS(17,16), /* m */
107 __BITS(25,24), /* sel */
108 __BIT(31), /* enable */
109 0)
110 };
111
112 static int
sun50i_a64_r_ccu_match(device_t parent,cfdata_t cf,void * aux)113 sun50i_a64_r_ccu_match(device_t parent, cfdata_t cf, void *aux)
114 {
115 struct fdt_attach_args * const faa = aux;
116
117 return of_compatible_match(faa->faa_phandle, compat_data);
118 }
119
120 static void
sun50i_a64_r_ccu_attach(device_t parent,device_t self,void * aux)121 sun50i_a64_r_ccu_attach(device_t parent, device_t self, void *aux)
122 {
123 struct sunxi_ccu_softc * const sc = device_private(self);
124 struct fdt_attach_args * const faa = aux;
125
126 sc->sc_dev = self;
127 sc->sc_phandle = faa->faa_phandle;
128 sc->sc_bst = faa->faa_bst;
129
130 sc->sc_resets = sun50i_a64_r_ccu_resets;
131 sc->sc_nresets = __arraycount(sun50i_a64_r_ccu_resets);
132
133 sc->sc_clks = sun50i_a64_r_ccu_clks;
134 sc->sc_nclks = __arraycount(sun50i_a64_r_ccu_clks);
135
136 if (sunxi_ccu_attach(sc) != 0)
137 return;
138
139 aprint_naive("\n");
140 aprint_normal(": A64 PRCM CCU\n");
141
142 sunxi_ccu_print(sc);
143 }
144