1 /* $NetBSD: sun50i_a64_ccu.h,v 1.1 2017/09/07 01:07:04 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _SUN50I_A64_CCU_H 30 #define _SUN50I_A64_CCU_H 31 32 #define A64_RST_USB_PHY0 0 33 #define A64_RST_USB_PHY1 1 34 #define A64_RST_USB_HSIC 2 35 #define A64_RST_DRAM 3 36 #define A64_RST_MBUS 4 37 #define A64_RST_BUS_MIPI_DSI 5 38 #define A64_RST_BUS_CE 6 39 #define A64_RST_BUS_DMA 7 40 #define A64_RST_BUS_MMC0 8 41 #define A64_RST_BUS_MMC1 9 42 #define A64_RST_BUS_MMC2 10 43 #define A64_RST_BUS_NAND 11 44 #define A64_RST_BUS_DRAM 12 45 #define A64_RST_BUS_EMAC 13 46 #define A64_RST_BUS_TS 14 47 #define A64_RST_BUS_HSTIMER 15 48 #define A64_RST_BUS_SPI0 16 49 #define A64_RST_BUS_SPI1 17 50 #define A64_RST_BUS_OTG 18 51 #define A64_RST_BUS_EHCI0 19 52 #define A64_RST_BUS_EHCI1 20 53 #define A64_RST_BUS_OHCI0 21 54 #define A64_RST_BUS_OHCI1 22 55 #define A64_RST_BUS_VE 23 56 #define A64_RST_BUS_TCON0 24 57 #define A64_RST_BUS_TCON1 25 58 #define A64_RST_BUS_DEINTERLACE 26 59 #define A64_RST_BUS_CSI 27 60 #define A64_RST_BUS_HDMI0 28 61 #define A64_RST_BUS_HDMI1 29 62 #define A64_RST_BUS_DE 30 63 #define A64_RST_BUS_GPU 31 64 #define A64_RST_BUS_MSGBOX 32 65 #define A64_RST_BUS_SPINLOCK 33 66 #define A64_RST_BUS_DBG 34 67 #define A64_RST_BUS_LVDS 35 68 #define A64_RST_BUS_CODEC 36 69 #define A64_RST_BUS_SPDIF 37 70 #define A64_RST_BUS_THS 38 71 #define A64_RST_BUS_I2S0 39 72 #define A64_RST_BUS_I2S1 40 73 #define A64_RST_BUS_I2S2 41 74 #define A64_RST_BUS_I2C0 42 75 #define A64_RST_BUS_I2C1 43 76 #define A64_RST_BUS_I2C2 44 77 #define A64_RST_BUS_SCR 45 78 #define A64_RST_BUS_UART0 46 79 #define A64_RST_BUS_UART1 47 80 #define A64_RST_BUS_UART2 48 81 #define A64_RST_BUS_UART3 49 82 #define A64_RST_BUS_UART4 50 83 84 #define A64_CLK_OSC_12M 0 85 #define A64_CLK_PLL_CPUX 1 86 #define A64_CLK_PLL_AUDIO_BASE 2 87 #define A64_CLK_PLL_AUDIO 3 88 #define A64_CLK_PLL_AUDIO_2X 4 89 #define A64_CLK_PLL_AUDIO_4X 5 90 #define A64_CLK_PLL_AUDIO_8X 6 91 #define A64_CLK_PLL_VIDEO0 7 92 #define A64_CLK_PLL_VIDEO0_2X 8 93 #define A64_CLK_PLL_VE 9 94 #define A64_CLK_PLL_DDR0 10 95 #define A64_CLK_PLL_PERIPH0 11 96 #define A64_CLK_PLL_PERIPH0_2X 12 97 #define A64_CLK_PLL_PERIPH1 13 98 #define A64_CLK_PLL_PERIPH1_2X 14 99 #define A64_CLK_PLL_VIDEO1 15 100 #define A64_CLK_PLL_GPU 16 101 #define A64_CLK_PLL_MIPI 17 102 #define A64_CLK_PLL_HSIC 18 103 #define A64_CLK_PLL_DE 19 104 #define A64_CLK_PLL_DDR1 20 105 #define A64_CLK_CPUX 21 106 #define A64_CLK_AXI 22 107 #define A64_CLK_APB 23 108 #define A64_CLK_AHB1 24 109 #define A64_CLK_APB1 25 110 #define A64_CLK_APB2 26 111 #define A64_CLK_AHB2 27 112 #define A64_CLK_BUS_MIPI_DSI 28 113 #define A64_CLK_BUS_CE 29 114 #define A64_CLK_BUS_DMA 30 115 #define A64_CLK_BUS_MMC0 31 116 #define A64_CLK_BUS_MMC1 32 117 #define A64_CLK_BUS_MMC2 33 118 #define A64_CLK_BUS_NAND 34 119 #define A64_CLK_BUS_DRAM 35 120 #define A64_CLK_BUS_EMAC 36 121 #define A64_CLK_BUS_TS 37 122 #define A64_CLK_BUS_HSTIMER 38 123 #define A64_CLK_BUS_SPI0 39 124 #define A64_CLK_BUS_SPI1 40 125 #define A64_CLK_BUS_OTG 41 126 #define A64_CLK_BUS_EHCI0 42 127 #define A64_CLK_BUS_EHCI1 43 128 #define A64_CLK_BUS_OHCI0 44 129 #define A64_CLK_BUS_OHCI1 45 130 #define A64_CLK_BUS_VE 46 131 #define A64_CLK_BUS_TCON0 47 132 #define A64_CLK_BUS_TCON1 48 133 #define A64_CLK_BUS_DEINTERLACE 49 134 #define A64_CLK_BUS_CSI 50 135 #define A64_CLK_BUS_HDMI 51 136 #define A64_CLK_BUS_DE 52 137 #define A64_CLK_BUS_GPU 53 138 #define A64_CLK_BUS_MSGBOX 54 139 #define A64_CLK_BUS_SPINLOCK 55 140 #define A64_CLK_BUS_CODEC 56 141 #define A64_CLK_BUS_SPDIF 57 142 #define A64_CLK_BUS_PIO 58 143 #define A64_CLK_BUS_THS 59 144 #define A64_CLK_BUS_I2S0 60 145 #define A64_CLK_BUS_I2S1 61 146 #define A64_CLK_BUS_I2S2 62 147 #define A64_CLK_BUS_I2C0 63 148 #define A64_CLK_BUS_I2C1 64 149 #define A64_CLK_BUS_I2C2 65 150 #define A64_CLK_BUS_SCR 66 151 #define A64_CLK_BUS_UART0 67 152 #define A64_CLK_BUS_UART1 68 153 #define A64_CLK_BUS_UART2 69 154 #define A64_CLK_BUS_UART3 70 155 #define A64_CLK_BUS_UART4 71 156 #define A64_CLK_BUS_DBG 72 157 #define A64_CLK_THS 73 158 #define A64_CLK_NAND 74 159 #define A64_CLK_MMC0 75 160 #define A64_CLK_MMC1 76 161 #define A64_CLK_MMC2 77 162 #define A64_CLK_TS 78 163 #define A64_CLK_CE 79 164 #define A64_CLK_SPI0 80 165 #define A64_CLK_SPI1 81 166 #define A64_CLK_I2S0 82 167 #define A64_CLK_I2S1 83 168 #define A64_CLK_I2S2 84 169 #define A64_CLK_SPDIF 85 170 #define A64_CLK_USB_PHY0 86 171 #define A64_CLK_USB_PHY1 87 172 #define A64_CLK_USB_HSIC 88 173 #define A64_CLK_USB_HSIC_12M 89 174 #define A64_CLK_USB_OHCI0_12M 90 175 #define A64_CLK_USB_OHCI0 91 176 #define A64_CLK_USB_OHCI1_12M 92 177 #define A64_CLK_USB_OHCI1 93 178 #define A64_CLK_DRAM 94 179 #define A64_CLK_DRAM_VE 95 180 #define A64_CLK_DRAM_CSI 96 181 #define A64_CLK_DRAM_DEINTERLACE 97 182 #define A64_CLK_DRAM_TS 98 183 #define A64_CLK_DE 99 184 #define A64_CLK_TCON0 100 185 #define A64_CLK_TCON1 101 186 #define A64_CLK_DEINTERLACE 102 187 #define A64_CLK_CSI_MISC 103 188 #define A64_CLK_CSI_SCLK 104 189 #define A64_CLK_CSI_MCLK 105 190 #define A64_CLK_VE 106 191 #define A64_CLK_AC_DIG 107 192 #define A64_CLK_AC_DIG_4X 108 193 #define A64_CLK_AVS 109 194 #define A64_CLK_HDMI 110 195 #define A64_CLK_HDMI_DDC 111 196 #define A64_CLK_MBUS 112 197 #define A64_CLK_DSI_DPHY 113 198 #define A64_CLK_GPU 114 199 200 #endif /* !_SUN50I_A64_CCU_H */ 201