xref: /netbsd-src/sys/arch/arm/nxp/imx6_usbreg.h (revision 90313c06e62e910bf0d1bb24faa9d17dcefd0ab6)
1 /*	$NetBSD: imx6_usbreg.h,v 1.2 2024/02/07 04:20:27 msaitoh Exp $	*/
2 
3 /*
4  * Copyright (c) 2014 Ryo Shimizu
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #ifndef _IMX6_USBREG_H_
30 #define _IMX6_USBREG_H_
31 
32 #include <sys/cdefs.h>
33 
34 #define USBC_UOG_CAPLENGTH			0x00000100
35 #define USBC_UOG_PORTSC1			0x00000184
36 #define USBC_UOG_USBMODE			0x000001a8
37 #define  USBC_UOG_USBMODE_SDIS			__BIT(4)
38 #define  USBC_UOG_USBMODE_SLOM			__BIT(3)
39 #define  USBC_UOG_USBMODE_ES			__BIT(2)
40 #define  USBC_UOG_USBMODE_CM			__BITS(1, 0)
41 #define USBC_UH1_CAPLENGTH			0x00000300
42 #define USBC_UH1_PORTSC1			0x00000384
43 #define  USBC_UH_PORTSC1_PTS_1			__BITS(31, 30)
44 #define  USBC_UH_PORTSC1_PE			__BIT(2)
45 #define  USBC_UH_PORTSC1_PTS_2			__BIT(25)
46 #define  USBC_UH_PORTSC1_PTS_MASK		(__BITS(31, 30) | __BIT(25))
47 #define  USBC_UH_PORTSC1_PTS_UTMI		0
48 #define  USBC_UH_PORTSC1_PTS_ULPI		__BIT(31)
49 #define  USBC_UH_PORTSC1_PTS_SERIAL		(__BIT(31) | __BIT(30))
50 #define  USBC_UH_PORTSC1_PTS_HSIC		__BIT(25)
51 #define USBC_UH1_USBMODE			0x000003a8
52 #define  USBC_UH_USBMODE_SDIS			__BIT(4)
53 #define  USBC_UH_USBMODE_SLOM			__BIT(3)
54 #define  USBC_UH_USBMODE_ES			__BIT(2)
55 #define  USBC_UH_USBMODE_CM			__BITS(1, 0)
56 #define  USBC_UH_USBMODE_CM_IDLE		0
57 #define  USBC_UH_USBMODE_CM_DEVICE_CONTROLLER	2
58 #define  USBC_UH_USBMODE_CM_HOST_CONTROLLER	3
59 #define USBC_UH2_CAPLENGTH			0x00000500
60 #define USBC_UH2_PORTSC1			0x00000584
61 #define USBC_UH2_USBMODE			0x000005a8
62 #define USBC_UH3_CAPLENGTH			0x00000700
63 #define USBC_UH3_PORTSC1			0x00000784
64 #define USBC_UH3_USBMODE			0x000007a8
65 
66 #define USBNC_BASE				0x00000800
67 #define USBNC_SIZE				0x00000020
68 #define USBNC_USB_OTG_CTRL			0x00000000
69 #define  USBNC_USB_OTG_CTRL_WIR			__BIT(31)
70 #define  USBNC_USB_OTG_CTRL_WKUP_VBUS_EN	__BIT(17)
71 #define  USBNC_USB_OTG_CTRL_WKUP_ID_EN		__BIT(16)
72 #define  USBNC_USB_OTG_CTRL_WKUP_SW		__BIT(15)
73 #define  USBNC_USB_OTG_CTRL_WKUP_SW_EN		__BIT(14)
74 #define  USBNC_USB_OTG_CTRL_UTMI_ON_CLOCK	__BIT(13)
75 #define  USBNC_USB_OTG_CTRL_WIE			__BIT(10)
76 #define  USBNC_USB_OTG_CTRL_PWR_POL		__BIT(9)
77 #define  USBNC_USB_OTG_CTRL_OVER_CUR_POL	__BIT(8)
78 #define  USBNC_USB_OTG_CTRL_OVER_CUR_DIS	__BIT(7)
79 #define USBNC_USB_UH1_CTRL			0x00000004
80 #define  USBNC_USB_UH1_CTRL_WIR			__BIT(31)
81 #define  USBNC_USB_UH1_CTRL_WKUP_VBUS_EN	__BIT(17)
82 #define  USBNC_USB_UH1_CTRL_WKUP_ID_EN		__BIT(16)
83 #define  USBNC_USB_UH1_CTRL_WKUP_SW		__BIT(15)
84 #define  USBNC_USB_UH1_CTRL_WKUP_SW_EN		__BIT(14)
85 #define  USBNC_USB_UH1_CTRL_UTMI_ON_CLOCK	__BIT(13)
86 #define  USBNC_USB_UH1_CTRL_WIE			__BIT(10)
87 #define  USBNC_USB_UH1_CTRL_PWR_POL		__BIT(9)
88 #define  USBNC_USB_UH1_CTRL_OVER_CUR_POL	__BIT(8)
89 #define  USBNC_USB_UH1_CTRL_OVER_CUR_DIS	__BIT(7)
90 #define USBNC_USB_UH2_CTRL			0x00000008
91 #define  USBNC_USB_UH2_CTRL_WKUP_SW		__BIT(15)
92 #define  USBNC_USB_UH2_CTRL_WKUP_SW_EN		__BIT(14)
93 #define  USBNC_USB_UH2_CTRL_UTMI_ON_CLOCK	__BIT(13)
94 #define  USBNC_USB_UH2_CTRL_WIE			__BIT(10)
95 #define USBNC_USB_UH3_CTRL			0x0000000c
96 #define  USBNC_USB_UH3_CTRL_WKUP_SW		__BIT(15)
97 #define  USBNC_USB_UH3_CTRL_WKUP_SW_EN		__BIT(14)
98 #define  USBNC_USB_UH3_CTRL_UTMI_ON_CLOCK	__BIT(13)
99 #define  USBNC_USB_UH3_CTRL_WIE			__BIT(10)
100 #define USBNC_USB_UH2_HSIC_CTRL			0x00000010
101 #define  USBNC_USB_UH2_HSIC_CTRL_CLK_VLK	__BIT(31)
102 #define  USBNC_USB_UH2_HSIC_CTRL_HSIC_EN	__BIT(12)
103 #define  USBNC_USB_UH2_HSIC_CTRL_HSIC_CLK_ON	__BIT(11)
104 #define USBNC_USB_UH3_HSIC_CTRL			0x00000014
105 #define  USBNC_USB_UH3_HSIC_CTRL_CLK_VLK	__BIT(31)
106 #define  USBNC_USB_UH3_HSIC_CTRL_HSIC_EN	__BIT(12)
107 #define  USBNC_USB_UH3_HSIC_CTRL_HSIC_CLK_ON	__BIT(11)
108 #define USBNC_USB_OTG_PHY_CTRL_0		0x00000018
109 #define  USBNC_USB_OTG_PHY_CTRL_0_UTMI_CLK_VLD	__BIT(31)
110 #define USBNC_USB_UH1_PHY_CTRL_0		0x0000001c
111 #define  USBNC_USB_UH1_PHY_CTRL_0_UTMI_CLK_VLD	__BIT(31)
112 
113 #endif /* _IMX6_USBREG_H_ */
114