1 /* $NetBSD: imx6_gpc.c,v 1.4 2023/05/04 13:29:33 bouyer Exp $ */
2
3 /*-
4 * Copyright (c) 2019 Genetec Corporation. All rights reserved.
5 * Written by Hashimoto Kenichi for Genetec Corporation.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: imx6_gpc.c,v 1.4 2023/05/04 13:29:33 bouyer Exp $");
31
32 #include "opt_fdt.h"
33
34 #include <sys/param.h>
35 #include <sys/bus.h>
36 #include <sys/device.h>
37
38 #include <dev/fdt/fdtvar.h>
39
40 #include <arm/cortex/gic_intr.h>
41 #include <arm/nxp/imx6_gpcreg.h>
42
43 struct imxgpc_softc {
44 device_t sc_dev;
45
46 bus_space_tag_t sc_iot;
47 bus_space_handle_t sc_ioh;
48 };
49
50 static int imxgpc_match(device_t, struct cfdata *, void *);
51 static void imxgpc_attach(device_t, device_t, void *);
52
53 static void *imxgpc_establish(device_t, u_int *, int, int,
54 int (*)(void *), void *, const char *);
55 static void imxgpc_disestablish(device_t, void *);
56 static bool imxgpc_intrstr(device_t, u_int *, char *, size_t);
57
58 struct fdtbus_interrupt_controller_func imxgpc_funcs = {
59 .establish = imxgpc_establish,
60 .disestablish = imxgpc_disestablish,
61 .intrstr = imxgpc_intrstr
62 };
63
64 CFATTACH_DECL_NEW(imxgpc, sizeof(struct imxgpc_softc),
65 imxgpc_match, imxgpc_attach, NULL, NULL);
66
67 static const struct device_compatible_entry compat_data[] = {
68 { .compat = "fsl,imx6q-gpc" },
69 { .compat = "fsl,imx6sx-gpc" },
70 DEVICE_COMPAT_EOL
71 };
72
73 static int
imxgpc_match(device_t parent,cfdata_t cf,void * aux)74 imxgpc_match(device_t parent, cfdata_t cf, void *aux)
75 {
76 struct fdt_attach_args * const faa = aux;
77
78 return of_compatible_match(faa->faa_phandle, compat_data);
79 }
80
81 static void
imxgpc_attach(device_t parent,device_t self,void * aux)82 imxgpc_attach(device_t parent, device_t self, void *aux)
83 {
84 struct imxgpc_softc * const sc = device_private(self);
85 struct fdt_attach_args * const faa = aux;
86 const int phandle = faa->faa_phandle;
87 bus_addr_t gpc_addr;
88 bus_size_t gpc_size;
89 int error;
90
91 if (fdtbus_get_reg(phandle, 0, &gpc_addr, &gpc_size) != 0) {
92 aprint_error(": couldn't get gpc registers\n");
93 return;
94 }
95
96 sc->sc_dev = self;
97 sc->sc_iot = faa->faa_bst;
98
99 error = bus_space_map(sc->sc_iot, gpc_addr, gpc_size, 0,
100 &sc->sc_ioh);
101 if (error) {
102 aprint_error(": couldn't map gpc registers: %d\n", error);
103 return;
104 }
105
106 error = fdtbus_register_interrupt_controller(self, faa->faa_phandle,
107 &imxgpc_funcs);
108 if (error) {
109 aprint_error(": couldn't register with fdtbus: %d\n", error);
110 return;
111 }
112
113 aprint_naive("\n");
114 aprint_normal(": General Power Controller\n");
115
116 return;
117 }
118
119 static void *
imxgpc_establish(device_t dev,u_int * specifier,int ipl,int flags,int (* func)(void *),void * arg,const char * xname)120 imxgpc_establish(device_t dev, u_int *specifier, int ipl, int flags,
121 int (*func)(void *), void *arg, const char *xname)
122 {
123 /* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
124 /* 2nd cell is the interrupt number */
125 /* 3rd cell is flags */
126
127 const u_int type = be32toh(specifier[0]);
128 const u_int intr = be32toh(specifier[1]);
129 const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
130 const u_int trig = be32toh(specifier[2]) & 0xf;
131 const u_int level = (trig & 0x3) ? IST_EDGE : IST_LEVEL;
132
133 const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;
134
135 aprint_debug_dev(dev, "intr establish irq %d, level %d\n", irq, level);
136 return intr_establish_xname(irq, ipl, level | mpsafe, func, arg,
137 xname);
138 }
139
140 static void
imxgpc_disestablish(device_t dev,void * ih)141 imxgpc_disestablish(device_t dev, void *ih)
142 {
143 intr_disestablish(ih);
144 }
145
146 static bool
imxgpc_intrstr(device_t dev,u_int * specifier,char * buf,size_t buflen)147 imxgpc_intrstr(device_t dev, u_int *specifier, char *buf, size_t buflen)
148 {
149 /* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
150 /* 2nd cell is the interrupt number */
151 /* 3rd cell is flags */
152
153 if (!specifier)
154 return false;
155
156 const u_int type = be32toh(specifier[0]);
157 const u_int intr = be32toh(specifier[1]);
158 const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
159
160 snprintf(buf, buflen, "irq %d", irq);
161
162 return true;
163 }
164