1 /* $NetBSD: tegra_pmc.c,v 1.7 2015/10/17 21:14:49 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "locators.h" 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: tegra_pmc.c,v 1.7 2015/10/17 21:14:49 jmcneill Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/device.h> 37 #include <sys/intr.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 41 #include <arm/nvidia/tegra_reg.h> 42 #include <arm/nvidia/tegra_pmcreg.h> 43 #include <arm/nvidia/tegra_var.h> 44 45 static int tegra_pmc_match(device_t, cfdata_t, void *); 46 static void tegra_pmc_attach(device_t, device_t, void *); 47 48 struct tegra_pmc_softc { 49 device_t sc_dev; 50 bus_space_tag_t sc_bst; 51 bus_space_handle_t sc_bsh; 52 }; 53 54 static struct tegra_pmc_softc *pmc_softc = NULL; 55 56 CFATTACH_DECL_NEW(tegra_pmc, sizeof(struct tegra_pmc_softc), 57 tegra_pmc_match, tegra_pmc_attach, NULL, NULL); 58 59 static int 60 tegra_pmc_match(device_t parent, cfdata_t cf, void *aux) 61 { 62 return 1; 63 } 64 65 static void 66 tegra_pmc_attach(device_t parent, device_t self, void *aux) 67 { 68 struct tegra_pmc_softc * const sc = device_private(self); 69 struct tegraio_attach_args * const tio = aux; 70 const struct tegra_locators * const loc = &tio->tio_loc; 71 72 sc->sc_dev = self; 73 sc->sc_bst = tio->tio_bst; 74 bus_space_subregion(tio->tio_bst, tio->tio_bsh, 75 loc->loc_offset, loc->loc_size, &sc->sc_bsh); 76 77 KASSERT(pmc_softc == NULL); 78 pmc_softc = sc; 79 80 aprint_naive("\n"); 81 aprint_normal(": PMC\n"); 82 } 83 84 static void 85 tegra_pmc_get_bs(bus_space_tag_t *pbst, bus_space_handle_t *pbsh) 86 { 87 if (pmc_softc) { 88 *pbst = pmc_softc->sc_bst; 89 *pbsh = pmc_softc->sc_bsh; 90 } else { 91 *pbst = &armv7_generic_bs_tag; 92 bus_space_subregion(*pbst, tegra_apb_bsh, 93 TEGRA_PMC_OFFSET, TEGRA_PMC_SIZE, pbsh); 94 } 95 } 96 97 void 98 tegra_pmc_reset(void) 99 { 100 bus_space_tag_t bst; 101 bus_space_handle_t bsh; 102 uint32_t cntrl; 103 104 tegra_pmc_get_bs(&bst, &bsh); 105 106 cntrl = bus_space_read_4(bst, bsh, PMC_CNTRL_0_REG); 107 cntrl |= PMC_CNTRL_0_MAIN_RST; 108 bus_space_write_4(bst, bsh, PMC_CNTRL_0_REG, cntrl); 109 110 for (;;) { 111 __asm("wfi"); 112 } 113 } 114 115 void 116 tegra_pmc_power(u_int partid, bool enable) 117 { 118 bus_space_tag_t bst; 119 bus_space_handle_t bsh; 120 uint32_t status, toggle; 121 bool state; 122 int retry = 10000; 123 124 tegra_pmc_get_bs(&bst, &bsh); 125 126 status = bus_space_read_4(bst, bsh, PMC_PWRGATE_STATUS_0_REG); 127 state = !!(status & __BIT(partid)); 128 if (state == enable) 129 return; 130 131 while (--retry > 0) { 132 toggle = bus_space_read_4(bst, bsh, PMC_PWRGATE_TOGGLE_0_REG); 133 if ((toggle & PMC_PWRGATE_TOGGLE_0_START) == 0) 134 break; 135 delay(1); 136 } 137 if (retry == 0) { 138 printf("ERROR: Couldn't enable PMC partition %#x\n", partid); 139 return; 140 } 141 142 bus_space_write_4(bst, bsh, PMC_PWRGATE_TOGGLE_0_REG, 143 __SHIFTIN(partid, PMC_PWRGATE_TOGGLE_0_PARTID) | 144 PMC_PWRGATE_TOGGLE_0_START); 145 } 146 147 void 148 tegra_pmc_remove_clamping(u_int partid) 149 { 150 bus_space_tag_t bst; 151 bus_space_handle_t bsh; 152 153 tegra_pmc_get_bs(&bst, &bsh); 154 155 if (tegra_chip_id() == CHIP_ID_TEGRA124) { 156 /* 157 * On Tegra124 the GPU power clamping is controlled by a 158 * separate register 159 */ 160 bus_space_write_4(bst, bsh, PMC_GPU_RG_CNTRL_REG, 0); 161 return; 162 } 163 164 bus_space_write_4(bst, bsh, PMC_REMOVE_CLAMPING_CMD_0_REG, 165 __BIT(partid)); 166 } 167 168 void 169 tegra_pmc_hdmi_enable(void) 170 { 171 bus_space_tag_t bst; 172 bus_space_handle_t bsh; 173 174 tegra_pmc_get_bs(&bst, &bsh); 175 176 tegra_reg_set_clear(bst, bsh, PMC_IO_DPD_STATUS_REG, 177 0, PMC_IO_DPD_STATUS_HDMI); 178 tegra_reg_set_clear(bst, bsh, PMC_IO_DPD2_STATUS_REG, 179 0, PMC_IO_DPD2_STATUS_HV); 180 } 181