xref: /netbsd-src/sys/arch/arm/nvidia/tegra_fuse.c (revision 63aea4bd5b445e491ff0389fe27ec78b3099dba3)
1 /* $NetBSD: tegra_fuse.c,v 1.3 2015/12/13 17:39:19 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include "locators.h"
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: tegra_fuse.c,v 1.3 2015/12/13 17:39:19 jmcneill Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/bus.h>
36 #include <sys/device.h>
37 #include <sys/intr.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 
41 #include <arm/nvidia/tegra_reg.h>
42 #include <arm/nvidia/tegra_var.h>
43 
44 #include <dev/fdt/fdtvar.h>
45 
46 static int	tegra_fuse_match(device_t, cfdata_t, void *);
47 static void	tegra_fuse_attach(device_t, device_t, void *);
48 
49 struct tegra_fuse_softc {
50 	device_t		sc_dev;
51 	bus_space_tag_t		sc_bst;
52 	bus_space_handle_t	sc_bsh;
53 };
54 
55 static struct tegra_fuse_softc *fuse_softc = NULL;
56 
57 CFATTACH_DECL_NEW(tegra_fuse, sizeof(struct tegra_fuse_softc),
58 	tegra_fuse_match, tegra_fuse_attach, NULL, NULL);
59 
60 static int
61 tegra_fuse_match(device_t parent, cfdata_t cf, void *aux)
62 {
63 	const char * const compatible[] = { "nvidia,tegra124-efuse", NULL };
64 	struct fdt_attach_args * const faa = aux;
65 
66 	return of_match_compatible(faa->faa_phandle, compatible);
67 }
68 
69 static void
70 tegra_fuse_attach(device_t parent, device_t self, void *aux)
71 {
72 	struct tegra_fuse_softc * const sc = device_private(self);
73 	struct fdt_attach_args * const faa = aux;
74 	bus_addr_t addr;
75 	bus_size_t size;
76 	int error;
77 
78 	if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
79 		aprint_error(": couldn't get registers\n");
80 		return;
81 	}
82 
83 	sc->sc_dev = self;
84 	sc->sc_bst = faa->faa_bst;
85 	error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
86 	if (error) {
87 		aprint_error(": couldn't map %#llx: %d", (uint64_t)addr, error);
88 		return;
89 	}
90 
91 	KASSERT(fuse_softc == NULL);
92 	fuse_softc = sc;
93 
94 	aprint_naive("\n");
95 	aprint_normal(": FUSE\n");
96 }
97 
98 uint32_t
99 tegra_fuse_read(u_int offset)
100 {
101 	bus_space_tag_t bst;
102 	bus_space_handle_t bsh;
103 
104 	if (fuse_softc) {
105 		bst = fuse_softc->sc_bst;
106 		bsh = fuse_softc->sc_bsh;
107 	} else {
108 		bst = &armv7_generic_bs_tag;
109 		bus_space_subregion(bst, tegra_apb_bsh,
110 		    TEGRA_FUSE_OFFSET, TEGRA_FUSE_SIZE, &bsh);
111 	}
112 
113 	tegra_car_fuse_enable();
114 	const uint32_t v = bus_space_read_4(bst, bsh, 0x100 + offset);
115 	tegra_car_fuse_disable();
116 
117 	return v;
118 }
119