1 /* $NetBSD: tegra_fuse.c,v 1.8 2019/10/13 06:11:31 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: tegra_fuse.c,v 1.8 2019/10/13 06:11:31 skrll Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 39 #include <arm/nvidia/tegra_reg.h> 40 #include <arm/nvidia/tegra_var.h> 41 42 #include <dev/fdt/fdtvar.h> 43 44 static int tegra_fuse_match(device_t, cfdata_t, void *); 45 static void tegra_fuse_attach(device_t, device_t, void *); 46 47 struct tegra_fuse_softc { 48 device_t sc_dev; 49 bus_space_tag_t sc_bst; 50 bus_space_handle_t sc_bsh; 51 52 struct clk *sc_clk; 53 struct fdtbus_reset *sc_rst; 54 }; 55 56 static struct tegra_fuse_softc *fuse_softc = NULL; 57 58 CFATTACH_DECL_NEW(tegra_fuse, sizeof(struct tegra_fuse_softc), 59 tegra_fuse_match, tegra_fuse_attach, NULL, NULL); 60 61 static int 62 tegra_fuse_match(device_t parent, cfdata_t cf, void *aux) 63 { 64 const char * const compatible[] = { 65 "nvidia,tegra210-efuse", 66 "nvidia,tegra124-efuse", 67 NULL 68 }; 69 struct fdt_attach_args * const faa = aux; 70 71 return of_match_compatible(faa->faa_phandle, compatible); 72 } 73 74 static void 75 tegra_fuse_attach(device_t parent, device_t self, void *aux) 76 { 77 struct tegra_fuse_softc * const sc = device_private(self); 78 struct fdt_attach_args * const faa = aux; 79 bus_addr_t addr; 80 bus_size_t size; 81 int error; 82 83 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) { 84 aprint_error(": couldn't get registers\n"); 85 return; 86 } 87 sc->sc_clk = fdtbus_clock_get(faa->faa_phandle, "fuse"); 88 if (sc->sc_clk == NULL) { 89 aprint_error(": couldn't get clock fuse\n"); 90 return; 91 } 92 sc->sc_rst = fdtbus_reset_get(faa->faa_phandle, "fuse"); 93 if (sc->sc_rst == NULL) { 94 aprint_error(": couldn't get reset fuse\n"); 95 return; 96 } 97 98 sc->sc_dev = self; 99 sc->sc_bst = faa->faa_bst; 100 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 101 if (error) { 102 aprint_error(": couldn't map %#" PRIxBUSADDR ": %d", addr, error); 103 return; 104 } 105 106 KASSERT(fuse_softc == NULL); 107 fuse_softc = sc; 108 109 aprint_naive("\n"); 110 aprint_normal(": FUSE\n"); 111 } 112 113 uint32_t 114 tegra_fuse_read(u_int offset) 115 { 116 bus_space_tag_t bst; 117 bus_space_handle_t bsh; 118 119 KASSERT(fuse_softc != NULL); 120 121 bst = fuse_softc->sc_bst; 122 bsh = fuse_softc->sc_bsh; 123 124 clk_enable(fuse_softc->sc_clk); 125 const uint32_t v = bus_space_read_4(bst, bsh, 0x100 + offset); 126 clk_disable(fuse_softc->sc_clk); 127 128 return v; 129 } 130