1 /* $NetBSD: tegra_com.c,v 1.5 2015/12/22 22:10:36 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 34 __KERNEL_RCSID(1, "$NetBSD: tegra_com.c,v 1.5 2015/12/22 22:10:36 jmcneill Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/device.h> 39 #include <sys/intr.h> 40 #include <sys/systm.h> 41 #include <sys/time.h> 42 #include <sys/termios.h> 43 44 #include <arm/nvidia/tegra_reg.h> 45 #include <arm/nvidia/tegra_var.h> 46 47 #include <dev/ic/comvar.h> 48 49 #include <dev/fdt/fdtvar.h> 50 51 static int tegra_com_match(device_t, cfdata_t, void *); 52 static void tegra_com_attach(device_t, device_t, void *); 53 54 struct tegra_com_softc { 55 struct com_softc tsc_sc; 56 void *tsc_ih; 57 58 struct clk *tsc_clk; 59 struct fdtbus_reset *tsc_rst; 60 }; 61 62 CFATTACH_DECL_NEW(tegra_com, sizeof(struct tegra_com_softc), 63 tegra_com_match, tegra_com_attach, NULL, NULL); 64 65 static int 66 tegra_com_match(device_t parent, cfdata_t cf, void *aux) 67 { 68 const char * const compatible[] = { "nvidia,tegra124-uart", NULL }; 69 struct fdt_attach_args * const faa = aux; 70 71 return of_match_compatible(faa->faa_phandle, compatible); 72 } 73 74 static void 75 tegra_com_attach(device_t parent, device_t self, void *aux) 76 { 77 struct tegra_com_softc * const tsc = device_private(self); 78 struct com_softc * const sc = &tsc->tsc_sc; 79 struct fdt_attach_args * const faa = aux; 80 bus_space_handle_t bsh; 81 bus_space_tag_t bst; 82 char intrstr[128]; 83 bus_addr_t addr; 84 bus_size_t size; 85 u_int reg_shift; 86 int error; 87 88 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) { 89 aprint_error(": couldn't get registers\n"); 90 return; 91 } 92 93 if (of_getprop_uint32(faa->faa_phandle, "reg-shift", ®_shift)) { 94 /* missing or bad reg-shift property, assume 2 */ 95 bst = faa->faa_a4x_bst; 96 } else { 97 if (reg_shift == 2) { 98 bst = faa->faa_a4x_bst; 99 } else if (reg_shift == 0) { 100 bst = faa->faa_bst; 101 } else { 102 aprint_error(": unsupported reg-shift value %d\n", 103 reg_shift); 104 return; 105 } 106 } 107 108 sc->sc_dev = self; 109 110 tsc->tsc_clk = fdtbus_clock_get_index(faa->faa_phandle, 0); 111 tsc->tsc_rst = fdtbus_reset_get(faa->faa_phandle, "serial"); 112 113 if (tsc->tsc_clk == NULL) { 114 aprint_error(": couldn't get frequency\n"); 115 return; 116 } 117 118 sc->sc_frequency = clk_get_rate(tsc->tsc_clk); 119 sc->sc_type = COM_TYPE_TEGRA; 120 121 error = bus_space_map(bst, addr, size, 0, &bsh); 122 if (error) { 123 aprint_error(": couldn't map %#llx: %d", (uint64_t)addr, error); 124 return; 125 } 126 127 COM_INIT_REGS(sc->sc_regs, bst, bsh, addr); 128 129 com_attach_subr(sc); 130 aprint_naive("\n"); 131 132 if (!fdtbus_intr_str(faa->faa_phandle, 0, intrstr, sizeof(intrstr))) { 133 aprint_error_dev(self, "failed to decode interrupt\n"); 134 return; 135 } 136 137 tsc->tsc_ih = fdtbus_intr_establish(faa->faa_phandle, 0, IPL_SERIAL, 138 FDT_INTR_MPSAFE, comintr, sc); 139 if (tsc->tsc_ih == NULL) { 140 aprint_error_dev(self, "failed to establish interrupt on %s\n", 141 intrstr); 142 } 143 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 144 } 145