xref: /netbsd-src/sys/arch/arm/nvidia/tegra_com.c (revision 6e54367a22fbc89a1139d033e95bec0c0cf0975b)
1 /* $NetBSD: tegra_com.c,v 1.15 2021/01/27 03:10:19 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matt Thomas of 3am Software Foundry.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 
34 __KERNEL_RCSID(1, "$NetBSD: tegra_com.c,v 1.15 2021/01/27 03:10:19 thorpej Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/bus.h>
38 #include <sys/device.h>
39 #include <sys/intr.h>
40 #include <sys/systm.h>
41 #include <sys/time.h>
42 #include <sys/termios.h>
43 
44 #include <arm/nvidia/tegra_reg.h>
45 #include <arm/nvidia/tegra_var.h>
46 
47 #include <dev/ic/comvar.h>
48 
49 #include <dev/fdt/fdtvar.h>
50 
51 static int tegra_com_match(device_t, cfdata_t, void *);
52 static void tegra_com_attach(device_t, device_t, void *);
53 
54 static const struct device_compatible_entry compat_data[] = {
55 	{ .compat = "nvidia,tegra210-uart" },
56 	{ .compat = "nvidia,tegra124-uart" },
57 	{ .compat = "nvidia,tegra20-uart" },
58 	DEVICE_COMPAT_EOL
59 };
60 
61 struct tegra_com_softc {
62 	struct com_softc tsc_sc;
63 	void *tsc_ih;
64 
65 	struct clk *tsc_clk;
66 	struct fdtbus_reset *tsc_rst;
67 };
68 
69 CFATTACH_DECL_NEW(tegra_com, sizeof(struct tegra_com_softc),
70 	tegra_com_match, tegra_com_attach, NULL, NULL);
71 
72 static int
tegra_com_match(device_t parent,cfdata_t cf,void * aux)73 tegra_com_match(device_t parent, cfdata_t cf, void *aux)
74 {
75 	struct fdt_attach_args * const faa = aux;
76 
77 	return of_compatible_match(faa->faa_phandle, compat_data);
78 }
79 
80 static void
tegra_com_attach(device_t parent,device_t self,void * aux)81 tegra_com_attach(device_t parent, device_t self, void *aux)
82 {
83 	struct tegra_com_softc * const tsc = device_private(self);
84 	struct com_softc * const sc = &tsc->tsc_sc;
85 	struct fdt_attach_args * const faa = aux;
86 	bus_space_tag_t bst = faa->faa_bst;
87 	bus_space_handle_t bsh;
88 	char intrstr[128];
89 	bus_addr_t addr;
90 	bus_size_t size;
91 	u_int reg_shift;
92 	int error;
93 
94 	if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
95 		aprint_error(": couldn't get registers\n");
96 		return;
97 	}
98 
99 	if (of_getprop_uint32(faa->faa_phandle, "reg-shift", &reg_shift)) {
100 		/* missing or bad reg-shift property, assume 2 */
101 		reg_shift = 2;
102 	}
103 
104 	sc->sc_dev = self;
105 
106 	tsc->tsc_clk = fdtbus_clock_get_index(faa->faa_phandle, 0);
107 	tsc->tsc_rst = fdtbus_reset_get(faa->faa_phandle, "serial");
108 
109 	if (tsc->tsc_clk == NULL) {
110 		aprint_error(": couldn't get frequency\n");
111 		return;
112 	}
113 
114 	sc->sc_frequency = clk_get_rate(tsc->tsc_clk);
115 	sc->sc_type = COM_TYPE_TEGRA;
116 
117 	error = bus_space_map(bst, addr, size, 0, &bsh);
118 	if (error) {
119 		aprint_error(": couldn't map %#" PRIxBUSADDR ": %d", addr, error);
120 		return;
121 	}
122 
123 	com_init_regs_stride(&sc->sc_regs, bst, bsh, addr, reg_shift);
124 
125 	com_attach_subr(sc);
126 	aprint_naive("\n");
127 
128 	if (!fdtbus_intr_str(faa->faa_phandle, 0, intrstr, sizeof(intrstr))) {
129 		aprint_error_dev(self, "failed to decode interrupt\n");
130 		return;
131 	}
132 
133 	tsc->tsc_ih = fdtbus_intr_establish_xname(faa->faa_phandle, 0,
134 	    IPL_SERIAL, FDT_INTR_MPSAFE, comintr, sc, device_xname(self));
135 	if (tsc->tsc_ih == NULL) {
136 		aprint_error_dev(self, "failed to establish interrupt on %s\n",
137 		    intrstr);
138 	}
139 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
140 }
141 
142 /*
143  * Console support
144  */
145 
146 static int
tegra_com_console_match(int phandle)147 tegra_com_console_match(int phandle)
148 {
149 	return of_compatible_match(phandle, compat_data);
150 }
151 
152 static void
tegra_com_console_consinit(struct fdt_attach_args * faa,u_int uart_freq)153 tegra_com_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
154 {
155 	const int phandle = faa->faa_phandle;
156 	bus_space_tag_t bst = faa->faa_bst;
157 	bus_space_handle_t dummy_bsh;
158 	struct com_regs regs;
159 	bus_addr_t addr;
160 	tcflag_t flags;
161 	u_int reg_shift;
162 	int speed;
163 
164 	fdtbus_get_reg(phandle, 0, &addr, NULL);
165 	speed = fdtbus_get_stdout_speed();
166 	if (speed < 0)
167 		speed = 115200;	/* default */
168 	flags = fdtbus_get_stdout_flags();
169 
170 	if (of_getprop_uint32(faa->faa_phandle, "reg-shift", &reg_shift)) {
171 		/* missing or bad reg-shift property, assume 2 */
172 		reg_shift = 2;
173 	}
174 
175 	memset(&dummy_bsh, 0, sizeof(dummy_bsh));
176 	com_init_regs_stride(&regs, bst, dummy_bsh, addr, reg_shift);
177 
178 	if (comcnattach1(&regs, speed, uart_freq, COM_TYPE_TEGRA, flags))
179 		panic("Cannot initialize tegra com console");
180 }
181 
182 static const struct fdt_console tegra_com_console = {
183 	.match = tegra_com_console_match,
184 	.consinit = tegra_com_console_consinit,
185 };
186 
187 FDT_CONSOLE(tegra_com, &tegra_com_console);
188