1 /* $NetBSD: tegra_com.c,v 1.4 2015/12/16 19:46:55 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 34 __KERNEL_RCSID(1, "$NetBSD: tegra_com.c,v 1.4 2015/12/16 19:46:55 jmcneill Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/device.h> 39 #include <sys/intr.h> 40 #include <sys/systm.h> 41 #include <sys/time.h> 42 #include <sys/termios.h> 43 44 #include <arm/nvidia/tegra_reg.h> 45 #include <arm/nvidia/tegra_var.h> 46 47 #include <dev/ic/comvar.h> 48 49 #include <dev/fdt/fdtvar.h> 50 51 /* XXX */ 52 static int 53 tegra_com_addr2port(bus_addr_t addr) 54 { 55 switch (addr) { 56 case TEGRA_APB_BASE + TEGRA_UARTA_OFFSET: 57 return 0; 58 case TEGRA_APB_BASE + TEGRA_UARTB_OFFSET: 59 return 1; 60 case TEGRA_APB_BASE + TEGRA_UARTC_OFFSET: 61 return 2; 62 case TEGRA_APB_BASE + TEGRA_UARTD_OFFSET: 63 return 3; 64 default: 65 return -1; 66 } 67 } 68 69 static int tegra_com_match(device_t, cfdata_t, void *); 70 static void tegra_com_attach(device_t, device_t, void *); 71 72 struct tegra_com_softc { 73 struct com_softc tsc_sc; 74 void *tsc_ih; 75 }; 76 77 CFATTACH_DECL_NEW(tegra_com, sizeof(struct tegra_com_softc), 78 tegra_com_match, tegra_com_attach, NULL, NULL); 79 80 static int 81 tegra_com_match(device_t parent, cfdata_t cf, void *aux) 82 { 83 const char * const compatible[] = { "nvidia,tegra124-uart", NULL }; 84 struct fdt_attach_args * const faa = aux; 85 86 return of_match_compatible(faa->faa_phandle, compatible); 87 } 88 89 static void 90 tegra_com_attach(device_t parent, device_t self, void *aux) 91 { 92 struct tegra_com_softc * const tsc = device_private(self); 93 struct com_softc * const sc = &tsc->tsc_sc; 94 struct fdt_attach_args * const faa = aux; 95 bus_space_handle_t bsh; 96 bus_space_tag_t bst; 97 char intrstr[128]; 98 bus_addr_t addr; 99 bus_size_t size; 100 u_int reg_shift; 101 int error; 102 103 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) { 104 aprint_error(": couldn't get registers\n"); 105 return; 106 } 107 108 if (of_getprop_uint32(faa->faa_phandle, "reg-shift", ®_shift)) { 109 /* missing or bad reg-shift property, assume 2 */ 110 bst = faa->faa_a4x_bst; 111 } else { 112 if (reg_shift == 2) { 113 bst = faa->faa_a4x_bst; 114 } else if (reg_shift == 0) { 115 bst = faa->faa_bst; 116 } else { 117 aprint_error(": unsupported reg-shift value %d\n", 118 reg_shift); 119 return; 120 } 121 } 122 123 sc->sc_dev = self; 124 125 /* XXX */ 126 const int port = tegra_com_addr2port(addr); 127 if (port == -1) { 128 panic("unsupported com address %#llx", (uint64_t)addr); 129 } 130 sc->sc_frequency = tegra_car_uart_rate(port); 131 sc->sc_type = COM_TYPE_TEGRA; 132 133 error = bus_space_map(bst, addr, size, 0, &bsh); 134 if (error) { 135 aprint_error(": couldn't map %#llx: %d", (uint64_t)addr, error); 136 return; 137 } 138 139 COM_INIT_REGS(sc->sc_regs, bst, bsh, addr); 140 141 com_attach_subr(sc); 142 aprint_naive("\n"); 143 144 if (!fdtbus_intr_str(faa->faa_phandle, 0, intrstr, sizeof(intrstr))) { 145 aprint_error_dev(self, "failed to decode interrupt\n"); 146 return; 147 } 148 149 tsc->tsc_ih = fdtbus_intr_establish(faa->faa_phandle, 0, IPL_SERIAL, 150 FDT_INTR_MPSAFE, comintr, sc); 151 if (tsc->tsc_ih == NULL) { 152 aprint_error_dev(self, "failed to establish interrupt on %s\n", 153 intrstr); 154 } 155 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 156 } 157