1 /* $NetBSD: soc_tegra124.c,v 1.22 2020/02/15 08:16:11 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include "opt_tegra.h"
30 #include "opt_multiprocessor.h"
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.22 2020/02/15 08:16:11 skrll Exp $");
34
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/cpu.h>
38 #include <sys/device.h>
39
40 #include <uvm/uvm_extern.h>
41
42 #include <dev/fdt/fdtvar.h>
43
44 #include <arm/cpufunc.h>
45
46 #include <evbarm/fdt/machdep.h>
47
48 #include <arm/nvidia/tegra_reg.h>
49 #include <arm/nvidia/tegra_pmcreg.h>
50 #include <arm/nvidia/tegra_var.h>
51
52 #define EVP_RESET_VECTOR_0_REG 0x100
53
54 int
tegra124_mpstart(void)55 tegra124_mpstart(void)
56 {
57 int ret = 0;
58
59 #if defined(MULTIPROCESSOR)
60 bus_space_tag_t bst = &arm_generic_bs_tag;
61 bus_space_handle_t bsh;
62
63 bus_space_subregion(bst, tegra_ppsb_bsh,
64 TEGRA_EVP_OFFSET, TEGRA_EVP_SIZE, &bsh);
65
66 arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU);
67 KASSERT(arm_cpu_max == 4);
68
69 bus_space_write_4(bst, bsh, EVP_RESET_VECTOR_0_REG,
70 (uint32_t)KERN_VTOPHYS((vaddr_t)cpu_mpstart));
71 bus_space_barrier(bst, bsh, EVP_RESET_VECTOR_0_REG, 4,
72 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
73
74 for (u_int cpuindex = 1; cpuindex < arm_cpu_max; cpuindex++) {
75 static u_int tegra_cpu_pmu[] = {
76 0,
77 PMC_PARTID_CPU1,
78 PMC_PARTID_CPU2,
79 PMC_PARTID_CPU3
80 };
81
82 tegra_pmc_power(tegra_cpu_pmu[cpuindex], true);
83
84 u_int i;
85 for (i = 0x10000000; i > 0; i--) {
86 if (cpu_hatched_p(cpuindex))
87 break;
88 }
89
90 if (i == 0) {
91 ret++;
92 aprint_error("cpu%d: WARNING: AP failed to start\n",
93 cpuindex);
94 }
95 }
96 #endif
97 return ret;
98 }
99