1 /* $NetBSD: mvsoc_sdhc.c,v 1.2 2020/11/20 18:26:26 thorpej Exp $ */
2 /*
3 * Copyright (c) 2016 KIYOHARA Takashi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: mvsoc_sdhc.c,v 1.2 2020/11/20 18:26:26 thorpej Exp $");
30
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/device.h>
34 #include <sys/errno.h>
35 #include <sys/kmem.h>
36 #include <sys/systm.h>
37
38 #include <dev/marvell/marvellreg.h>
39 #include <dev/marvell/marvellvar.h>
40
41 #include <dev/sdmmc/sdhcreg.h>
42 #include <dev/sdmmc/sdhcvar.h>
43
44 #define MVSOC_SDHC_SIZE 0x2000
45 #define MVSOC_SDHC_REG_SIZE SDHC_CAPABILITIES2
46
47 #define MVSOC_SDHC_MCR0 0x48
48 #define MVSOC_SDHC_MCR1 0x4a
49 #define MVSOC_SDHC_C1R 0x6a
50 #define SDHC_C1R_CRC16_CHK_EN (1 << 2)
51
52 static int mvsoc_sdhc_match(device_t, cfdata_t, void *);
53 static void mvsoc_sdhc_attach(device_t, device_t, void *);
54
55 CFATTACH_DECL_NEW(mvsoc_sdhc, sizeof(struct sdhc_softc),
56 mvsoc_sdhc_match, mvsoc_sdhc_attach, NULL, NULL);
57
58 static int
mvsoc_sdhc_match(device_t parent,cfdata_t match,void * aux)59 mvsoc_sdhc_match(device_t parent, cfdata_t match, void *aux)
60 {
61 struct marvell_attach_args *mva = aux;
62
63 if (strcmp(mva->mva_name, match->cf_name) != 0)
64 return 0;
65 mva->mva_size = MVSOC_SDHC_SIZE;
66 return 1;
67 }
68
69 static void
mvsoc_sdhc_attach(device_t parent,device_t self,void * aux)70 mvsoc_sdhc_attach(device_t parent, device_t self, void *aux)
71 {
72 struct sdhc_softc *sc = device_private(self);
73 struct marvell_attach_args *mva = aux;
74 bus_space_handle_t ioh;
75 int error;
76
77 sc->sc_dev = self;
78 sc->sc_host = kmem_zalloc(sizeof(*sc->sc_host), KM_SLEEP);
79 sc->sc_dmat = mva->mva_dmat;
80 /* Must require the DMA. This sdhc can't 32bit access to SDHC_DATA. */
81 sc->sc_flags = SDHC_FLAG_USE_DMA;
82 sc->sc_flags |= SDHC_FLAG_EXTDMA_DMAEN;
83 sc->sc_flags |= SDHC_FLAG_NO_AUTO_STOP;
84 sc->sc_flags |= SDHC_FLAG_NO_BUSY_INTR;
85
86 aprint_naive("\n");
87 aprint_normal(": SDHC controller\n");
88
89 if (bus_space_subregion(mva->mva_iot, mva->mva_ioh,
90 mva->mva_offset, mva->mva_size, &ioh)) {
91 aprint_error_dev(self, "can't map registers\n");
92 return;
93 }
94
95 intr_establish(mva->mva_irq, IPL_VM, IST_LEVEL, sdhc_intr, sc);
96
97 bus_space_write_2(mva->mva_iot, ioh, MVSOC_SDHC_C1R,
98 bus_space_read_2(mva->mva_iot, ioh, MVSOC_SDHC_C1R) |
99 SDHC_C1R_CRC16_CHK_EN);
100
101 error = sdhc_host_found(sc, mva->mva_iot, ioh, MVSOC_SDHC_REG_SIZE);
102 if (error != 0) {
103 aprint_error_dev(self, "couldn't initialize host, error %d\n",
104 error);
105 return;
106 }
107 }
108