xref: /netbsd-src/sys/arch/arm/imx/imx23_apbxdmareg.h (revision aca15765bdb9c7f8cce8ae53fb194b5e1d4d959e)
1 /* $Id: imx23_apbxdmareg.h,v 1.2 2013/03/03 10:33:56 jkunz Exp $ */
2 
3 /*
4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Petri Laakso.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _ARM_IMX_IMX23_APBXDMAREG_H_
33 #define _ARM_IMX_IMX23_APBXDMAREG_H_
34 
35 #include <sys/cdefs.h>
36 
37 #define HW_APBXDMA_BASE 		0x80024000
38 #define HW_APBXDMA_SIZE 		0x2000 /* 8 kB */
39 
40 /*
41  * APBX DMA Channel 0 Current Command Address Register.
42  */
43 #define HW_APBX_CH0_CURCMDAR		0x100
44 
45 #define HW_APBX_CH0_CURCMDAR_CMD_ADDR	__BITS(31, 0)
46 
47 /*
48  * APBX DMA Channel 0 Next Command Address Register.
49  */
50 #define HW_APBX_CH0_NXTCMDAR		0x110
51 
52 #define HW_APBX_CH0_NXTCMDAR_CMD_ADDR	__BITS(31, 0)
53 
54 /*
55  * APBX DMA Channel 0 Semaphore Register.
56  */
57 #define HW_APBX_CH0_SEMA		0x140
58 
59 #define HW_APBX_CH0_SEMA_RSVD2		__BITS(31, 24)
60 #define HW_APBX_CH0_SEMA_PHORE		__BITS(23, 16)
61 #define HW_APBX_CH0_SEMA_RSVD1		__BITS(15, 8)
62 #define HW_APBX_CH0_SEMA_INCREMENT_SEMA	__BITS(7, 0)
63 
64 #endif /* !_ARM_IMX_IMX23_APBXDMAREG_H_ */
65