1 /* $NetBSD: a9wdt.c,v 1.10 2019/08/10 17:03:59 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: a9wdt.c,v 1.10 2019/08/10 17:03:59 skrll Exp $");
34
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/cpu.h>
38 #include <sys/device.h>
39 #include <sys/wdog.h>
40
41 #include <prop/proplib.h>
42
43 #include <dev/sysmon/sysmonvar.h>
44
45 #include <arm/cortex/a9tmr_reg.h>
46
47 #include <arm/cortex/mpcore_var.h>
48
49 static int a9wdt_match(device_t, cfdata_t, void *);
50 static void a9wdt_attach(device_t, device_t, void *);
51
52 struct a9wdt_softc {
53 struct sysmon_wdog sc_smw;
54 device_t sc_dev;
55 bus_space_tag_t sc_memt;
56 bus_space_handle_t sc_wdog_memh;
57 u_int sc_wdog_max_period;
58 u_int sc_wdog_period;
59 u_int sc_wdog_prescaler;
60 uint32_t sc_freq;
61 uint32_t sc_wdog_load;
62 uint32_t sc_wdog_ctl;
63 bool sc_wdog_armed;
64 };
65
66 #ifndef A9WDT_PERIOD_DEFAULT
67 #define A9WDT_PERIOD_DEFAULT 12
68 #endif
69
70 CFATTACH_DECL_NEW(arma9wdt, sizeof(struct a9wdt_softc),
71 a9wdt_match, a9wdt_attach, NULL, NULL);
72
73 static bool attached;
74
75 static inline uint32_t
a9wdt_wdog_read(struct a9wdt_softc * sc,bus_size_t o)76 a9wdt_wdog_read(struct a9wdt_softc *sc, bus_size_t o)
77 {
78 return bus_space_read_4(sc->sc_memt, sc->sc_wdog_memh, o);
79 }
80
81 static inline void
a9wdt_wdog_write(struct a9wdt_softc * sc,bus_size_t o,uint32_t v)82 a9wdt_wdog_write(struct a9wdt_softc *sc, bus_size_t o, uint32_t v)
83 {
84 bus_space_write_4(sc->sc_memt, sc->sc_wdog_memh, o, v);
85 }
86
87
88 /* ARGSUSED */
89 static int
a9wdt_match(device_t parent,cfdata_t cf,void * aux)90 a9wdt_match(device_t parent, cfdata_t cf, void *aux)
91 {
92 struct mpcore_attach_args * const mpcaa = aux;
93
94 if (attached)
95 return 0;
96
97 if (!CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid) &&
98 !CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid))
99 return 0;
100
101 if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0)
102 return 0;
103
104 /*
105 * This isn't present on UP A9s (since CBAR isn't present).
106 */
107 uint32_t mpidr = armreg_mpidr_read();
108 if (mpidr == 0 || (mpidr & MPIDR_U))
109 return 0;
110
111 return 1;
112 }
113
114 static int
a9wdt_tickle(struct sysmon_wdog * smw)115 a9wdt_tickle(struct sysmon_wdog *smw)
116 {
117 struct a9wdt_softc * const sc = smw->smw_cookie;
118
119 /*
120 * Cause the WDOG to restart counting.
121 */
122 a9wdt_wdog_write(sc, TMR_LOAD, sc->sc_wdog_load);
123 aprint_debug_dev(sc->sc_dev, "tickle\n");
124 return 0;
125 }
126
127 static int
a9wdt_setmode(struct sysmon_wdog * smw)128 a9wdt_setmode(struct sysmon_wdog *smw)
129 {
130 struct a9wdt_softc * const sc = smw->smw_cookie;
131
132 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
133 /*
134 * Emit magic sequence to turn off WDOG
135 */
136 a9wdt_wdog_write(sc, TMR_WDOGDIS, TMR_WDOG_DISABLE_MAGIC1);
137 a9wdt_wdog_write(sc, TMR_WDOGDIS, TMR_WDOG_DISABLE_MAGIC2);
138 delay(1);
139 sc->sc_wdog_ctl = a9wdt_wdog_read(sc, TMR_CTL);
140 KASSERT((sc->sc_wdog_ctl & TMR_CTL_WDOG_MODE) == 0);
141 aprint_debug_dev(sc->sc_dev, "setmode disable\n");
142 return 0;
143 }
144
145 /*
146 * If no changes, just tickle it and return.
147 */
148 if (sc->sc_wdog_armed && smw->smw_period == sc->sc_wdog_period) {
149 sc->sc_wdog_load = sc->sc_freq * sc->sc_wdog_period - 1;
150 sc->sc_wdog_ctl = TMR_CTL_ENABLE | TMR_CTL_WDOG_MODE
151 | __SHIFTIN(sc->sc_wdog_prescaler - 1, TMR_CTL_PRESCALER);
152
153 a9wdt_wdog_write(sc, TMR_LOAD, sc->sc_wdog_load);
154 a9wdt_wdog_write(sc, TMR_CTL, sc->sc_wdog_ctl);
155 aprint_debug_dev(sc->sc_dev, "setmode refresh\n");
156 return 0;
157 }
158
159 if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
160 sc->sc_wdog_period = A9WDT_PERIOD_DEFAULT;
161 smw->smw_period = A9WDT_PERIOD_DEFAULT;
162 }
163
164 /*
165 * Make sure we don't overflow the counter.
166 */
167 if (smw->smw_period >= sc->sc_wdog_max_period) {
168 return EINVAL;
169 }
170
171 sc->sc_wdog_load = sc->sc_freq * sc->sc_wdog_period - 1;
172 sc->sc_wdog_ctl = TMR_CTL_ENABLE | TMR_CTL_WDOG_MODE
173 | __SHIFTIN(sc->sc_wdog_prescaler - 1, TMR_CTL_PRESCALER);
174
175 a9wdt_wdog_write(sc, TMR_LOAD, sc->sc_wdog_load);
176 a9wdt_wdog_write(sc, TMR_CTL, sc->sc_wdog_ctl);
177
178 aprint_debug_dev(sc->sc_dev, "setmode enable\n");
179 return 0;
180 }
181
182
183 static void
a9wdt_attach(device_t parent,device_t self,void * aux)184 a9wdt_attach(device_t parent, device_t self, void *aux)
185 {
186 struct a9wdt_softc * const sc = device_private(self);
187 struct mpcore_attach_args * const mpcaa = aux;
188 prop_dictionary_t dict = device_properties(self);
189 const char *cpu_type;
190
191 sc->sc_dev = self;
192 sc->sc_memt = mpcaa->mpcaa_memt;
193
194 bus_space_subregion(sc->sc_memt, mpcaa->mpcaa_memh,
195 mpcaa->mpcaa_off1, TMR_WDOG_SIZE, &sc->sc_wdog_memh);
196
197 /*
198 * This runs at the ARM PERIPHCLOCK which should be 1/2 of the
199 * CPU clock. The MD code should have setup our frequency for us.
200 */
201 prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
202
203 sc->sc_wdog_ctl = a9wdt_wdog_read(sc, TMR_CTL);
204 sc->sc_wdog_armed = (sc->sc_wdog_ctl & TMR_CTL_WDOG_MODE) != 0;
205 if (sc->sc_wdog_armed) {
206 sc->sc_wdog_prescaler =
207 __SHIFTOUT(sc->sc_wdog_ctl, TMR_CTL_PRESCALER) + 1;
208 sc->sc_freq /= sc->sc_wdog_prescaler;
209 sc->sc_wdog_load = a9wdt_wdog_read(sc, TMR_LOAD);
210 sc->sc_wdog_period = (sc->sc_wdog_load + 1) / sc->sc_freq;
211 } else {
212 sc->sc_wdog_period = A9WDT_PERIOD_DEFAULT;
213 sc->sc_wdog_prescaler = 1;
214 /*
215 * Let's hope the timer frequency isn't prime.
216 */
217 for (size_t div = 256; div >= 2; div--) {
218 if (sc->sc_freq % div == 0) {
219 sc->sc_wdog_prescaler = div;
220 break;
221 }
222 }
223 sc->sc_freq /= sc->sc_wdog_prescaler;
224 }
225 sc->sc_wdog_max_period = UINT32_MAX / sc->sc_freq;
226
227 /*
228 * Does the config file tell us to turn on the watchdog?
229 */
230 if (device_cfdata(self)->cf_flags & 1)
231 sc->sc_wdog_armed = true;
232
233 aprint_naive("\n");
234 if (CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) {
235 cpu_type = "A5";
236 } else {
237 cpu_type = "A9";
238 }
239 aprint_normal(": %s Watchdog Timer, default period is %u seconds%s\n",
240 cpu_type, sc->sc_wdog_period,
241 sc->sc_wdog_armed ? " (armed)" : "");
242
243 sc->sc_smw.smw_name = device_xname(self);
244 sc->sc_smw.smw_cookie = sc;
245 sc->sc_smw.smw_setmode = a9wdt_setmode;
246 sc->sc_smw.smw_tickle = a9wdt_tickle;
247 sc->sc_smw.smw_period = sc->sc_wdog_period;
248
249 if (sc->sc_wdog_armed) {
250 int error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE,
251 sc->sc_wdog_period);
252 if (error)
253 aprint_error_dev(self,
254 "failed to start kernel tickler: %d\n", error);
255 }
256
257 if (sysmon_wdog_register(&sc->sc_smw) != 0)
258 aprint_error("%s: unable to register with sysmon\n",
259 device_xname(sc->sc_dev));
260
261 attached = true;
262 }
263