1 /* $NetBSD: osiop_jazzio.c,v 1.10 2011/07/01 19:25:42 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 Izumi Tsutsui. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: osiop_jazzio.c,v 1.10 2011/07/01 19:25:42 dyoung Exp $"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/device.h> 33 #include <sys/buf.h> 34 #include <sys/malloc.h> 35 36 #include <dev/scsipi/scsi_all.h> 37 #include <dev/scsipi/scsipi_all.h> 38 #include <dev/scsipi/scsiconf.h> 39 40 #include <machine/cpu.h> 41 #include <machine/autoconf.h> 42 #include <sys/bus.h> 43 44 #include <dev/ic/osiopreg.h> 45 #include <dev/ic/osiopvar.h> 46 47 #include <arc/jazz/jazziovar.h> 48 49 int osiop_jazzio_match(device_t, cfdata_t, void *); 50 void osiop_jazzio_attach(device_t, device_t, void *); 51 int osiop_jazzio_intr(void *); 52 53 CFATTACH_DECL_NEW(osiop_jazzio, sizeof(struct osiop_softc), 54 osiop_jazzio_match, osiop_jazzio_attach, NULL, NULL); 55 56 int 57 osiop_jazzio_match(device_t parent, cfdata_t cf, void *aux) 58 { 59 struct jazzio_attach_args *ja = aux; 60 61 if (strcmp(ja->ja_name, "NCRC710") != 0) 62 return 0; 63 64 return 1; 65 } 66 67 void 68 osiop_jazzio_attach(device_t parent, device_t self, void *aux) 69 { 70 struct osiop_softc *sc = device_private(self); 71 struct jazzio_attach_args *ja = aux; 72 int err, scid; 73 74 sc->sc_dev = self; 75 sc->sc_bst = ja->ja_bust; 76 sc->sc_dmat = ja->ja_dmat; 77 78 /* 79 * Map registers 80 */ 81 err = bus_space_map(sc->sc_bst, ja->ja_addr, 82 OSIOP_NREGS, 0, &sc->sc_reg); 83 if (err) { 84 aprint_error(": failed to map registers, err=%d\n", err); 85 return; 86 } 87 88 sc->sc_clock_freq = 50; /* MHz */ 89 sc->sc_ctest7 = 0; /* | OSIOP_CTEST7_TT1 */ 90 sc->sc_dcntl = OSIOP_DCNTL_EA; 91 92 /* XXX should check ID in BIOS variables? */ 93 scid = ffs(osiop_read_1(sc, OSIOP_SCID)); 94 95 if (scid == 0) 96 scid = 7; 97 else 98 scid--; 99 100 sc->sc_id = scid; 101 102 /* 103 * Call common attachment 104 */ 105 osiop_attach(sc); 106 107 /* 108 * Set up interrupt handler. 109 */ 110 jazzio_intr_establish(ja->ja_intr, 111 (intr_handler_t)osiop_jazzio_intr, sc); 112 } 113 114 /* 115 * interrupt handler 116 */ 117 int 118 osiop_jazzio_intr(void *arg) 119 { 120 struct osiop_softc *sc = arg; 121 uint8_t istat; 122 123 /* This is potentially nasty, since the IRQ is level triggered... */ 124 if (sc->sc_flags & OSIOP_INTSOFF) 125 return 0; 126 127 istat = osiop_read_1(sc, OSIOP_ISTAT); 128 129 if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0) 130 return 0; 131 132 /* Save interrupt details for the back-end interrupt handler */ 133 sc->sc_sstat0 = osiop_read_1(sc, OSIOP_SSTAT0); 134 sc->sc_istat = istat; 135 sc->sc_dstat = osiop_read_1(sc, OSIOP_DSTAT); 136 137 /* Deal with the interrupt */ 138 osiop_intr(sc); 139 140 return 1; 141 } 142