xref: /netbsd-src/sys/arch/arc/jazz/osiop_jazzio.c (revision 8ff6f65dafc58186614d149001c905dec4c934a2)
1 /* $NetBSD: osiop_jazzio.c,v 1.11 2023/12/20 06:36:02 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2001 Izumi Tsutsui.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: osiop_jazzio.c,v 1.11 2023/12/20 06:36:02 thorpej Exp $");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/device.h>
33 #include <sys/buf.h>
34 
35 #include <dev/scsipi/scsi_all.h>
36 #include <dev/scsipi/scsipi_all.h>
37 #include <dev/scsipi/scsiconf.h>
38 
39 #include <machine/cpu.h>
40 #include <machine/autoconf.h>
41 #include <sys/bus.h>
42 
43 #include <dev/ic/osiopreg.h>
44 #include <dev/ic/osiopvar.h>
45 
46 #include <arc/jazz/jazziovar.h>
47 
48 int osiop_jazzio_match(device_t, cfdata_t, void *);
49 void osiop_jazzio_attach(device_t, device_t, void *);
50 int osiop_jazzio_intr(void *);
51 
52 CFATTACH_DECL_NEW(osiop_jazzio, sizeof(struct osiop_softc),
53     osiop_jazzio_match, osiop_jazzio_attach, NULL, NULL);
54 
55 int
osiop_jazzio_match(device_t parent,cfdata_t cf,void * aux)56 osiop_jazzio_match(device_t parent, cfdata_t cf, void *aux)
57 {
58 	struct jazzio_attach_args *ja = aux;
59 
60 	if (strcmp(ja->ja_name, "NCRC710") != 0)
61 		return 0;
62 
63 	return 1;
64 }
65 
66 void
osiop_jazzio_attach(device_t parent,device_t self,void * aux)67 osiop_jazzio_attach(device_t parent, device_t self, void *aux)
68 {
69 	struct osiop_softc *sc = device_private(self);
70 	struct jazzio_attach_args *ja = aux;
71 	int err, scid;
72 
73 	sc->sc_dev = self;
74 	sc->sc_bst = ja->ja_bust;
75 	sc->sc_dmat = ja->ja_dmat;
76 
77 	/*
78 	 * Map registers
79 	 */
80 	err = bus_space_map(sc->sc_bst, ja->ja_addr,
81 	    OSIOP_NREGS, 0, &sc->sc_reg);
82 	if (err) {
83 		aprint_error(": failed to map registers, err=%d\n", err);
84 		return;
85 	}
86 
87 	sc->sc_clock_freq = 50;	/* MHz */
88 	sc->sc_ctest7 = 0; /* | OSIOP_CTEST7_TT1 */
89 	sc->sc_dcntl = OSIOP_DCNTL_EA;
90 
91 	/* XXX should check ID in BIOS variables? */
92 	scid = ffs(osiop_read_1(sc, OSIOP_SCID));
93 
94 	if (scid == 0)
95 		scid = 7;
96 	else
97 		scid--;
98 
99 	sc->sc_id = scid;
100 
101 	/*
102 	 * Call common attachment
103 	 */
104 	osiop_attach(sc);
105 
106 	/*
107 	 * Set up interrupt handler.
108          */
109 	jazzio_intr_establish(ja->ja_intr,
110 	    (intr_handler_t)osiop_jazzio_intr, sc);
111 }
112 
113 /*
114  * interrupt handler
115  */
116 int
osiop_jazzio_intr(void * arg)117 osiop_jazzio_intr(void *arg)
118 {
119 	struct osiop_softc *sc = arg;
120 	uint8_t istat;
121 
122 	/* This is potentially nasty, since the IRQ is level triggered... */
123 	if (sc->sc_flags & OSIOP_INTSOFF)
124 		return 0;
125 
126 	istat = osiop_read_1(sc, OSIOP_ISTAT);
127 
128 	if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0)
129 		return 0;
130 
131 	/* Save interrupt details for the back-end interrupt handler */
132 	sc->sc_sstat0 = osiop_read_1(sc, OSIOP_SSTAT0);
133 	sc->sc_istat = istat;
134 	sc->sc_dstat = osiop_read_1(sc, OSIOP_DSTAT);
135 
136 	/* Deal with the interrupt */
137 	osiop_intr(sc);
138 
139 	return 1;
140 }
141