xref: /netbsd-src/sys/arch/arc/jazz/if_sn_jazzio.c (revision 8ff6f65dafc58186614d149001c905dec4c934a2)
1 /*	$NetBSD: if_sn_jazzio.c,v 1.16 2023/12/20 06:36:02 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Microsoft JAZZ front-end for the National Semiconductor DP83932
34  * Systems-Oriented Network Interface Controller (SONIC).
35  */
36 
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: if_sn_jazzio.c,v 1.16 2023/12/20 06:36:02 thorpej Exp $");
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/kernel.h>
44 #include <sys/socket.h>
45 #include <sys/ioctl.h>
46 #include <sys/errno.h>
47 #include <sys/device.h>
48 #include <sys/kcore.h>
49 
50 #include <sys/rndsource.h>
51 
52 #include <net/if.h>
53 #include <net/if_dl.h>
54 #include <net/if_ether.h>
55 
56 #include <machine/autoconf.h>
57 #include <sys/bus.h>
58 #include <machine/intr.h>
59 
60 #include <dev/ic/dp83932reg.h>
61 #include <dev/ic/dp83932var.h>
62 
63 #include <arc/arc/arcbios.h>
64 #include <arc/jazz/jazziovar.h>
65 
66 int	sonic_jazzio_match(device_t, cfdata_t, void *);
67 void	sonic_jazzio_attach(device_t, device_t, void *);
68 
69 CFATTACH_DECL_NEW(sn_jazzio, sizeof(struct sonic_softc),
70     sonic_jazzio_match, sonic_jazzio_attach, NULL, NULL);
71 
72 int
sonic_jazzio_match(device_t parent,cfdata_t cf,void * aux)73 sonic_jazzio_match(device_t parent, cfdata_t cf, void *aux)
74 {
75 	struct jazzio_attach_args *ja = aux;
76 
77 	if (strcmp(ja->ja_name, "SONIC") != 0)
78 		return 0;
79 
80 	return 1;
81 }
82 
83 void
sonic_jazzio_attach(device_t parent,device_t self,void * aux)84 sonic_jazzio_attach(device_t parent, device_t self, void *aux)
85 {
86 	struct sonic_softc *sc = device_private(self);
87 	struct jazzio_attach_args *ja = aux;
88 	int i;
89 	uint8_t enaddr[ETHER_ADDR_LEN];
90 
91 	sc->sc_dev = self;
92 	sc->sc_st = ja->ja_bust;
93 	sc->sc_dmat = ja->ja_dmat;
94 
95 	aprint_normal(": SONIC Ethernet\n");
96 
97 	/* Map the device. */
98 	if (bus_space_map(sc->sc_st, ja->ja_addr, SONIC_NREGS * 4,
99 	    0, &sc->sc_sh) != 0) {
100 		aprint_error_dev(sc->sc_dev, "unable to map SONIC registers\n");
101 		return;
102 	}
103 
104 	/* We run in 32-bit mode. */
105 	sc->sc_32bit = 1;
106 
107 	/* BMODE is set for little-endian. */
108 	sc->sc_bigendian = 0;
109 
110 	/* Regs are 16-bit, plus 16-bit pad. */
111 	for (i = 0; i < SONIC_NREGS; i++)
112 		sc->sc_regmap[i] = i * 4;
113 
114 	/*
115 	 * Configure DCR:
116 	 *
117 	 *	- Latched bug retry
118 	 *	- Synchronous bus (memory cycle 2 clocks)
119 	 *	- 0 wait states added (WC0,WC1 == 0,0)
120 	 *	- 4 byte Rx DMA threshold (RFT0,RFT1 == 0,0)
121 	 *	- 28 byte Tx DMA threshold (TFT0,TFT1 == 1,1)
122 	 *	  XXX There was a comment
123 	 *	  	"XXX RFT & TFT according to MIPS manual"
124 	 *	      in old MD sys/arch/arc/dev/if_sn.c in Attic.
125 	 */
126 	sc->sc_dcr = DCR_LBR | DCR_SBUS | DCR_TFT0 | DCR_TFT1;
127 	sc->sc_dcr2 = 0;
128 
129 	/* Hook up our interrupt handler. */
130 	jazzio_intr_establish(ja->ja_intr, sonic_intr, sc);
131 
132 	/* The Ethernet address is from the product ID. */
133 	memcpy(enaddr, arc_product_id, sizeof(enaddr));
134 
135 	/* Finish off the attach. */
136 	sonic_attach(sc, enaddr);
137 }
138