1.\" $NetBSD: pxagpio.4,v 1.3 2017/06/19 10:07:29 pgoyette Exp $ 2.\" 3.\" Copyright (c) 2017 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Steve Woodford. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd April 15, 2017 31.Dt PXAGPIO 4 32.Os 33.Sh NAME 34.Nm pxaip 35.Nd Intel Xscale PXA250/PXA270 GPIO Controller 36.Sh SYNOPSIS 37.Cd "pxagpio* at pxaip?" 38.Cd "gpio* at gpiobus?" 39.Sh DESCRIPTION 40.Nm 41is an on-board GPIO controller found in XScale PXA250, PXA255, PXA270, 42PXA271, PXA272, and PXA273 processors manufactured by Intel and Marvell 43Technology. 44The driver supports 86 pins for PXA250 or 121 pins for PXA270 45processor families. 46Access to the pins is provided by the 47.Xr gpio 4 48interface. 49The driver supports 50.Dv GPIO_PIN_INPUT 51and 52.Dv GPIO_PIN_OUTPUT . 53GPIO pins being used in alternate configurations are not available 54for GPIO operations. 55.Sh SEE ALSO 56.Xr gpio 4 57.Sh HISTORY 58The 59.Nm 60driver first appeared in 61.Nx 2.0 . 62GPIO attachment appeared in 63.Nx 8.0 . 64.Sh AUTHORS 65.An -nosplit 66The 67.Nm 68driver was written by 69.An Steve Woodford 70.Aq Mt scw@NetBSD.org . 71This manual page was contributed by 72.An Stephan Meisinger . 73