xref: /netbsd-src/share/man/man4/man4.x86/ichlpcib.4 (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1.\"	$NetBSD: ichlpcib.4,v 1.5 2011/03/18 21:17:17 jruoho Exp $
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3.\" Copyright (c) 2004 The NetBSD Foundation, Inc.
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6.\" This code is derived from software contributed to The NetBSD Foundation
7.\" by Minoura Makoto and Matthew R. Green.
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30.Dd March 18, 2011
31.Dt ICHLPCIB 4 x86
32.Os
33.Sh NAME
34.Nm ichlpcib
35.Nd Intel ICH LPC Interface Bridge
36.Sh SYNOPSIS
37.Cd "ichlpcib* at pci? dev ? function ?"
38.Cd "fwhrng*   at ichlpcib?"
39.Cd "hpet0     at ichlpcib?"
40.Cd "isa0      at ichlpcib?"
41.Cd "gpio*     at ichlpcib?"
42.Sh DESCRIPTION
43The
44.Nm
45driver supports the Intel ICH LPC Interface Bridges on compatible
46chipsets.
47Supported functions include:
48.Bl -bullet
49.It
50Watchdog timer.
51The watchdog timer may be configured for a 2 seconds (on ICH6 or newer)
52and 4 seconds (on ICH5 or older) min period and for a 39 seconds
53(on ICH5 or older) or 613 seconds max period (on ICH6 or newer).
54.It
55Power Management timer.
56A 24-bit timer available to be used by the timecounters framework.
57.It
58SpeedStep.
59In some older systems the SpeedStep function is also available, and can be
60used to switch between high and low frequency (to reduce power consumption)
61via the
62.Li machdep.speedstep_state
63.Xr sysctl 8
64node.
65A value of 0 will use the low frequency (low power) and a 1 will
66enable the high frequency (full power).
67.It
68General Purpose Input/Output.
69The ICH provides up to 64 I/O pins which can be accessed through the
70.Xr gpio 4
71framework.
72.El
73.Sh SEE ALSO
74.Xr est 4 ,
75.Xr fwhrng 4 ,
76.Xr gpio 4 ,
77.Xr hpet 4 ,
78.Xr ioapic 4 ,
79.Xr sysctl 8 ,
80.Xr wdogctl 8
81.Rs
82.%A Intel Corporation
83.%T Intel I/O Controller Hub 6 (ICH6) Family
84.%D January, 2005
85.%U http://www.intel.com/assets/pdf/datasheet/301473.pdf
86.Re
87.Rs
88.%A Intel Corporation
89.%T Intel I/O Controller Hub 7 (ICH7) Family
90.%D April, 2007
91.%U http://www.intel.com/Assets/PDF/datasheet/307013.pdf
92.Re
93.Rs
94.%A Intel Corporation
95.%T Intel I/O Controller Hub 8 (ICH8) Family
96.%D May, 2007
97.%U http://www.intel.com/assets/pdf/datasheet/313056.pdf
98.Re
99.Rs
100.%A Intel Corporation
101.%T Using the Intel ICH Family Watchdog Timer (WDT)
102.%D September, 2002
103.%U ftp://download.intel.com/design/chipsets/applnots/29227301.pdf
104.Re
105.Sh HISTORY
106The
107.Nm
108driver first appeared in
109.Nx 3.0 .
110.Sh AUTHORS
111The
112.Nm
113driver was written by
114.An Minoura Makoto
115and
116.An Matthew R. Green .
117