1.\" $NetBSD: ichlpcib.4,v 1.1 2010/08/06 17:00:13 jruoho Exp $ 2.\" 3.\" Copyright (c) 2004 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Minoura Makoto and Matthew R. Green. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd August 6, 2010 31.Dt ICHLPCIB 4 x86 32.Os 33.Sh NAME 34.Nm ichlpcib 35.Nd Intel ICH LPC Interface Bridge 36.Sh SYNOPSIS 37.Cd "ichlpcib* at pci? dev ? function ?" 38.Cd "hpet0 at ichlpcib?" 39.Cd "isa0 at ichlpcib?" 40.Cd "gpio* at ichlpcib?" 41.Sh DESCRIPTION 42The 43.Nm 44driver supports the Intel ICH LPC Interface Bridges on compatible 45chipsets. 46Supported functions include: 47.Bl -bullet 48.It 49Watchdog timer. 50The watchdog timer may be configured for a 2 seconds (on ICH6 or newer) 51and 4 seconds (on ICH5 or older) min period and for a 39 seconds 52(on ICH5 or older) or 613 seconds max period (on ICH6 or newer). 53.It 54Power Management timer. 55A 24-bit timer available to be used by the timecounters framework. 56.It 57SpeedStep. 58In some systems the SpeedStep function is also available, and can be 59used to switch between high and low frequency (to reduce power consumption) 60via the 61.Li machdep.speedstep_state 62.Xr sysctl 8 63node. 64A value of 0 will use the low frequency (low power) and a 1 will 65enable the high frequency (full power). 66.It 67General Purpose Input/Output. 68The ICH provides up to 64 I/O pins which can be accessed through the 69.Xr gpio 4 70framework. 71.El 72.Sh SEE ALSO 73.Xr fwhrng 4 , 74.Xr gpio 4 , 75.Xr hpet 4 , 76.Xr sysctl 8 , 77.Xr wdogctl 8 78.Sh HISTORY 79The 80.Nm 81driver first appeared in 82.Nx 3.0 . 83.Sh AUTHORS 84The 85.Nm 86driver was written by 87.An Minoura Makoto 88and 89.An Matthew R. Green . 90