1.\" $NetBSD: pcibios.4,v 1.19 2017/07/03 21:30:59 wiz Exp $ 2.\" 3.\" Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Lennart Augustsson. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd October 9, 2005 31.Dt PCIBIOS 4 i386 32.Os 33.Sh NAME 34.Nm pcibios 35.Nd introduction to PCI BIOS support 36.Sh SYNOPSIS 37.Cd "options PCIBIOS" 38.Cd "options PCIBIOSVERBOSE" 39.Cd "#options PCIBIOS_IRQS_HINT=0x0a00 #IRQ 9,11" 40.Cd "#options PCIBIOS_INTR_FIXUP_FORCE" 41.Cd "options PCIBIOS_INTR_GUESS" 42.Cd "#options PCIINTR_DEBUG" 43.Sh INTRODUCTION 44.Nm 45provides support for setting up PCI controllers, bridges, and devices 46using information extracted from the BIOS. 47.Pp 48Ideally, the boot firmware of a machine (a.k.a. BIOS) should set 49up all PCI devices; assigning them I/O and memory addresses and 50interrupts. 51Alas, this does not always happen, so there is some 52PC specific code that can do the initialization when 53.Nx 54boots. 55.Pp 56Options: 57.Bl -tag -width PCIBIOS_IRQS_HINT -offset 3n 58.It Nm PCIBIOS 59turn on the PCI BIOS support. 60.It Nm PCIBIOSVERBOSE 61make the setup procedure verbose. 62.It Nm PCIBIOS_IRQS_HINT 63hint for IRQ use. 64When 65.Em PCI_INTR_FIXUP 66cannot guess an adequate IRQ for a device, the hint is used. 67.Pp 68The value is a logical or of power-of-2s of allowable interrupts: 69.Bl -column "XX-0xffff" "XX-0xffff" "XX-0xffff" "XX-0xffff" -compact -offset 2n 70.It Em "IRQ Value" Ta Em "IRQ Value" Ta Em "IRQ Value" Ta Em "IRQ Value" 71.It "\& 0 0x0001" Ta " 4 0x0010" Ta " 8 0x0100" Ta "12 0x1000" 72.It "\& 1 0x0002" Ta " 5 0x0020" Ta " 9 0x0200" Ta "13 0x2000" 73.It "\& 2 0x0004" Ta " 6 0x0040" Ta "10 0x0400" Ta "14 0x4000" 74.It "\& 3 0x0008" Ta " 7 0x0080" Ta "11 0x0800" Ta "15 0x8000" 75.El 76For example, 77.Qq Sy options PCIBIOS_IRQS_HINT=0x0a00 78allows IRQ 9 and IRQ 11. 79.Pp 80The kernel global variable 81.Va pcibios_irqs_hint 82holds this value, 83so a user can override this value without kernel recompilation. 84For example: 85.Bl -bullet -compact 86.It 87To specify this value on the fly, type the following command 88at the boot prompt to drop into DDB (the in-kernel debugger; 89you have to specify 90.Qq Sy options DDB 91to make kernel with DDB): 92.Dl Ic boot -d 93And type the following command on 94.Qq Sy db> 95prompt: 96.Dl Ic write pcibios_irqs_hint 0x0a00 97Then type the following to continue to boot: 98.Dl Ic c 99.It 100To modify kernel image without kernel recompilation, 101run the following command on shell: 102.Dl Ic gdb --write /netbsd 103And type the following commands at the 104.Qq Sy (gdb) 105prompt: 106.Dl Ic set pcibios_irqs_hint=0xa00 107.Dl Ic quit 108.El 109.It Nm PCIBIOS_INTR_FIXUP_FORCE 110Some buggy BIOS implementations provide inconsistent 111information between the PCI Interrupt Configuration Register 112and the PCI Interrupt Routing table. 113In such case, the PCI Interrupt Configuration Register takes precedence 114by default. 115If this happens, a kernel with 116.Em PCIBIOSVERBOSE 117shows 118.Qq Sy WARNING: preserving irq XX 119in the PCI routing table. 120.Pp 121If 122.Em PCIBIOS_INTR_FIXUP_FORCE 123is specified in addition to the 124.Em PCI_INTR_FIXUP , 125the PCI Interrupt Routing table takes precedence. 126In this case, a kernel with 127.Em PCIBIOSVERBOSE 128shows 129.Qq Sy WARNING: overriding irq XX 130in the PCI routing table. 131.It Nm PCIBIOS_INTR_GUESS 132make 133.Em PCI_INTR_FIXUP 134work with unknown interrupt router. 135.Pp 136If a PCI interrupt router is not known, normally interrupt 137configuration will not be touched. 138.Pp 139But if 140.Em PCIBIOS_INTR_GUESS 141is specified in addition to the 142.Em PCI_INTR_FIXUP , 143and if a PCI interrupt routing table entry indicates that only 144one IRQ is available for the entry, the IRQ is assumed to be already 145connected to the device, and corresponding PCI Interrupt 146Configuration Register will be configured accordingly. 147.It Nm PCIINTR_DEBUG 148make the 149.Em PCI_INTR_FIXUP 150procedure verbose. 151.El 152.Sh SEE ALSO 153.Xr cardbus 4 , 154.Xr pci 4 155.Sh HISTORY 156The 157.Nm 158code appeared in 159.Nx 1.5 . 160.Sh BUGS 161The 162.Em PCIBIOS_ADDR_FIXUP 163option may conflict with the PCI CardBus driver's own 164address fixup. 165