xref: /netbsd-src/share/man/man4/geodeide.4 (revision b5677b36047b601b9addaaa494a58ceae82c2a6c)
1.\"	$NetBSD: geodeide.4,v 1.4 2005/07/06 06:36:10 fair Exp $
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3.\" Copyright (c) 2004 Manuel Bouyer.
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30.Dd July 5, 2005
31.Dt GEODEIDE 4
32.Os
33.Sh NAME
34.Nm geodeide
35.Nd AMD Geode IDE disk controllers driver
36.Sh SYNOPSIS
37.Cd "geodeide* at pci? dev ? function ? flags 0x0000"
38.Sh DESCRIPTION
39The
40.Nm
41driver supports the
42.Tn AMD
43Geode CS5530A and SC1100
44.Tn IDE
45controllers,
46and provides the interface with the hardware for the
47.Xr ata 4
48driver.
49.Pp
50The 0x0002 flag forces the
51.Nm
52driver to disable
53.Tn DMA
54on chipsets for which
55.Tn DMA
56would normally be enabled.
57This can be used as a debugging aid, or to work around
58problems where the
59.Tn IDE
60controller is wired up to the system incorrectly.
61.Sh SEE ALSO
62.Xr ata 4 ,
63.Xr atapi 4 ,
64.Xr intro 4 ,
65.Xr pci 4 ,
66.Xr pciide 4 ,
67.Xr wd 4 ,
68.Xr wdc 4
69.Sh BUGS
70The SC1100 controller requires 4-byte aligned data transfers and
71cannot handle transfers of exactly 64 kilobytes.
72.Pp
73The CS5530 multifunction chip/core's
74.Tn IDE
75section claims to be capable of
76.Tn UDMA
77mode 2
78.Pq 33.3MB/s
79but in practice using that mode swamps the controller so badly that
80.Nm
81limits the
82.Tn UDMA
83negotiation to mode 1
84.Pq 25MB/s
85so that the other functions of this chip continue to work.
86.Pp
87The
88.Tn IDE DMA
89engine in the CS5530 can only do transfers on cache-line
90.Pq 16-byte
91boundaries.
92Attempts to perform
93.Tn DMA
94on any other alignment will crash the system.
95This problem may also exist in the SC1100 since the CS5530 was its
96direct predecessor, and it is not clear that National Semiconductor
97fixed any bugs in it.
98.Pp
99The
100.Nm
101driver will reject attempts to
102.Tn DMA
103to buffers not aligned to the required boundary.
104The
105.Xr wd 4
106disk driver will back off to
107.Tn PIO
108mode to accomplish these transfer requests, at reduced system performance.
109