1.\" $NetBSD: geodeide.4,v 1.5 2009/10/19 18:41:08 bouyer Exp $ 2.\" 3.\" Copyright (c) 2004 Manuel Bouyer. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22.\" INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" 25.Dd July 5, 2005 26.Dt GEODEIDE 4 27.Os 28.Sh NAME 29.Nm geodeide 30.Nd AMD Geode IDE disk controllers driver 31.Sh SYNOPSIS 32.Cd "geodeide* at pci? dev ? function ? flags 0x0000" 33.Sh DESCRIPTION 34The 35.Nm 36driver supports the 37.Tn AMD 38Geode CS5530A and SC1100 39.Tn IDE 40controllers, 41and provides the interface with the hardware for the 42.Xr ata 4 43driver. 44.Pp 45The 0x0002 flag forces the 46.Nm 47driver to disable 48.Tn DMA 49on chipsets for which 50.Tn DMA 51would normally be enabled. 52This can be used as a debugging aid, or to work around 53problems where the 54.Tn IDE 55controller is wired up to the system incorrectly. 56.Sh SEE ALSO 57.Xr ata 4 , 58.Xr atapi 4 , 59.Xr intro 4 , 60.Xr pci 4 , 61.Xr pciide 4 , 62.Xr wd 4 , 63.Xr wdc 4 64.Sh BUGS 65The SC1100 controller requires 4-byte aligned data transfers and 66cannot handle transfers of exactly 64 kilobytes. 67.Pp 68The CS5530 multifunction chip/core's 69.Tn IDE 70section claims to be capable of 71.Tn UDMA 72mode 2 73.Pq 33.3MB/s 74but in practice using that mode swamps the controller so badly that 75.Nm 76limits the 77.Tn UDMA 78negotiation to mode 1 79.Pq 25MB/s 80so that the other functions of this chip continue to work. 81.Pp 82The 83.Tn IDE DMA 84engine in the CS5530 can only do transfers on cache-line 85.Pq 16-byte 86boundaries. 87Attempts to perform 88.Tn DMA 89on any other alignment will crash the system. 90This problem may also exist in the SC1100 since the CS5530 was its 91direct predecessor, and it is not clear that National Semiconductor 92fixed any bugs in it. 93.Pp 94The 95.Nm 96driver will reject attempts to 97.Tn DMA 98to buffers not aligned to the required boundary. 99The 100.Xr wd 4 101disk driver will back off to 102.Tn PIO 103mode to accomplish these transfer requests, at reduced system performance. 104