1/*- 2 * Copyright (c) 2013 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas of 3am Software Foundry. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#include <mips/asm.h> 31 32RCSID("$NetBSD: fpdf.S,v 1.1 2016/07/14 01:59:18 matt Exp $") 33 34/* 35 * This file provides softfloat compatible routines which use FP instructions 36 * to do the actual work. This should give near hard-float performance while 37 * being compatible with soft-float code. 38 * 39 * This file implements the double precision floating point routines. 40 */ 41 42#ifdef MIPS3 43#define COP1_SYNC nop 44#else 45#define COP1_SYNC 46#endif 47 48LEAF_NOPROFILE(__adddf3) 49 dmtc1 a0, $f12 50 dmtc1 a1, $f14 51 COP1_SYNC 52 add.d $f0, $f12, $f14 53 dmfc1 v0, $f0 54 jr ra 55END(__adddf3) 56 57LEAF_NOPROFILE(__subdf3) 58 dmtc1 a0, $f12 59 dmtc1 a1, $f14 60 COP1_SYNC 61 sub.d $f0, $f12, $f14 62 dmfc1 v0, $f0 63 jr ra 64END(__subdf3) 65 66LEAF_NOPROFILE(__muldf3) 67 dmtc1 a0, $f12 68 dmtc1 a1, $f14 69 COP1_SYNC 70 mul.d $f0, $f12, $f14 71 dmfc1 v0, $f0 72 jr ra 73END(__muldf3) 74 75LEAF_NOPROFILE(__divdf3) 76 dmtc1 a0, $f12 77 dmtc1 a1, $f14 78 COP1_SYNC 79 div.d $f0, $f12, $f14 80 dmfc1 v0, $f0 81 jr ra 82END(__divdf3) 83 84LEAF_NOPROFILE(__negdf2) 85 dmtc1 a0, $f12 86 COP1_SYNC 87 neg.d $f0, $f12 88 dmfc1 v0, $f0 89 jr ra 90END(__negdf2) 91 92LEAF_NOPROFILE(__extendsfdf2) 93 dmtc1 a0, $f12 94 COP1_SYNC 95 cvt.d.s $f0, $f12 96 dmfc1 v0, $f0 97 jr ra 98END(__extendsfdf2) 99 100LEAF_NOPROFILE(__fixdfdi) 101 dmtc1 a0, $f12 102 COP1_SYNC 103 trunc.l.d $f0, $f12 104 dmfc1 v0, $f0 105 jr ra 106END(__fixdfdi) 107 108LEAF_NOPROFILE(__fixdfsi) 109 dmtc1 a0, $f12 110 COP1_SYNC 111 trunc.w.d $f0, $f12 112 mfc1 v0, $f0 113 jr ra 114END(__fixdfsi) 115 116LEAF_NOPROFILE(__fixunsdfdi) 117 lui t0, 0x43e0 # 9223372036854775808.0 118 dsll t0, t0, 32 119 mtc1 t0, $f0 120 mtc1 a0, $f12 121 COP1_SYNC 122 sub.d $f0, $f12, $f0 # convert to signed 123 trunc.l.d $f0, $f0 124 dmfc1 v0, $f0 125 li v1, 1 126 dsll v1, v1, 63 127 add v0, v0, v1 # convert to unsigned 128 jr ra 129END(__fixunsdfdi) 130 131LEAF_NOPROFILE(__fixunsdfsi) 132 lui t0, 0x41e0 # 2147483648.0 133 dsll t0, t0, 32 134 mtc1 t0, $f0 135 mtc1 a0, $f12 136 COP1_SYNC 137 sub.d $f0, $f12, $f0 # convert to signed 138 trunc.w.d $f0, $f0 139 lui v1, 0x8000 # 0xffffffff80000000 140 mfc1 v0, $f0 141 add v0, v0, v1 # convert to unsigned 142 jr ra 143END(__fixunsdfsi) 144 145LEAF_NOPROFILE(__floatdidf) 146 dmtc1 a0, $f12 147 COP1_SYNC 148 cvt.d.l $f0, $f12 149 dmfc1 v0, $f0 150 jr ra 151END(__floatdidf) 152 153LEAF_NOPROFILE(__floatsidf) 154 mtc1 a0, $f12 155 COP1_SYNC 156 cvt.d.w $f0, $f12 157 dmfc1 v0, $f0 158 jr ra 159END(__floatsidf) 160 161LEAF_NOPROFILE(__floatundidf) 162 li t0, 1 163 dsll t0, t0, 63 164 dsub a0, a0, t0 165 dmtc1 a0, $f12 166 dmtc1 t0, $f14 167 COP1_SYNC 168 cvt.d.l $f0, $f12 169 cvt.d.l $f2, $f14 170 add.d $f0, $f0, $f2 171 dmfc1 v0, $f0 172 jr ra 173END(__floatundidf) 174 175LEAF_NOPROFILE(__floatunsidf) 176 sll a0, a0, 0 177 dmtc1 a0, $f12 178 COP1_SYNC 179 cvt.d.l $f0, $f12 180 dmfc1 v0, $f0 181 jr ra 182END(__floatunsidf) 183 184STRONG_ALIAS(__eqdf2, __nedf2) 185LEAF_NOPROFILE(__nedf2) 186 .set push 187 .set noreorder 188 dmtc1 a0, $f12 189 dmtc1 a1, $f14 190 COP1_SYNC 191 c.eq.d $f12, $f14 192 bc1f 2f 193 li v0, 1 194 move v0, zero 1952: jr ra 196 nop 197 .set pop 198END(__nedf2) 199 200STRONG_ALIAS(__gedf2, __ltdf2) 201LEAF_NOPROFILE(__ltdf2) 202 .set push 203 .set noreorder 204 dmtc1 a0, $f12 205 dmtc1 a1, $f14 206 COP1_SYNC 207 c.olt.d $f12, $f14 208 bc1t 2f 209 li v0, -1 210 move v0, zero 2112: jr ra 212 nop 213 .set pop 214END(__ltdf2) 215 216STRONG_ALIAS(__gtdf2, __ledf2) 217LEAF_NOPROFILE(__ledf2) 218 .set push 219 .set noreorder 220 dmtc1 a0, $f12 221 dmtc1 a1, $f14 222 COP1_SYNC 223 c.ole.d $f12, $f14 224 bc1f 2f 225 li v0, 1 226 move v0, zero 2272: jr ra 228 nop 229 .set pop 230END(__ledf2) 231 232LEAF_NOPROFILE(__unorddf2) 233 .set push 234 .set noreorder 235 dmtc1 a0, $f12 236 dmtc1 a1, $f14 237 COP1_SYNC 238 c.un.d $f12, $f14 239 bc1t 2f 240 li v0, 1 241 move v0, zero 2422: jr ra 243 nop 244 .set pop 245END(__unorddf2) 246