1# frv testcase for ftine $FCCi_2,$GRi,$s12 2# mach: all 3 4 .include "testutils.inc" 5 6 start 7 8 .global ftine 9ftine: 10 and_spr_immed -4081,tbr ; clear tbr.tt 11 set_gr_spr tbr,gr7 12 inc_gr_immed 2112,gr7 ; address of exception handler 13 set_bctrlr_0_0 gr7 ; bctrlr 0,0 14 15 set_spr_immed 128,lcr 16 set_gr_immed 0,gr7 17 18 set_spr_addr bad,lr 19 set_fcc 0x0 0 20 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 21 22 set_psr_et 1 23 set_spr_addr ok1,lr 24 set_fcc 0x1 0 25 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 26 fail 27ok1: 28 set_psr_et 1 29 set_spr_addr ok2,lr 30 set_fcc 0x2 0 31 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 32 fail 33ok2: 34 set_psr_et 1 35 set_spr_addr ok3,lr 36 set_fcc 0x3 0 37 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 38 fail 39ok3: 40 set_psr_et 1 41 set_spr_addr ok4,lr 42 set_fcc 0x4 0 43 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 44 fail 45ok4: 46 set_psr_et 1 47 set_spr_addr ok5,lr 48 set_fcc 0x5 0 49 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 50 fail 51ok5: 52 set_psr_et 1 53 set_spr_addr ok6,lr 54 set_fcc 0x6 0 55 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 56 fail 57ok6: 58 set_psr_et 1 59 set_spr_addr ok7,lr 60 set_fcc 0x7 0 61 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 62 fail 63ok7: 64 set_spr_addr bad,lr 65 set_fcc 0x8 0 66 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 67 68 set_psr_et 1 69 set_spr_addr ok9,lr 70 set_fcc 0x9 0 71 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 72 fail 73ok9: 74 set_psr_et 1 75 set_spr_addr oka,lr 76 set_fcc 0xa 0 77 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 78 fail 79oka: 80 set_psr_et 1 81 set_spr_addr okb,lr 82 set_fcc 0xb 0 83 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 84 fail 85okb: 86 set_psr_et 1 87 set_spr_addr okc,lr 88 set_fcc 0xc 0 89 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 90 fail 91okc: 92 set_psr_et 1 93 set_spr_addr okd,lr 94 set_fcc 0xd 0 95 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 96 fail 97okd: 98 set_psr_et 1 99 set_spr_addr oke,lr 100 set_fcc 0xe 0 101 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 102 fail 103oke: 104 set_psr_et 1 105 set_spr_addr okf,lr 106 set_fcc 0xf 0 107 ftine fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 108 fail 109okf: 110 pass 111bad: 112 fail 113