xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/random_0023.S (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c)
1# mach: bfin
2#include "test.h"
3.include "testutils.inc"
4
5	start
6
7	dmm32 ASTAT, (0x60608a90 | _VS | _V | _AV1S | _AV0S | _AQ | _V_COPY | _AC0_COPY);
8	dmm32 A1.w, 0xf41fbf3f;
9	dmm32 A1.x, 0x00000000;
10	imm32 R5, 0xd8d95310;
11	imm32 R6, 0xd0457fff;
12	R5.H = (A1 -= R6.L * R6.H) (M, FU);
13	checkreg R5, 0x7fff5310;
14	checkreg A1.w, 0x8bfe0f84;
15	checkreg A1.x, 0x00000000;
16	checkreg ASTAT, (0x60608a90 | _VS | _V | _AV1S | _AV0S | _AQ | _V_COPY | _AC0_COPY);
17
18	dmm32 ASTAT, (0x54b0ca90 | _VS | _AV1S | _AC1 | _AC0 | _CC | _AC0_COPY | _AN);
19	dmm32 A1.w, 0xf88288c8;
20	dmm32 A1.x, 0xffffffff;
21	imm32 R0, 0xfffe6736;
22	imm32 R2, 0x8000f882;
23	imm32 R3, 0xffff8391;
24	R0.H = (A1 += R3.L * R2.L) (M, FU);
25	checkreg R0, 0x80006736;
26	checkreg A1.w, 0x7fb7d06a;
27	checkreg A1.x, 0xffffffff;
28	checkreg ASTAT, (0x54b0ca90 | _VS | _V | _AV1S | _AC1 | _AC0 | _CC | _V_COPY | _AC0_COPY | _AN);
29
30	dmm32 ASTAT, (0x1c500480 | _VS | _AV1S | _AV0S | _AC0 | _CC | _AC0_COPY | _AN);
31	dmm32 A1.w, 0x9083dd08;
32	dmm32 A1.x, 0x00000000;
33	imm32 R0, 0x00000000;
34	imm32 R4, 0x00002492;
35	R4.H = (A1 += R4.L * R0.H) (M, FU);
36	checkreg R4, 0x7fff2492;
37	checkreg ASTAT, (0x1c500480 | _VS | _V | _AV1S | _AV0S | _AC0 | _CC | _V_COPY | _AC0_COPY | _AN);
38
39	dmm32 ASTAT, (0x7c00c810 | _AV1S | _AC1 | _AC0);
40	dmm32 A1.w, 0x69e86d3f;
41	dmm32 A1.x, 0xffffffc2;
42	imm32 R1, 0x64f42c5b;
43	imm32 R3, 0x4128529d;
44	R3 = (A1 -= R3.L * R1.L) (M, FU);
45	checkreg R3, 0x80000000;
46	checkreg A1.w, 0x5b981370;
47	checkreg A1.x, 0xffffffc2;
48	checkreg ASTAT, (0x7c00c810 | _VS | _V | _AV1S | _AC1 | _AC0 | _V_COPY);
49
50	dmm32 ASTAT, (0x5cc0c480 | _VS | _AQ | _CC);
51	dmm32 A1.w, 0x34bbe964;
52	dmm32 A1.x, 0x00000036;
53	imm32 R1, 0x7fffffff;
54	imm32 R5, 0x7fff427e;
55	A1 -= R5.L * R1.L (M, FU);
56	checkreg A1.w, 0xf23e2be2;
57	checkreg A1.x, 0x00000035;
58	checkreg ASTAT, (0x5cc0c480 | _VS | _AQ | _CC);
59
60# here the result is zero, and the _V bit is set
61	dmm32 ASTAT, 0x0;
62	dmm32 A0.w, 0x00008492;
63	dmm32 A0.x, 0x00000000;
64	imm32 R2, 0x7fff0002;
65	imm32 R3, 0xfa6e8492;
66	imm32 R6, 0xffff0002;
67	R6 = (A0 -= R3.L * R2.L) (FU);
68	checkreg R6, 0x00000000;
69	checkreg A0.w, 0x00000000;
70	checkreg A0.x, 0x00000000;
71	checkreg ASTAT, ( _VS | _V | _AV0S | _AV0 | _V_COPY);
72
73# here the result is zero, and the _V bit is not set
74	dmm32 ASTAT, (_V | _V_COPY);
75	dmm32 A0.w, 0x1fffc000;
76	dmm32 A0.x, 0x00000000;
77	imm32 R0, 0x80004000;
78	imm32 R4, 0x1fffffff;
79	imm32 R6, 0x80000000;
80	R4.L = (A0 -= R0.L * R6.H) (FU);
81	checkreg R4, 0x1fff0000;
82	checkreg A0.w, 0x00000000;
83	checkreg A0.x, 0x00000000;
84	checkreg ASTAT, (_AV0S | _AV0);
85
86	dmm32 ASTAT, (0x0c108610 | _VS | _AV0S | _AC1 | _AC0 | _AQ | _AC0_COPY | _AN);
87	dmm32 A0.w, 0x0000eaf0;
88	dmm32 A0.x, 0x00000000;
89	imm32 R1, 0x00010000;
90	imm32 R6, 0xfbf10001;
91	R1.L = (A0 -= R6.H * R1.H) (FU);
92	checkreg R1, 0x00010000;
93	checkreg A0.w, 0x00000000;
94	checkreg A0.x, 0x00000000;
95	checkreg ASTAT, (0x0c108610 | _VS | _AV0S | _AV0 | _AC1 | _AC0 | _AQ | _AC0_COPY | _AN);
96
97	pass
98