1//Original:/proj/frio/dv/testcases/core/c_mode_user_superivsor/c_mode_user_superivsor.dsp 2// Spec Reference: mode_user_supervisor 3# mach: bfin 4# sim: --environment operating 5 6#include "test.h" 7.include "testutils.inc" 8start 9 10include(std.inc) 11include(selfcheck.inc) 12include(gen_int.inc) 13INIT_R_REGS(0); 14INIT_P_REGS(0); 15INIT_I_REGS(0); // initialize the dsp address regs 16INIT_M_REGS(0); 17INIT_L_REGS(0); 18INIT_B_REGS(0); 19//CHECK_INIT(p5, 0xe0000000); 20include(symtable.inc) 21CHECK_INIT_DEF(p5); 22 23#ifndef STACKSIZE 24#define STACKSIZE 0x10 25#endif 26#ifndef EVT 27#define EVT 0xFFE02000 28#endif 29#ifndef EVT15 30#define EVT15 0xFFE0203C 31#endif 32#ifndef EVT_OVERRIDE 33#define EVT_OVERRIDE 0xFFE02100 34#endif 35// 36 37////MY_GEN_INT_INIT(0xF0000000) // set location for interrupt table 38 39// 40// Reset/Bootstrap Code 41// (Here we should set the processor operating modes, initialize registers, 42// etc.) 43// 44 45BOOT: 46 47 // in reset mode now 48LD32_LABEL(sp, KSTACK); // setup the stack pointer 49FP = SP; // and frame pointer 50 51LD32(p0, EVT); // Setup Event Vectors and Handlers 52LD32_LABEL(r0, EHANDLE); // Emulation Handler (Int0) 53 [ P0 ++ ] = R0; 54 55LD32_LABEL(r0, RHANDLE); // Reset Handler (Int1) 56 [ P0 ++ ] = R0; 57 58LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2) 59 [ P0 ++ ] = R0; 60 61LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3) 62 [ P0 ++ ] = R0; 63 64 [ P0 ++ ] = R0; // IVT4 not used 65 66LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5) 67 [ P0 ++ ] = R0; 68 69LD32_LABEL(r0, THANDLE); // Timer Handler (Int6) 70 [ P0 ++ ] = R0; 71 72LD32_LABEL(r0, I7HANDLE); // IVG7 Handler 73 [ P0 ++ ] = R0; 74 75LD32_LABEL(r0, I8HANDLE); // IVG8 Handler 76 [ P0 ++ ] = R0; 77 78LD32_LABEL(r0, I9HANDLE); // IVG9 Handler 79 [ P0 ++ ] = R0; 80 81LD32_LABEL(r0, I10HANDLE);// IVG10 Handler 82 [ P0 ++ ] = R0; 83 84LD32_LABEL(r0, I11HANDLE);// IVG11 Handler 85 [ P0 ++ ] = R0; 86 87LD32_LABEL(r0, I12HANDLE);// IVG12 Handler 88 [ P0 ++ ] = R0; 89 90LD32_LABEL(r0, I13HANDLE);// IVG13 Handler 91 [ P0 ++ ] = R0; 92 93LD32_LABEL(r0, I14HANDLE);// IVG14 Handler 94 [ P0 ++ ] = R0; 95 96LD32_LABEL(r0, I15HANDLE);// IVG15 Handler 97 [ P0 ++ ] = R0; 98 99LD32(p0, EVT_OVERRIDE); 100 R0 = 0; 101 [ P0 ++ ] = R0; 102 R0 = -1; // Change this to mask interrupts (*) 103 [ P0 ] = R0; // IMASK 104 105DUMMY: 106 107 R0 = 0 (Z); 108 109LT0 = r0; // set loop counters to something deterministic 110LB0 = r0; 111LC0 = r0; 112LT1 = r0; 113LB1 = r0; 114LC1 = r0; 115 116ASTAT = r0; // reset other internal regs 117 118// The following code sets up the test for running in USER mode 119 120LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a 121 // ReturnFromInterrupt (RTI) 122RETI = r0; // We need to load the return address 123 124// Comment the following line for a USER Mode test 125 126// JUMP STARTSUP; // jump to code start for SUPERVISOR mode 127 128RTI; // execute this instr put us in USER mode 129 130STARTSUP: 131LD32_LABEL(p1, BEGIN); 132 133LD32(p0, EVT15); 134 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start 135 136RAISE 15; // after we RTI, INT 15 should be taken,& return to BEGIN in 137 // USER MODE & go to different RAISE in USER mode 138 // until the end of the test. 139 140NOP; // Workaround for Bug 217 141RTI; 142 143// 144// The Main Program 145// 146STARTUSER: 147LD32_LABEL(sp, USTACK); // setup the stack pointer 148FP = SP; // set frame pointer 149JUMP BEGIN; 150 151//********************************************************************* 152 153BEGIN: 154 155 // COMMENT the following line for USER MODE tests 156 [ -- SP ] = RETI; // enable interrupts in supervisor mode 157 158 // **** YOUR CODE GOES HERE **** 159 160 161 162 // PUT YOUR TEST HERE! 163 // Can't Raise 0, 3, or 4 164RAISE 2; // RTN 165RAISE 5; // RTI 166RAISE 6; // RTI 167RAISE 7; // RTI 168RAISE 8; // RTI 169RAISE 9; // RTI 170RAISE 10; // RTI 171RAISE 11; // RTI 172RAISE 12; // RTI 173RAISE 13; // RTI 174RAISE 14; // RTI 175 176R0 = I0; 177R1 = I1; 178R2 = I2; 179R3 = I3; 180R4 = M0; 181R5 = M1; 182R6 = M2; 183R7 = M3; 184 185CHECKREG(r0, 0x00000018); 186CHECKREG(r1, 0x00000018); 187CHECKREG(r2, 0x00000000); 188CHECKREG(r3, 0x00000018); 189CHECKREG(r4, 0x00000000); 190CHECKREG(r5, 0x00000000); 191CHECKREG(r6, 0x00000000); 192CHECKREG(r7, 0x00000000); 193 194 195END: 196dbg_pass; // End the test 197 198//********************************************************************* 199 200// 201// Handlers for Events 202// 203 204EHANDLE: // Emulation Handler 0 205RTE; 206 207RHANDLE: // Reset Handler 1 208RTI; 209 210NHANDLE: // NMI Handler 2 211 R0 = RETN; 212 I0 += 2; 213 I1 += 2; 214 I2 += 2; 215 I3 += 2; 216 R0 += 2; 217RETN = r0; 218RTN; 219 220XHANDLE: // Exception Handler 3 221 R0 = RETX; 222 I0 += 2; 223 I1 += 2; 224 I3 += 2; 225 R0 += 2; 226RETX = r0; 227RTX; 228 229HWHANDLE: // HW Error Handler 5 230 R0 = RETI; 231 I0 += 2; 232 I1 += 2; 233 I2 += 2; 234 R0 += 2; 235RETI = r0; 236RTI; 237 238THANDLE: // Timer Handler 6 239 R0 = RETI; 240 R0 += 2; 241RETI = r0; 242RTI; 243 244I7HANDLE: // IVG 7 Handler 245 R0 = RETI; 246 I0 += 2; 247 I1 += 2; 248 I3 += 2; 249 R0 += 2; 250RETI = r0; 251RTI; 252 253I8HANDLE: // IVG 8 Handler 254 R0 = RETI; 255 I0 += 2; 256 I1 += 2; 257 I2 += 2; 258 I3 += 2; 259 M0 = I0; 260 M1 = I1; 261 M2 = I2; 262 M3 = I3; 263 R0 += 2; 264RETI = r0; 265RTI; 266 267I9HANDLE: // IVG 9 Handler 268 R0 = RETI; 269 I0 += 2; 270 I1 += 2; 271 I2 += 2; 272 I3 += 2; 273 R0 += 2; 274RETI = r0; 275RTI; 276 277I10HANDLE: // IVG 10 Handler 278 R0 = RETI; 279 I0 += 2; 280 I1 += 2; 281 I2 += 2; 282 I3 += 2; 283 R0 += 2; 284RETI = r0; 285RTI; 286 287I11HANDLE: // IVG 11 Handler 288 I0 = R0; 289 I1 = R1; 290 I2 = R2; 291 M0 = R4; 292 R0 = RETI; 293 I0 += 2; 294 I1 += 2; 295 I2 += 2; 296 I3 += 2; 297 R0 += 2; 298RETI = r0; 299RTI; 300 301I12HANDLE: // IVG 12 Handler 302 R0 = RETI; 303 I0 += 2; 304 I1 += 2; 305 I2 += 2; 306 I3 += 2; 307 R0 += 2; 308RETI = r0; 309RTI; 310 311I13HANDLE: // IVG 13 Handler 312 R0 = RETI; 313 I0 += 2; 314 I1 += 2; 315 I2 += 2; 316 I3 += 2; 317 R0 += 2; 318RETI = r0; 319RTI; 320 321I14HANDLE: // IVG 14 Handler 322 R0 = RETI; 323 I1 += 2; 324 I2 += 2; 325 I3 += 2; 326 R0 += 2; 327RETI = r0; 328RTI; 329 330I15HANDLE: // IVG 15 Handler 331 R4 = 15; 332 I1 += 2; 333 I2 += 2; 334RTI; 335 336// nop;nop;nop;nop;nop;nop;nop; // needed for icache bug 337 338// 339// Data Segment 340// 341 342.data 343DATA: 344 .space (0x10); 345 346// Stack Segments (Both Kernel and User) 347 348 .space (STACKSIZE); 349KSTACK: 350 351 .space (STACKSIZE); 352USTACK: 353// .space (STACKSIZE); // adding this may solve the problem 354