xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/c_ldimmhalf_pibml.s (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c)
1//Original:/proj/frio/dv/testcases/core/c_ldimmhalf_pibml/c_ldimmhalf_pibml.dsp
2// Spec Reference: ldimmhalf p i b m l
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8// set all reg=-1
9
10
11//p0 =0x0123;
12	P1 = 0x1234 (X);
13	P2 = 0x2345 (X);
14	P3 = 0x3456 (X);
15	P4 = 0x4567 (X);
16	P5 = 0x5678 (X);
17	FP = 0x6789 (X);
18	SP = 0x789a (X);
19//CHECKREG p0, 0x00000123;
20	CHECKREG p1, 0x00001234;
21	CHECKREG p2, 0x00002345;
22	CHECKREG p3, 0x00003456;
23	CHECKREG p4, 0x00004567;
24	CHECKREG p5, 0x00005678;
25	CHECKREG fp, 0x00006789;
26	CHECKREG sp, 0x0000789A;
27
28//p0 = -32768;
29	P1 = -32768 (X);
30	P2 = -2222 (X);
31	P3 = -3333 (X);
32	P4 = -4444 (X);
33	P5 = -5555 (X);
34	FP = -6666 (X);
35	SP = -7777 (X);
36//CHECKREG r0, 0xFFFF8000;
37	CHECKREG p1, 0xFFFF8000;
38	CHECKREG p2, 0xFFFFF752;
39	CHECKREG p3, 0xFFFFF2FB;
40	CHECKREG p4, 0xFFFFEEA4;
41	CHECKREG p5, 0xFFFFEA4D;
42	CHECKREG fp, 0xFFFFE5F6;
43	CHECKREG sp, 0xFFFFE19F;
44
45//p0 =0x0123;
46	P1 = 0x7abc (X);
47	P2 = 0x6def (X);
48	P3 = 0x5f56 (X);
49	P4 = 0x7dd7 (X);
50	P5 = 0x4abd (X);
51	FP = 0x7fff (X);
52	SP = 0x7ffa (X);
53//CHECKREG p0, 0x00000123;
54	CHECKREG p1, 0x00007abc;
55	CHECKREG p2, 0x00006def;
56	CHECKREG p3, 0x00005f56;
57	CHECKREG p4, 0x00007dd7;
58	CHECKREG p5, 0x00004abd;
59	CHECKREG fp, 0x00007fff;
60	CHECKREG sp, 0x00007ffa;
61
62	I0 = 0x0123 (X);
63	I1 = 0x1234 (X);
64	I2 = 0x2345 (X);
65	I3 = 0x3456 (X);
66	B0 = 0x0567 (X);
67	B1 = 0x1678 (X);
68	B2 = 0x2789 (X);
69	B3 = 0x389a (X);
70	R0 = I0;
71	R1 = I1;
72	R2 = I2;
73	R3 = I3;
74	R4 = B0;
75	R5 = B1;
76	R6 = B2;
77	R7 = B3;
78	CHECKREG r0, 0x00000123;
79	CHECKREG r1, 0x00001234;
80	CHECKREG r2, 0x00002345;
81	CHECKREG r3, 0x00003456;
82	CHECKREG r4, 0x00000567;
83	CHECKREG r5, 0x00001678;
84	CHECKREG r6, 0x00002789;
85	CHECKREG r7, 0x0000389A;
86
87	I0 = -32768 (X);
88	I1 = -12345 (X);
89	I2 = -23456 (X);
90	I3 = -3456 (X);
91	B0 = -4567 (X);
92	B1 = -5678 (X);
93	B2 = -6678 (X);
94	B3 = -7012 (X);
95	R0 = I0;
96	R1 = I1;
97	R2 = I2;
98	R3 = I3;
99	R4 = B0;
100	R5 = B1;
101	R6 = B2;
102	R7 = B3;
103	CHECKREG r0, 0xFFFF8000;
104	CHECKREG r1, 0xFFFFCFC7;
105	CHECKREG r2, 0xFFFFA460;
106	CHECKREG r3, 0xFFFFF280;
107	CHECKREG r4, 0xFFFFEE29;
108	CHECKREG r5, 0xFFFFE9D2;
109	CHECKREG r6, 0xFFFFE5EA;
110	CHECKREG r7, 0xFFFFE49C;
111
112	I0 = 0x7abd (X);
113	I1 = 0x7bf4 (X);
114	I2 = 0x6c45 (X);
115	I3 = 0x7d56 (X);
116	B0 = 0x7e67 (X);
117	B1 = 0x7f78 (X);
118	B2 = 0x7ff9 (X);
119	B3 = 0x7fff (X);
120	R0 = I0;
121	R1 = I1;
122	R2 = I2;
123	R3 = I3;
124	R4 = B0;
125	R5 = B1;
126	R6 = B2;
127	R7 = B3;
128	CHECKREG r0, 0x00007abd;
129	CHECKREG r1, 0x00007bf4;
130	CHECKREG r2, 0x00006c45;
131	CHECKREG r3, 0x00007d56;
132	CHECKREG r4, 0x00007e67;
133	CHECKREG r5, 0x00007f78;
134	CHECKREG r6, 0x00007ff9;
135	CHECKREG r7, 0x00007fff;
136
137	M0 = 0x7123 (X);
138	M1 = 0x7234 (X);
139	M2 = 0x7345 (X);
140	M3 = 0x7456 (X);
141	L0 = 0x7567 (X);
142	L1 = 0x7678 (X);
143	L2 = 0x7789 (X);
144	L3 = 0x789a (X);
145	R0 = M0;
146	R1 = M1;
147	R2 = M2;
148	R3 = M3;
149	R4 = L0;
150	R5 = L1;
151	R6 = L2;
152	R7 = L3;
153	CHECKREG r0, 0x00007123;
154	CHECKREG r1, 0x00007234;
155	CHECKREG r2, 0x00007345;
156	CHECKREG r3, 0x00007456;
157	CHECKREG r4, 0x00007567;
158	CHECKREG r5, 0x00007678;
159	CHECKREG r6, 0x00007789;
160	CHECKREG r7, 0x0000789A;
161
162	M0 = -32768 (X);
163	M1 = -123 (X);
164	M2 = -234 (X);
165	M3 = -345 (X);
166	L0 = -456 (X);
167	L1 = -567 (X);
168	L2 = -667 (X);
169	L3 = -701 (X);
170	R0 = M0;
171	R1 = M1;
172	R2 = M2;
173	R3 = M3;
174	R4 = L0;
175	R5 = L1;
176	R6 = L2;
177	R7 = L3;
178	CHECKREG r0, 0xFFFF8000;
179	CHECKREG r1, 0xFFFFFF85;
180	CHECKREG r2, 0xFFFFFF16;
181	CHECKREG r3, 0xFFFFFEA7;
182	CHECKREG r4, 0xFFFFFE38;
183	CHECKREG r5, 0xFFFFFDC9;
184	CHECKREG r6, 0xFFFFFD65;
185	CHECKREG r7, 0xFFFFFD43;
186
187	M0 = 0x7aaa (X);
188	M1 = 0x7bbb (X);
189	M2 = 0x7ccc (X);
190	M3 = 0x7ddd (X);
191	L0 = 0x7eee (X);
192	L1 = 0x7fa8 (X);
193	L2 = 0x7fb9 (X);
194	L3 = 0x7fcc (X);
195	R0 = M0;
196	R1 = M1;
197	R2 = M2;
198	R3 = M3;
199	R4 = L0;
200	R5 = L1;
201	R6 = L2;
202	R7 = L3;
203	CHECKREG r0, 0x00007aaa;
204	CHECKREG r1, 0x00007bbb;
205	CHECKREG r2, 0x00007ccc;
206	CHECKREG r3, 0x00007ddd;
207	CHECKREG r4, 0x00007eee;
208	CHECKREG r5, 0x00007fa8;
209	CHECKREG r6, 0x00007fb9;
210	CHECKREG r7, 0x00007fcc;
211
212	pass
213