1//Original:/testcases/core/c_ldimmhalf_drhi/c_ldimmhalf_drhi.dsp 2// Spec Reference: ldimmhalf dreg hi 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 9 10INIT_R_REGS -1; 11 12// test Dreg 13R0.H = 0x0001; 14R1.H = 0x0003; 15R2.H = 0x0005; 16R3.H = 0x0007; 17R4.H = 0x0009; 18R5.H = 0x000b; 19R6.H = 0x000d; 20R7.H = 0x000f; 21CHECKREG r0, 0x0001FFFF; 22CHECKREG r1, 0x0003FFFF; 23CHECKREG r2, 0x0005FFFF; 24CHECKREG r3, 0x0007FFFF; 25CHECKREG r4, 0x0009FFFF; 26CHECKREG r5, 0x000bFFFF; 27CHECKREG r6, 0x000dFFFF; 28CHECKREG r7, 0x000fFFFF; 29 30R0.H = 0x0020; 31R1.H = 0x0040; 32R2.H = 0x0060; 33R3.H = 0x0080; 34R4.H = 0x00a0; 35R5.H = 0x00b0; 36R6.H = 0x00c0; 37R7.H = 0x00d0; 38CHECKREG r0, 0x0020FFFF; 39CHECKREG r1, 0x0040FFFF; 40CHECKREG r2, 0x0060FFFF; 41CHECKREG r3, 0x0080FFFF; 42CHECKREG r4, 0x00a0FFFF; 43CHECKREG r5, 0x00b0FFFF; 44CHECKREG r6, 0x00c0FFFF; 45CHECKREG r7, 0x00d0FFFF; 46 47R0.H = 0x0100; 48R1.H = 0x0200; 49R2.H = 0x0300; 50R3.H = 0x0400; 51R4.H = 0x0500; 52R5.H = 0x0600; 53R6.H = 0x0700; 54R7.H = 0x0800; 55CHECKREG r0, 0x0100FFFF; 56CHECKREG r1, 0x0200FFFF; 57CHECKREG r2, 0x0300FFFF; 58CHECKREG r3, 0x0400FFFF; 59CHECKREG r4, 0x0500FFFF; 60CHECKREG r5, 0x0600FFFF; 61CHECKREG r6, 0x0700FFFF; 62CHECKREG r7, 0x0800FFFF; 63 64R0 = 0; 65R1 = 0; 66R2 = 0; 67R3 = 0; 68R4 = 0; 69R5 = 0; 70R6 = 0; 71R7 = 0; 72R0.H = 0x7fff; 73R1.H = 0x7ffe; 74R2.H = 32767; 75R3.H = 32766; 76R4.H = -32768; 77R5.H = -32767; 78CHECKREG r0, 0x7fff0000; 79CHECKREG r1, 0x7ffe0000; 80CHECKREG r2, 0x7fff0000; 81CHECKREG r3, 0x7ffe0000; 82CHECKREG r4, 0x80000000; 83CHECKREG r5, 0x80010000; 84 85pass 86