1//Original:/proj/frio/dv/testcases/core/c_interr_loopsetup_stld/c_interr_loopsetup_stld.dsp 2// Spec Reference: interrupt loopsetup_ldst 3# mach: bfin 4 5#include "test.h" 6.include "testutils.inc" 7start 8 9 A0 = 0; // reset accumulators 10 A1 = 0; 11 12P1 = 3; 13P2 = 4; 14 15LD32(r0, 0x00200005); 16LD32(r1, 0x00300010); 17LD32(r2, 0x00500012); 18LD32(r3, 0x00600024); 19LD32(r4, 0x00700016); 20LD32(r5, 0x00900028); 21LD32(r6, 0x0a000030); 22LD32(r7, 0x00b00044); 23 24loadsym I0, DATA0; 25loadsym I1, DATA1; 26R0 = [ I0 ++ ]; 27R1 = [ I1 ++ ]; 28LSETUP ( start1 , end1 ) LC0 = P1; 29start1: R0 += 1; 30 R1 += 2; 31 A1 += R0.H * R1.H, A0 += R0.L * R1.L || R0 = [ I0 ++ ] || R1 = [ I1 ++ ]; // dsp32mac dual 32 // a1 += h*h, a0 += l*l (r0,r1) ; r0 = [i0++]; r1 = [i1++]; // dsp32mac 33 R2 = ( R2 + R5 ) << 1; // alu2op 34DIVQ ( R5 , R3 ); 35 R1 <<= R5; 36 R1 >>>= R1; 37 R6 = ~ R0; 38 //MY_GEN_INT(10, 1) 39DIVQ ( R5 , R2 ); 40 R0 = R3.B (X); 41DIVS ( R7 , R0 ); 42end1: R2 += 3; 43 R3 = ( A0 += A1 ); 44CHECKREG(r0, 0x00000024); 45CHECKREG(r1, 0x00000000); 46CHECKREG(r2, 0x0670098D); 47CHECKREG(r3, 0x000015EC); 48CHECKREG(r4, 0x00700016); 49CHECKREG(r5, 0x0B240A39); 50CHECKREG(r6, 0xFFF2FFFC); 51CHECKREG(r7, 0x05800220); 52 53A0 = 0; 54A1 = 0; 55LSETUP ( start2 , end2 ) LC0 = P2; 56start2: R4 += 4; 57 //a1 += h*h, a0 += l*l (r0,r1), r0 = [i0--], r1 = [i1--]; 58 A1 += R0.H * R1.H, A0 += R0.L * R1.L; R0 = [ I0 -- ]; R1 = [ I1 -- ]; 59 R1 <<= R5; 60 R6 = R7.B (Z); 61 R2 = - R6; 62 R3 = R4.L (Z); 63DIVS ( R1 , R1 ); 64 R6 = - R0; 65 R0 >>= R0; 66DIVS ( R4 , R7 ); 67 //MY_GEN_INT(13, 1) 68 R1 = R2.L (Z); 69end2: R5 += -5; 70 R6 = ( A0 += A1 ); 71CHECKREG(r0, 0x00000000); 72CHECKREG(r1, 0x0000FFE0); 73CHECKREG(r2, 0xFFFFFFE0); 74CHECKREG(r3, 0x000000EC); 75CHECKREG(r4, 0x070001D8); 76CHECKREG(r5, 0x0B240A25); 77CHECKREG(r6, 0x00000000); 78CHECKREG(r7, 0x05800220); 79LD32(r0, 0x01200805); 80LD32(r1, 0x02300710); 81LD32(r2, 0x03500612); 82LD32(r3, 0x04600524); 83LD32(r4, 0x05700416); 84LD32(r5, 0x06900328); 85LD32(r6, 0x0a700230); 86LD32(r7, 0x08b00044); 87 88loadsym I2, DATA0; 89loadsym I3, DATA1; 90[ I2 ++ ] = R0; 91[ I3 ++ ] = R1; 92LSETUP ( start3 , end3 ) LC0 = P1; 93start3: 94 [ I2 ++ ] = R2; 95 [ I3 ++ ] = R3; 96 R2 += 1; 97end3: 98 R3 += 1; 99 100A0 = 0; 101A1 = 0; 102LSETUP ( start4 , end4 ) LC0 = P2; 103R0 = [ I0 -- ]; 104R1 = [ I1 -- ]; 105start4: 106 // a1 += h*h, a0 += l*l (r0,r1), r0 = [i2--], r1 = [i3--]; 107 A1 += R0.H * R1.H, A0 += R0.L * R1.L; R0 = [ I2 -- ]; R1 = [ I3 -- ]; 108 R4 = R4 + R0; // comp3op 109 R5 = R7.L (Z); 110 R4 >>>= R5; 111 R0 = R7.B (X); 112DIVQ ( R6 , R6 ); 113 //MY_GEN_INT(7, 1) 114end4: R5 = R5 + R1; 115 R6 = ( A0 += A1 ); 116 R7 = ( A0 += A1 ); 117CHECKREG(r0, 0x00000044); 118CHECKREG(r1, 0x04600524); 119CHECKREG(r2, 0x03500615); 120CHECKREG(r3, 0x04600527); 121CHECKREG(r4, 0x00000000); 122CHECKREG(r5, 0x04600568); 123CHECKREG(r6, 0x007C3498); 124CHECKREG(r7, 0x00812098); 125 126 127pass; // End the test 128 129// 130// Data Segment 131// 132 133 134 135.data 136 137DATA0: 138.dd 0x000a0000 139.dd 0x000b0001 140.dd 0x000c0002 141.dd 0x000d0003 142.dd 0x000e0004 143.dd 0x000f0005 144.dd 0x00100006 145.dd 0x00200007 146.dd 0x00300008 147.dd 0x00400009 148.dd 0x0050000a 149.dd 0x0060000b 150.dd 0x0070000c 151.dd 0x0080000d 152.dd 0x0090000e 153.dd 0x0100000f 154.dd 0x02000010 155.dd 0x03000011 156.dd 0x04000012 157.dd 0x05000013 158.dd 0x06000014 159.dd 0x001a0000 160.dd 0x001b0001 161.dd 0x001c0002 162.dd 0x001d0003 163.dd 0x00010004 164.dd 0x00010005 165.dd 0x02100006 166.dd 0x02200007 167.dd 0x02300008 168.dd 0x02200009 169.dd 0x0250000a 170.dd 0x0260000b 171.dd 0x0270000c 172.dd 0x0280000d 173.dd 0x0290000e 174.dd 0x2100000f 175.dd 0x22000010 176.dd 0x22000011 177.dd 0x24000012 178.dd 0x25000013 179.dd 0x26000014 180 181DATA1: 182.dd 0x00f00100 183.dd 0x00e00101 184.dd 0x00d00102 185.dd 0x00c00103 186.dd 0x00b00104 187.dd 0x00a00105 188.dd 0x00900106 189.dd 0x00800107 190.dd 0x00100108 191.dd 0x00200109 192.dd 0x0030010a 193.dd 0x0040010b 194.dd 0x0050011c 195.dd 0x0060010d 196.dd 0x0070010e 197.dd 0x0080010f 198.dd 0x00900110 199.dd 0x01000111 200.dd 0x02000112 201.dd 0x03000113 202.dd 0x04000114 203.dd 0x05000115 204.dd 0x03f00100 205.dd 0x03e00101 206.dd 0x03d00102 207.dd 0x03c00103 208.dd 0x03b00104 209.dd 0x03a00105 210.dd 0x03900106 211.dd 0x03800107 212.dd 0x03100108 213.dd 0x03200109 214.dd 0x0330010a 215.dd 0x0330010b 216.dd 0x0350011c 217.dd 0x0360010d 218.dd 0x0370010e 219.dd 0x0380010f 220.dd 0x03900110 221.dd 0x31000111 222.dd 0x32000112 223.dd 0x33000113 224.dd 0x34000114 225