xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/c_dsp32shiftim_ahalf_lp.s (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c) 
1//Original:/testcases/core/c_dsp32shiftim_ahalf_lp/c_dsp32shiftim_ahalf_lp.dsp
2// Spec Reference: dspshiftimm dreg_lo(hi) = ashift (dreg_lo(hi) by imm5)
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8// Ashift : positive data, count (+)=left (half reg)
9// d_lo = ashift (d_lo BY d_lo)
10// RLx by RLx
11imm32 r0, 0x01010100;
12imm32 r1, 0x01020101;
13imm32 r2, 0x01030102;
14imm32 r3, 0x01040103;
15imm32 r4, 0x01050104;
16imm32 r5, 0x01060105;
17imm32 r6, 0x01070106;
18imm32 r7, 0x01080107;
19R0.L = R0.L << 0;
20R1.L = R1.L << 1;
21R2.L = R2.L << 2;
22R3.L = R3.L << 3;
23R4.L = R4.L << 4;
24R5.L = R5.L << 5;
25R6.L = R6.L << 6;
26R7.L = R7.L << 7;
27CHECKREG r0, 0x01010100;
28CHECKREG r1, 0x01020202;
29CHECKREG r2, 0x01030408;
30CHECKREG r3, 0x01040818;
31CHECKREG r4, 0x01051040;
32CHECKREG r5, 0x010620A0;
33CHECKREG r6, 0x01074180;
34CHECKREG r7, 0x01088380;
35
36imm32 r0, 0x00090201;
37imm32 r1, 0x00100201;
38imm32 r2, 0x00110202;
39imm32 r3, 0x00120203;
40imm32 r4, 0x00130204;
41imm32 r5, 0x00140205;
42imm32 r6, 0x00150206;
43imm32 r7, 0x00160207;
44R7.L = R0.L << 8;
45R6.L = R1.L << 9;
46R5.L = R2.L << 10;
47R4.L = R3.L << 11;
48R3.L = R4.L << 12;
49R2.L = R5.L << 13;
50R1.L = R6.L << 14;
51R0.L = R7.L << 15;
52CHECKREG r1, 0x00100000;
53CHECKREG r0, 0x00090000;
54CHECKREG r2, 0x00110000;
55CHECKREG r3, 0x00120000;
56CHECKREG r4, 0x00131800;
57CHECKREG r5, 0x00140800;
58CHECKREG r6, 0x00150200;
59CHECKREG r7, 0x00160100;
60
61
62imm32 r0, 0x00170401;
63imm32 r1, 0x00180401;
64imm32 r2, 0x0019040f;
65imm32 r3, 0x00200403;
66imm32 r4, 0x00210404;
67imm32 r5, 0x00220405;
68imm32 r6, 0x00230406;
69imm32 r7, 0x00244407;
70R6.L = R0.L << 15;
71R5.L = R1.L << 15;
72R4.L = R2.L << 15;
73R3.L = R3.L << 15;
74R2.L = R4.L << 15;
75R1.L = R5.L << 15;
76R0.L = R6.L << 15;
77R7.L = R7.L << 15;
78CHECKREG r0, 0x00170000;
79CHECKREG r1, 0x00180000;
80CHECKREG r2, 0x00190000;
81CHECKREG r3, 0x00208000;
82CHECKREG r4, 0x00218000;
83CHECKREG r5, 0x00228000;
84CHECKREG r6, 0x00238000;
85CHECKREG r7, 0x00248000;
86
87imm32 r0, 0x00005001;
88imm32 r1, 0x00005001;
89imm32 r2, 0x00005002;
90imm32 r3, 0x00005010;
91imm32 r4, 0x00005004;
92imm32 r5, 0x00005005;
93imm32 r6, 0x00000506;
94imm32 r7, 0x00000507;
95R5.L = R0.L << 13;
96R6.L = R1.L << 13;
97R7.L = R2.L << 13;
98R0.L = R3.L << 13;
99R1.L = R4.L << 13;
100R2.L = R5.L << 13;
101R3.L = R6.L << 13;
102R4.L = R7.L << 13;
103CHECKREG r0, 0x00000000;
104CHECKREG r1, 0x00008000;
105CHECKREG r2, 0x00000000;
106CHECKREG r3, 0x00000000;
107CHECKREG r4, 0x00000000;
108CHECKREG r5, 0x00002000;
109CHECKREG r6, 0x00002000;
110CHECKREG r7, 0x00004000;
111
112// RHx by RLx
113imm32 r0, 0x00006010;
114imm32 r1, 0x00016020;
115imm32 r2, 0x00026030;
116imm32 r3, 0x00036040;
117imm32 r4, 0x00046050;
118imm32 r5, 0x00056060;
119imm32 r6, 0x00066070;
120imm32 r7, 0x00076080;
121R0.L = R0.H << 10;
122R1.L = R1.H << 10;
123R2.L = R2.H << 10;
124R3.L = R3.H << 10;
125R4.L = R4.H << 10;
126R5.L = R5.H << 10;
127R6.L = R6.H << 10;
128R7.L = R7.H << 10;
129CHECKREG r0, 0x00000000;
130CHECKREG r1, 0x00010400;
131CHECKREG r2, 0x00020800;
132CHECKREG r3, 0x00030C00;
133CHECKREG r4, 0x00041000;
134CHECKREG r5, 0x00051400;
135CHECKREG r6, 0x00061800;
136CHECKREG r7, 0x00071C00;
137
138imm32 r0, 0x00010090;
139imm32 r1, 0x00010111;
140imm32 r2, 0x00020120;
141imm32 r3, 0x00030130;
142imm32 r4, 0x00040140;
143imm32 r5, 0x00050150;
144imm32 r6, 0x00060160;
145imm32 r7, 0x00070170;
146R1.L = R0.H << 1;
147R2.L = R1.H << 1;
148R3.L = R2.H << 1;
149R4.L = R3.H << 1;
150R5.L = R4.H << 1;
151R6.L = R5.H << 1;
152R7.L = R6.H << 1;
153R0.L = R7.H << 1;
154CHECKREG r1, 0x00010002;
155CHECKREG r2, 0x00020002;
156CHECKREG r3, 0x00030004;
157CHECKREG r4, 0x00040006;
158CHECKREG r5, 0x00050008;
159CHECKREG r6, 0x0006000A;
160CHECKREG r7, 0x0007000C;
161CHECKREG r0, 0x0001000E;
162
163
164imm32 r0, 0x0a010000;
165imm32 r1, 0x0b010000;
166imm32 r2, 0x0c02000f;
167imm32 r3, 0x0d030000;
168imm32 r4, 0x0e040000;
169imm32 r5, 0x0f050000;
170imm32 r6, 0x01060000;
171imm32 r7, 0x02070000;
172R2.L = R0.H << 12;
173R3.L = R1.H << 12;
174R4.L = R2.H << 12;
175R5.L = R3.H << 12;
176R6.L = R4.H << 12;
177R7.L = R5.H << 12;
178R0.L = R6.H << 12;
179R1.L = R7.H << 12;
180CHECKREG r0, 0x0A016000;
181CHECKREG r1, 0x0B017000;
182CHECKREG r2, 0x0C021000;
183CHECKREG r3, 0x0D031000;
184CHECKREG r4, 0x0E042000;
185CHECKREG r5, 0x0F053000;
186CHECKREG r6, 0x01064000;
187CHECKREG r7, 0x02075000;
188
189imm32 r0, 0x01010001;
190imm32 r1, 0x02010001;
191imm32 r2, 0x03020002;
192imm32 r3, 0x04030010;
193imm32 r4, 0x05040004;
194imm32 r5, 0x06050005;
195imm32 r6, 0x07060006;
196imm32 r7, 0x08070007;
197R3.L = R0.H << 13;
198R4.L = R1.H << 13;
199R5.L = R2.H << 13;
200R6.L = R3.H << 13;
201R7.L = R4.H << 13;
202R0.L = R5.H << 13;
203R1.L = R6.H << 13;
204R2.L = R7.H << 13;
205CHECKREG r0, 0x0101A000;
206CHECKREG r1, 0x0201C000;
207CHECKREG r2, 0x0302E000;
208CHECKREG r3, 0x04032000;
209CHECKREG r4, 0x05042000;
210CHECKREG r5, 0x06054000;
211CHECKREG r6, 0x07066000;
212CHECKREG r7, 0x08078000;
213
214// RLx by RLx
215imm32 r0, 0xa0000400;
216imm32 r1, 0xbb000401;
217imm32 r2, 0xc0000402;
218imm32 r3, 0xd0000403;
219imm32 r4, 0xe0000404;
220imm32 r5, 0xf0000405;
221imm32 r6, 0x10000406;
222imm32 r7, 0x20000407;
223R0.H = R0.L << 14;
224R1.H = R1.L << 14;
225R2.H = R2.L << 14;
226R3.H = R3.L << 14;
227R4.H = R4.L << 14;
228R5.H = R5.L << 14;
229R6.H = R6.L << 14;
230R7.H = R7.L << 14;
231CHECKREG r0, 0x00000400;
232CHECKREG r1, 0x40000401;
233CHECKREG r2, 0x80000402;
234CHECKREG r3, 0xC0000403;
235CHECKREG r4, 0x00000404;
236CHECKREG r5, 0x40000405;
237CHECKREG r6, 0x80000406;
238CHECKREG r7, 0xC0000407;
239
240imm32 r0, 0x0a000001;
241imm32 r1, 0x0b000001;
242imm32 r2, 0x0cd00002;
243imm32 r3, 0x0d000003;
244imm32 r4, 0x0e000004;
245imm32 r5, 0x0f000005;
246imm32 r6, 0x03000006;
247imm32 r7, 0x04000007;
248R1.H = R0.L << 15;
249R2.H = R1.L << 15;
250R3.H = R2.L << 15;
251R4.H = R3.L << 15;
252R5.H = R4.L << 15;
253R6.H = R5.L << 15;
254R7.H = R6.L << 15;
255R0.H = R7.L << 15;
256CHECKREG r1, 0x80000001;
257CHECKREG r2, 0x80000002;
258CHECKREG r3, 0x00000003;
259CHECKREG r4, 0x80000004;
260CHECKREG r5, 0x00000005;
261CHECKREG r6, 0x80000006;
262CHECKREG r7, 0x00000007;
263CHECKREG r0, 0x80000001;
264
265
266imm32 r0, 0x10000001;
267imm32 r1, 0x02000001;
268imm32 r2, 0x0300000f;
269imm32 r3, 0x04000003;
270imm32 r4, 0x05000004;
271imm32 r5, 0x06000005;
272imm32 r6, 0x07000006;
273imm32 r7, 0x00800007;
274R2.H = R0.L << 2;
275R3.H = R1.L << 2;
276R4.H = R2.L << 2;
277R5.H = R3.L << 2;
278R6.H = R4.L << 2;
279R7.H = R5.L << 2;
280R0.H = R6.L << 2;
281R1.H = R7.L << 2;
282CHECKREG r0, 0x00180001;
283CHECKREG r1, 0x001C0001;
284CHECKREG r2, 0x0004000F;
285CHECKREG r3, 0x00040003;
286CHECKREG r4, 0x003C0004;
287CHECKREG r5, 0x000C0005;
288CHECKREG r6, 0x00100006;
289CHECKREG r7, 0x00140007;
290
291imm32 r0, 0x00000801;
292imm32 r1, 0x00000801;
293imm32 r2, 0x00000802;
294imm32 r3, 0x00000810;
295imm32 r4, 0x00000804;
296imm32 r5, 0x00000805;
297imm32 r6, 0x00000806;
298imm32 r7, 0x00000807;
299R3.H = R0.L << 3;
300R4.H = R1.L << 3;
301R5.H = R2.L << 3;
302R6.H = R3.L << 3;
303R7.H = R4.L << 3;
304R0.H = R5.L << 3;
305R1.H = R6.L << 3;
306R2.H = R7.L << 3;
307CHECKREG r0, 0x40280801;
308CHECKREG r1, 0x40300801;
309CHECKREG r2, 0x40380802;
310CHECKREG r3, 0x40080810;
311CHECKREG r4, 0x40080804;
312CHECKREG r5, 0x40100805;
313CHECKREG r6, 0x40800806;
314CHECKREG r7, 0x40200807;
315
316// RHx by RLx
317imm32 r0, 0x00000400;
318imm32 r1, 0x00010500;
319imm32 r2, 0x00020060;
320imm32 r3, 0x00030070;
321imm32 r4, 0x00040800;
322imm32 r5, 0x00050090;
323imm32 r6, 0x00060d00;
324imm32 r7, 0x00070a00;
325R7.H = R0.H << 10;
326R6.H = R1.H << 10;
327R5.H = R2.H << 10;
328R4.H = R3.H << 10;
329R3.H = R4.H << 10;
330R2.H = R5.H << 10;
331R1.H = R6.H << 10;
332R0.H = R7.H << 10;
333CHECKREG r1, 0x00000500;
334CHECKREG r2, 0x00000060;
335CHECKREG r3, 0x00000070;
336CHECKREG r4, 0x0C000800;
337CHECKREG r5, 0x08000090;
338CHECKREG r6, 0x04000D00;
339CHECKREG r7, 0x00000A00;
340CHECKREG r0, 0x00000400;
341
342imm32 r0, 0x00010000;
343imm32 r1, 0x00010001;
344imm32 r2, 0x00020001;
345imm32 r3, 0x00030002;
346imm32 r4, 0x00040003;
347imm32 r5, 0x00050004;
348imm32 r6, 0x00060005;
349imm32 r7, 0x00070006;
350R6.H = R0.H << 11;
351R5.H = R1.H << 11;
352R4.H = R2.H << 11;
353R3.H = R3.H << 11;
354R2.H = R4.H << 11;
355R1.H = R5.H << 11;
356R7.H = R6.H << 11;
357R0.H = R7.H << 11;
358CHECKREG r1, 0x00000001;
359CHECKREG r2, 0x00000001;
360CHECKREG r3, 0x18000002;
361CHECKREG r4, 0x10000003;
362CHECKREG r5, 0x08000004;
363CHECKREG r6, 0x08000005;
364CHECKREG r7, 0x00000006;
365CHECKREG r0, 0x00000000;
366
367
368imm32 r0, 0x00010060;
369imm32 r1, 0x00010060;
370imm32 r2, 0x0002006f;
371imm32 r3, 0x00030060;
372imm32 r4, 0x00040060;
373imm32 r5, 0x00050060;
374imm32 r6, 0x00060060;
375imm32 r7, 0x00070060;
376R4.H = R0.H << 12;
377R5.H = R1.H << 12;
378R6.H = R2.H << 12;
379R7.H = R3.H << 12;
380R0.H = R4.H << 12;
381R1.H = R5.H << 12;
382R2.H = R6.H << 12;
383R3.H = R7.H << 12;
384CHECKREG r0, 0x00000060;
385CHECKREG r1, 0x00000060;
386CHECKREG r2, 0x0000006F;
387CHECKREG r3, 0x00000060;
388CHECKREG r4, 0x10000060;
389CHECKREG r5, 0x10000060;
390CHECKREG r6, 0x20000060;
391CHECKREG r7, 0x30000060;
392
393imm32 r0, 0x12010070;
394imm32 r1, 0x23010070;
395imm32 r2, 0x34020070;
396imm32 r3, 0x45030070;
397imm32 r4, 0x56040070;
398imm32 r5, 0x67050070;
399imm32 r6, 0x78060070;
400imm32 r7, 0x09070070;
401R4.H = R0.H << 3;
402R5.H = R1.H << 3;
403R6.H = R2.H << 3;
404R7.H = R3.H << 3;
405R0.H = R4.H << 3;
406R1.H = R5.H << 3;
407R2.H = R6.H << 3;
408R3.H = R7.H << 3;
409CHECKREG r0, 0x80400070;
410CHECKREG r1, 0xC0400070;
411CHECKREG r2, 0x00800070;
412CHECKREG r3, 0x40C00070;
413CHECKREG r4, 0x90080070;
414CHECKREG r5, 0x18080070;
415CHECKREG r6, 0xA0100070;
416CHECKREG r7, 0x28180070;
417
418pass
419