xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/c_dsp32shift_signbits_rh.s (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c) 
1//Original:/testcases/core/c_dsp32shift_signbits_rh/c_dsp32shift_signbits_rh.dsp
2// Spec Reference: dsp32shift signbits dregs_hi
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9
10
11imm32 r0, 0xd1000000;
12imm32 r1, 0xd2000001;
13imm32 r2, 0xd3000002;
14imm32 r3, 0xd4000003;
15imm32 r4, 0xd5000004;
16imm32 r5, 0xd6000005;
17imm32 r6, 0xd7000006;
18imm32 r7, 0xd8000007;
19R0.L = SIGNBITS R0.H;
20R1.L = SIGNBITS R0.H;
21R2.L = SIGNBITS R0.H;
22R3.L = SIGNBITS R0.H;
23R4.L = SIGNBITS R0.H;
24R5.L = SIGNBITS R0.H;
25R6.L = SIGNBITS R0.H;
26R7.L = SIGNBITS R0.H;
27CHECKREG r0, 0xD1000001;
28CHECKREG r1, 0xD2000001;
29CHECKREG r2, 0xD3000001;
30CHECKREG r3, 0xD4000001;
31CHECKREG r4, 0xD5000001;
32CHECKREG r5, 0xD6000001;
33CHECKREG r6, 0xD7000001;
34CHECKREG r7, 0xD8000001;
35
36imm32 r0, 0xe200d001;
37imm32 r1, 0xe2000001;
38imm32 r2, 0xe200d002;
39imm32 r3, 0xe200d003;
40imm32 r4, 0xe200d004;
41imm32 r5, 0xe200d005;
42imm32 r6, 0xe200d006;
43imm32 r7, 0xe200d007;
44R0.L = SIGNBITS R1.H;
45R1.L = SIGNBITS R1.H;
46R2.L = SIGNBITS R1.H;
47R3.L = SIGNBITS R1.H;
48R4.L = SIGNBITS R1.H;
49R5.L = SIGNBITS R1.H;
50R6.L = SIGNBITS R1.H;
51R7.L = SIGNBITS R1.H;
52CHECKREG r0, 0xE2000002;
53CHECKREG r1, 0xE2000002;
54CHECKREG r2, 0xE2000002;
55CHECKREG r3, 0xE2000002;
56CHECKREG r4, 0xE2000002;
57CHECKREG r5, 0xE2000002;
58CHECKREG r6, 0xE2000002;
59CHECKREG r7, 0xE2000002;
60
61
62imm32 r0, 0x0000e001;
63imm32 r1, 0x0000e001;
64imm32 r2, 0xf000000f;
65imm32 r3, 0x0000e003;
66imm32 r4, 0x0000e004;
67imm32 r5, 0x0000e005;
68imm32 r6, 0x0000e006;
69imm32 r7, 0x0000e007;
70R0.L = SIGNBITS R2.H;
71R1.L = SIGNBITS R2.H;
72R2.L = SIGNBITS R2.H;
73R3.L = SIGNBITS R2.H;
74R4.L = SIGNBITS R2.H;
75R5.L = SIGNBITS R2.H;
76R6.L = SIGNBITS R2.H;
77R7.L = SIGNBITS R2.H;
78CHECKREG r0, 0x00000003;
79CHECKREG r1, 0x00000003;
80CHECKREG r2, 0xF0000003;
81CHECKREG r3, 0x00000003;
82CHECKREG r4, 0x00000003;
83CHECKREG r5, 0x00000003;
84CHECKREG r6, 0x00000003;
85CHECKREG r7, 0x00000003;
86
87imm32 r0, 0x0100f001;
88imm32 r1, 0x0100f001;
89imm32 r2, 0x0100f002;
90imm32 r3, 0x01000010;
91imm32 r4, 0x0100f004;
92imm32 r5, 0x0100f005;
93imm32 r6, 0x0100f006;
94imm32 r7, 0x0100f007;
95R0.L = SIGNBITS R3.H;
96R1.L = SIGNBITS R3.H;
97R2.L = SIGNBITS R3.H;
98R3.L = SIGNBITS R3.H;
99R4.L = SIGNBITS R3.H;
100R5.L = SIGNBITS R3.H;
101R6.L = SIGNBITS R3.H;
102R7.L = SIGNBITS R3.H;
103CHECKREG r0, 0x01000006;
104CHECKREG r1, 0x01000006;
105CHECKREG r2, 0x01000006;
106CHECKREG r3, 0x01000006;
107CHECKREG r4, 0x01000006;
108CHECKREG r5, 0x01000006;
109CHECKREG r6, 0x01000006;
110CHECKREG r7, 0x01000006;
111
112imm32 r0, 0x04000000;
113imm32 r1, 0x04010000;
114imm32 r2, 0x04020000;
115imm32 r3, 0x04030000;
116imm32 r4, 0x04040000;
117imm32 r5, 0x04050000;
118imm32 r6, 0x04060000;
119imm32 r7, 0x04070000;
120R0.L = SIGNBITS R4.H;
121R1.L = SIGNBITS R4.H;
122R2.L = SIGNBITS R4.H;
123R3.L = SIGNBITS R4.H;
124R4.L = SIGNBITS R4.H;
125R5.L = SIGNBITS R4.H;
126R6.L = SIGNBITS R4.H;
127R7.L = SIGNBITS R4.H;
128CHECKREG r0, 0x04000004;
129CHECKREG r1, 0x04010004;
130CHECKREG r2, 0x04020004;
131CHECKREG r3, 0x04030004;
132CHECKREG r4, 0x04040004;
133CHECKREG r5, 0x04050004;
134CHECKREG r6, 0x04060004;
135CHECKREG r7, 0x04070004;
136
137imm32 r0, 0xa5010000;
138imm32 r1, 0xa5010001;
139imm32 r2, 0xa5020000;
140imm32 r3, 0xa5030000;
141imm32 r4, 0xa5540000;
142imm32 r5, 0xa5550000;
143imm32 r6, 0xa5060000;
144imm32 r7, 0xa5070000;
145R0.L = SIGNBITS R5.H;
146R1.L = SIGNBITS R5.H;
147R2.L = SIGNBITS R5.H;
148R3.L = SIGNBITS R5.H;
149R4.L = SIGNBITS R5.H;
150R5.L = SIGNBITS R5.H;
151R6.L = SIGNBITS R5.H;
152R7.L = SIGNBITS R5.H;
153CHECKREG r0, 0xA5010000;
154CHECKREG r1, 0xA5010000;
155CHECKREG r2, 0xA5020000;
156CHECKREG r3, 0xA5030000;
157CHECKREG r4, 0xA5540000;
158CHECKREG r5, 0xA5550000;
159CHECKREG r6, 0xA5060000;
160CHECKREG r7, 0xA5070000;
161
162
163imm32 r0, 0xb6010000;
164imm32 r1, 0xb6010000;
165imm32 r2, 0xb602000f;
166imm32 r3, 0xb6030000;
167imm32 r4, 0xb6040000;
168imm32 r5, 0xb6050000;
169imm32 r6, 0xb6060000;
170imm32 r7, 0xb6670000;
171R0.L = SIGNBITS R6.H;
172R1.L = SIGNBITS R6.H;
173R2.L = SIGNBITS R6.H;
174R3.L = SIGNBITS R6.H;
175R4.L = SIGNBITS R6.H;
176R5.L = SIGNBITS R6.H;
177R6.L = SIGNBITS R6.H;
178R7.L = SIGNBITS R6.H;
179CHECKREG r0, 0xB6010000;
180CHECKREG r1, 0xB6010000;
181CHECKREG r2, 0xB6020000;
182CHECKREG r3, 0xB6030000;
183CHECKREG r4, 0xB6040000;
184CHECKREG r5, 0xB6050000;
185CHECKREG r6, 0xB6060000;
186CHECKREG r7, 0xB6670000;
187
188imm32 r0, 0xd7010000;
189imm32 r1, 0xd7010000;
190imm32 r2, 0xd7020000;
191imm32 r3, 0xd7030010;
192imm32 r4, 0xd7040000;
193imm32 r5, 0xd7050000;
194imm32 r6, 0xd7060000;
195imm32 r7, 0xd7070000;
196R0.L = SIGNBITS R7.H;
197R1.L = SIGNBITS R7.H;
198R2.L = SIGNBITS R7.H;
199R3.L = SIGNBITS R7.H;
200R4.L = SIGNBITS R7.H;
201R5.L = SIGNBITS R7.H;
202R6.L = SIGNBITS R7.H;
203R7.L = SIGNBITS R7.H;
204CHECKREG r0, 0xD7010001;
205CHECKREG r1, 0xD7010001;
206CHECKREG r2, 0xD7020001;
207CHECKREG r3, 0xD7030001;
208CHECKREG r4, 0xD7040001;
209CHECKREG r5, 0xD7050001;
210CHECKREG r6, 0xD7060001;
211CHECKREG r7, 0xD7070001;
212
213
214pass
215