xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/c_dsp32shift_signbits_r.s (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c) 
1//Original:/testcases/core/c_dsp32shift_signbits_r/c_dsp32shift_signbits_r.dsp
2// Spec Reference: dsp32shift signbits dregs
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9
10
11
12imm32 r0, 0x88880000;
13imm32 r1, 0x34560001;
14imm32 r2, 0x08000002;
15imm32 r3, 0x08000003;
16imm32 r4, 0x08000004;
17imm32 r5, 0x08000005;
18imm32 r6, 0x08000006;
19imm32 r7, 0x08000007;
20R7.L = SIGNBITS R0;
21R1.L = SIGNBITS R0;
22R2.L = SIGNBITS R0;
23R3.L = SIGNBITS R0;
24R4.L = SIGNBITS R0;
25R5.L = SIGNBITS R0;
26R6.L = SIGNBITS R0;
27R0.L = SIGNBITS R0;
28CHECKREG r0, 0x88880000;
29CHECKREG r1, 0x34560000;
30CHECKREG r2, 0x08000000;
31CHECKREG r3, 0x08000000;
32CHECKREG r4, 0x08000000;
33CHECKREG r5, 0x08000000;
34CHECKREG r6, 0x08000000;
35CHECKREG r7, 0x08000000;
36
37imm32 r0, 0x9999001E;
38imm32 r1, 0x0000001E;
39imm32 r2, 0x0000001E;
40imm32 r3, 0x0000001E;
41imm32 r4, 0x0000001E;
42imm32 r5, 0x0000001E;
43imm32 r6, 0x0000001E;
44imm32 r7, 0x0000001E;
45R0.L = SIGNBITS R1;
46R7.L = SIGNBITS R1;
47R2.L = SIGNBITS R1;
48R3.L = SIGNBITS R1;
49R4.L = SIGNBITS R1;
50R5.L = SIGNBITS R1;
51R6.L = SIGNBITS R1;
52R1.L = SIGNBITS R1;
53CHECKREG r0, 0x9999001A;
54CHECKREG r1, 0x0000001A;
55CHECKREG r2, 0x0000001A;
56CHECKREG r3, 0x0000001A;
57CHECKREG r4, 0x0000001A;
58CHECKREG r5, 0x0000001A;
59CHECKREG r6, 0x0000001A;
60CHECKREG r7, 0x0000001A;
61
62
63imm32 r0, 0x0aaae001;
64imm32 r1, 0x0000e001;
65imm32 r2, 0xaaaa000f;
66imm32 r3, 0x0a00e003;
67imm32 r4, 0x00a0e004;
68imm32 r5, 0x00a0e005;
69imm32 r6, 0x0a00e006;
70imm32 r7, 0x0b00e007;
71R0.L = SIGNBITS R2;
72R1.L = SIGNBITS R2;
73R7.L = SIGNBITS R2;
74R3.L = SIGNBITS R2;
75R4.L = SIGNBITS R2;
76R5.L = SIGNBITS R2;
77R6.L = SIGNBITS R2;
78R2.L = SIGNBITS R2;
79CHECKREG r0, 0x0AAA0000;
80CHECKREG r1, 0x00000000;
81CHECKREG r2, 0xAAAA0000;
82CHECKREG r3, 0x0A000000;
83CHECKREG r4, 0x00A00000;
84CHECKREG r5, 0x00A00000;
85CHECKREG r6, 0x0A000000;
86CHECKREG r7, 0x0B000000;
87
88imm32 r0, 0x0b00f001;
89imm32 r1, 0x0a00f001;
90imm32 r2, 0x0b00f002;
91imm32 r3, 0xbbbb0010;
92imm32 r4, 0x0b00f004;
93imm32 r5, 0x0b00f005;
94imm32 r6, 0x0b00f006;
95imm32 r7, 0x00b0f007;
96R0.L = SIGNBITS R3;
97R1.L = SIGNBITS R3;
98R2.L = SIGNBITS R3;
99R7.L = SIGNBITS R3;
100R4.L = SIGNBITS R3;
101R5.L = SIGNBITS R3;
102R6.L = SIGNBITS R3;
103R3.L = SIGNBITS R3;
104CHECKREG r0, 0x0B000000;
105CHECKREG r1, 0x0A000000;
106CHECKREG r2, 0x0B000000;
107CHECKREG r3, 0xBBBB0000;
108CHECKREG r4, 0x0B000000;
109CHECKREG r5, 0x0B000000;
110CHECKREG r6, 0x0B000000;
111CHECKREG r7, 0x00B00000;
112
113imm32 r0, 0x00000000;
114imm32 r1, 0x00010000;
115imm32 r2, 0x00020000;
116imm32 r3, 0x00030000;
117imm32 r4, 0xcccc0000;
118imm32 r5, 0x00050000;
119imm32 r6, 0x00060000;
120imm32 r7, 0x00070000;
121R0.L = SIGNBITS R4;
122R1.L = SIGNBITS R4;
123R2.L = SIGNBITS R4;
124R3.L = SIGNBITS R4;
125R7.L = SIGNBITS R4;
126R5.L = SIGNBITS R4;
127R6.L = SIGNBITS R4;
128R4.L = SIGNBITS R4;
129CHECKREG r0, 0x00000001;
130CHECKREG r1, 0x00010001;
131CHECKREG r2, 0x00020001;
132CHECKREG r3, 0x00030001;
133CHECKREG r4, 0xCCCC0001;
134CHECKREG r5, 0x00050001;
135CHECKREG r6, 0x00060001;
136CHECKREG r7, 0x00070001;
137
138imm32 r0, 0xa0010000;
139imm32 r1, 0x00010001;
140imm32 r2, 0xa0020000;
141imm32 r3, 0xa0030000;
142imm32 r4, 0xa0040000;
143imm32 r5, 0xdddd0000;
144imm32 r6, 0xa0060000;
145imm32 r7, 0xa0070000;
146R0.L = SIGNBITS R5;
147R1.L = SIGNBITS R5;
148R2.L = SIGNBITS R5;
149R3.L = SIGNBITS R5;
150R4.L = SIGNBITS R5;
151R7.L = SIGNBITS R5;
152R6.L = SIGNBITS R5;
153R5.L = SIGNBITS R5;
154CHECKREG r0, 0xA0010001;
155CHECKREG r1, 0x00010001;
156CHECKREG r2, 0xA0020001;
157CHECKREG r3, 0xA0030001;
158CHECKREG r4, 0xA0040001;
159CHECKREG r5, 0xDDDD0001;
160CHECKREG r6, 0xA0060001;
161CHECKREG r7, 0xA0070001;
162
163
164imm32 r0, 0xb0010000;
165imm32 r1, 0xb0010000;
166imm32 r2, 0xb002000f;
167imm32 r3, 0xb0030000;
168imm32 r4, 0xb0040000;
169imm32 r5, 0xb0050000;
170imm32 r6, 0xeeee0000;
171imm32 r7, 0xb0070000;
172R0.L = SIGNBITS R6;
173R1.L = SIGNBITS R6;
174R2.L = SIGNBITS R6;
175R3.L = SIGNBITS R6;
176R4.L = SIGNBITS R6;
177R5.L = SIGNBITS R6;
178R7.L = SIGNBITS R6;
179R6.L = SIGNBITS R6;
180CHECKREG r0, 0xB0010002;
181CHECKREG r1, 0xB0010002;
182CHECKREG r2, 0xB0020002;
183CHECKREG r3, 0xB0030002;
184CHECKREG r4, 0xB0040002;
185CHECKREG r5, 0xB0050002;
186CHECKREG r6, 0xEEEE0002;
187CHECKREG r7, 0xB0070002;
188
189imm32 r0, 0xd0010000;
190imm32 r1, 0xd0010000;
191imm32 r2, 0xd0020000;
192imm32 r3, 0xd0030010;
193imm32 r4, 0xd0040000;
194imm32 r5, 0xd0050000;
195imm32 r6, 0xd0060000;
196imm32 r7, 0xffff0000;
197R0.L = SIGNBITS R7;
198R1.L = SIGNBITS R7;
199R2.L = SIGNBITS R7;
200R3.L = SIGNBITS R7;
201R4.L = SIGNBITS R7;
202R5.L = SIGNBITS R7;
203R6.L = SIGNBITS R7;
204R7.L = SIGNBITS R7;
205
206CHECKREG r0, 0xD001000F;
207CHECKREG r1, 0xD001000F;
208CHECKREG r2, 0xD002000F;
209CHECKREG r3, 0xD003000F;
210CHECKREG r4, 0xD004000F;
211CHECKREG r5, 0xD005000F;
212CHECKREG r6, 0xD006000F;
213CHECKREG r7, 0xFFFF000F;
214pass
215