xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/c_dsp32shift_expexp_r.s (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c) 
1//Original:/testcases/core/c_dsp32shift_expexp_r/c_dsp32shift_expexp_r.dsp
2// Spec Reference: dsp32shift expadj / expadj r
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9
10
11imm32 r0, 0x0800d001;
12imm32 r1, 0x08000001;
13imm32 r2, 0x0800d002;
14imm32 r3, 0x0800d003;
15imm32 r4, 0x0800d004;
16imm32 r5, 0x0800d005;
17imm32 r6, 0x0800d006;
18imm32 r7, 0x0800d007;
19R1.L = EXPADJ( R1 , R0.L ) (V);
20R2.L = EXPADJ( R2 , R0.L ) (V);
21R3.L = EXPADJ( R3 , R0.L ) (V);
22R4.L = EXPADJ( R4 , R0.L ) (V);
23R5.L = EXPADJ( R5 , R0.L ) (V);
24R6.L = EXPADJ( R6 , R0.L ) (V);
25R7.L = EXPADJ( R7 , R0.L ) (V);
26R0.L = EXPADJ( R0 , R0.L ) (V);
27CHECKREG r0, 0x0800D001;
28CHECKREG r1, 0x0800D001;
29CHECKREG r2, 0x0800D001;
30CHECKREG r3, 0x0800D001;
31CHECKREG r4, 0x0800D001;
32CHECKREG r5, 0x0800D001;
33CHECKREG r6, 0x0800D001;
34CHECKREG r7, 0x0800D001;
35
36imm32 r0, 0x0900d001;
37imm32 r1, 0x09000001;
38imm32 r2, 0x0900d002;
39imm32 r3, 0x0900d003;
40imm32 r4, 0x0900d004;
41imm32 r5, 0x0900d005;
42imm32 r6, 0x0900d006;
43imm32 r7, 0x0900d007;
44R0.L = EXPADJ( R0 , R1.L ) (V);
45R1.L = EXPADJ( R1 , R1.L ) (V);
46R2.L = EXPADJ( R2 , R1.L ) (V);
47R3.L = EXPADJ( R3 , R1.L ) (V);
48R4.L = EXPADJ( R4 , R1.L ) (V);
49R5.L = EXPADJ( R5 , R1.L ) (V);
50R6.L = EXPADJ( R6 , R1.L ) (V);
51R7.L = EXPADJ( R7 , R1.L ) (V);
52CHECKREG r0, 0x09000001;
53CHECKREG r1, 0x09000001;
54CHECKREG r2, 0x09000001;
55CHECKREG r3, 0x09000001;
56CHECKREG r4, 0x09000001;
57CHECKREG r5, 0x09000001;
58CHECKREG r6, 0x09000001;
59CHECKREG r7, 0x09000001;
60
61
62imm32 r0, 0x0a00e001;
63imm32 r1, 0x0a00e001;
64imm32 r2, 0x0a00000f;
65imm32 r3, 0x0a00e003;
66imm32 r4, 0x0a00e004;
67imm32 r5, 0x0a00e005;
68imm32 r6, 0x0a00e006;
69imm32 r7, 0x0a00e007;
70R0.L = EXPADJ( R0 , R2.L ) (V);
71R1.L = EXPADJ( R1 , R2.L ) (V);
72R3.L = EXPADJ( R3 , R2.L ) (V);
73R4.L = EXPADJ( R4 , R2.L ) (V);
74R5.L = EXPADJ( R5 , R2.L ) (V);
75R6.L = EXPADJ( R6 , R2.L ) (V);
76R7.L = EXPADJ( R7 , R2.L ) (V);
77R2.L = EXPADJ( R2 , R2.L ) (V);
78CHECKREG r0, 0x0A000002;
79CHECKREG r1, 0x0A000002;
80CHECKREG r2, 0x0A000003;
81CHECKREG r3, 0x0A000002;
82CHECKREG r4, 0x0A000002;
83CHECKREG r5, 0x0A000002;
84CHECKREG r6, 0x0A000002;
85CHECKREG r7, 0x0A000002;
86
87imm32 r0, 0x0b00f001;
88imm32 r1, 0x0b00f001;
89imm32 r2, 0x0b00f002;
90imm32 r3, 0x0b000010;
91imm32 r4, 0x0b00f004;
92imm32 r5, 0x0b00f005;
93imm32 r6, 0x0b00f006;
94imm32 r7, 0x0b00f007;
95R0.L = EXPADJ( R0 , R3.L ) (V);
96R1.L = EXPADJ( R1 , R3.L ) (V);
97R2.L = EXPADJ( R2 , R3.L ) (V);
98R3.L = EXPADJ( R3 , R3.L ) (V);
99R4.L = EXPADJ( R4 , R3.L ) (V);
100R5.L = EXPADJ( R5 , R3.L ) (V);
101R6.L = EXPADJ( R6 , R3.L ) (V);
102R7.L = EXPADJ( R7 , R3.L ) (V);
103CHECKREG r0, 0x0B000010;
104CHECKREG r1, 0x0B000010;
105CHECKREG r2, 0x0B000010;
106CHECKREG r3, 0x0B000010;
107CHECKREG r4, 0x0B000010;
108CHECKREG r5, 0x0B000010;
109CHECKREG r6, 0x0B000010;
110CHECKREG r7, 0x0B000010;
111
112imm32 r0, 0x0c0000c0;
113imm32 r1, 0x0c0100c0;
114imm32 r2, 0x0c0200c0;
115imm32 r3, 0x0c0300c0;
116imm32 r4, 0x0c0400c0;
117imm32 r5, 0x0c0500c0;
118imm32 r6, 0x0c0600c0;
119imm32 r7, 0x0c0700c0;
120R0.L = EXPADJ( R0 , R4.L ) (V);
121R1.L = EXPADJ( R1 , R4.L ) (V);
122R2.L = EXPADJ( R2 , R4.L ) (V);
123R3.L = EXPADJ( R3 , R4.L ) (V);
124R4.L = EXPADJ( R4 , R4.L ) (V);
125R5.L = EXPADJ( R5 , R4.L ) (V);
126R6.L = EXPADJ( R6 , R4.L ) (V);
127R7.L = EXPADJ( R7 , R4.L ) (V);
128CHECKREG r0, 0x0C0000C0;
129CHECKREG r1, 0x0C0100C0;
130CHECKREG r2, 0x0C0200C0;
131CHECKREG r3, 0x0C0300C0;
132CHECKREG r4, 0x0C0400C0;
133CHECKREG r5, 0x0C0500C0;
134CHECKREG r6, 0x0C0600C0;
135CHECKREG r7, 0x0C0700C0;
136
137imm32 r0, 0xa00100d0;
138imm32 r1, 0x000100d1;
139imm32 r2, 0xa00200d0;
140imm32 r3, 0xa00300d0;
141imm32 r4, 0xa00400d0;
142imm32 r5, 0xa00500d0;
143imm32 r6, 0xa00600d0;
144imm32 r7, 0xa00700d0;
145R0.L = EXPADJ( R0 , R5.L ) (V);
146R1.L = EXPADJ( R1 , R5.L ) (V);
147R2.L = EXPADJ( R2 , R5.L ) (V);
148R3.L = EXPADJ( R3 , R5.L ) (V);
149R4.L = EXPADJ( R4 , R5.L ) (V);
150R5.L = EXPADJ( R5 , R5.L ) (V);
151R6.L = EXPADJ( R6 , R5.L ) (V);
152R7.L = EXPADJ( R7 , R5.L ) (V);
153CHECKREG r0, 0xA00100D0;
154CHECKREG r1, 0x000100D0;
155CHECKREG r2, 0xA00200D0;
156CHECKREG r3, 0xA00300D0;
157CHECKREG r4, 0xA00400D0;
158CHECKREG r5, 0xA00500D0;
159CHECKREG r6, 0xA00600D0;
160CHECKREG r7, 0xA00700D0;
161
162imm32 r0, 0xb0010000;
163imm32 r1, 0xb0010000;
164imm32 r2, 0xb002000f;
165imm32 r3, 0xb0030000;
166imm32 r4, 0xb0040000;
167imm32 r5, 0xb0050000;
168imm32 r6, 0xb0060000;
169imm32 r7, 0xb0070000;
170R0.L = EXPADJ( R0 , R6.L ) (V);
171R1.L = EXPADJ( R1 , R6.L ) (V);
172R2.L = EXPADJ( R2 , R6.L ) (V);
173R3.L = EXPADJ( R3 , R6.L ) (V);
174R4.L = EXPADJ( R4 , R6.L ) (V);
175R5.L = EXPADJ( R5 , R6.L ) (V);
176R6.L = EXPADJ( R6 , R6.L ) (V);
177R7.L = EXPADJ( R7 , R6.L ) (V);
178CHECKREG r0, 0xB0010000;
179CHECKREG r1, 0xB0010000;
180CHECKREG r2, 0xB0020000;
181CHECKREG r3, 0xB0030000;
182CHECKREG r4, 0xB0040000;
183CHECKREG r5, 0xB0050000;
184CHECKREG r6, 0xB0060000;
185CHECKREG r7, 0xB0070000;
186
187imm32 r0, 0xd00102e7;
188imm32 r1, 0xd00104e7;
189imm32 r2, 0xd00206e7;
190imm32 r3, 0xd00308e7;
191imm32 r4, 0xd0040ae7;
192imm32 r5, 0xd0050ce7;
193imm32 r6, 0xd0060ee7;
194imm32 r7, 0xd00707e7;
195R0.L = EXPADJ( R0 , R7.L ) (V);
196R1.L = EXPADJ( R1 , R7.L ) (V);
197R2.L = EXPADJ( R2 , R7.L ) (V);
198R3.L = EXPADJ( R3 , R7.L ) (V);
199R4.L = EXPADJ( R4 , R7.L ) (V);
200R5.L = EXPADJ( R5 , R7.L ) (V);
201R6.L = EXPADJ( R6 , R7.L ) (V);
202R7.L = EXPADJ( R7 , R7.L ) (V);
203CHECKREG r0, 0xD0010001;
204CHECKREG r1, 0xD0010001;
205CHECKREG r2, 0xD0020001;
206CHECKREG r3, 0xD0030001;
207CHECKREG r4, 0xD0040001;
208CHECKREG r5, 0xD0050001;
209CHECKREG r6, 0xD0060001;
210CHECKREG r7, 0xD0070001;
211
212pass
213