xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/c_dsp32shift_ahalf_rn_s.s (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c)
1//Original:/testcases/core/c_dsp32shift_ahalf_rn_s/c_dsp32shift_ahalf_rn_s.dsp
2// Spec Reference: dsp32shift ashift s
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9
10// Ashift : positive data, count (+)=left (half reg)
11// d_lo = ashft (d_lo BY d_lo)
12// RLx by RLx
13imm32 r0, 0x00000000;
14R0.L = -1;
15imm32 r1, 0x00008001;
16imm32 r2, 0x00008002;
17imm32 r3, 0x00008003;
18imm32 r4, 0x00008004;
19imm32 r5, 0x00008005;
20imm32 r6, 0x00008006;
21imm32 r7, 0x00008007;
22//rl0 = ashift (rl0 by rl0);
23R1.L = ASHIFT R1.L BY R0.L (S);
24R2.L = ASHIFT R2.L BY R0.L (S);
25R3.L = ASHIFT R3.L BY R0.L (S);
26R4.L = ASHIFT R4.L BY R0.L (S);
27R5.L = ASHIFT R5.L BY R0.L (S);
28R6.L = ASHIFT R6.L BY R0.L (S);
29R7.L = ASHIFT R7.L BY R0.L (S);
30//CHECKREG r0, 0x00000000;
31CHECKREG r1, 0x0000c000;
32CHECKREG r2, 0x0000c001;
33CHECKREG r3, 0x0000c001;
34CHECKREG r4, 0x0000c002;
35CHECKREG r5, 0x0000c002;
36CHECKREG r6, 0x0000c003;
37CHECKREG r7, 0x0000c003;
38
39imm32 r0, 0x00008001;
40R1.L = -1;
41imm32 r2, 0x00008002;
42imm32 r3, 0x00008003;
43imm32 r4, 0x00008004;
44imm32 r5, 0x00008005;
45imm32 r6, 0x00008006;
46imm32 r7, 0x00008007;
47R0.L = ASHIFT R0.L BY R1.L (S);
48//rl1 = ashift (rl1 by rl1);
49R2.L = ASHIFT R2.L BY R1.L (S);
50R3.L = ASHIFT R3.L BY R1.L (S);
51R4.L = ASHIFT R4.L BY R1.L (S);
52R5.L = ASHIFT R5.L BY R1.L (S);
53R6.L = ASHIFT R6.L BY R1.L (S);
54R7.L = ASHIFT R7.L BY R1.L (S);
55CHECKREG r0, 0x0000c000;
56//CHECKREG r1, 0x00000001;
57CHECKREG r2, 0x0000c001;
58CHECKREG r3, 0x0000c001;
59CHECKREG r4, 0x0000c002;
60CHECKREG r5, 0x0000c002;
61CHECKREG r6, 0x0000c003;
62CHECKREG r7, 0x0000c003;
63
64
65imm32 r0, 0x00008001;
66imm32 r1, 0x00008001;
67R2.L = -15;
68imm32 r3, 0x00008003;
69imm32 r4, 0x00008004;
70imm32 r5, 0x00008005;
71imm32 r6, 0x00008006;
72imm32 r7, 0x00008007;
73R0.L = ASHIFT R0.L BY R2.L (S);
74R1.L = ASHIFT R1.L BY R2.L (S);
75//rl2 = ashift (rl2 by rl2);
76R3.L = ASHIFT R3.L BY R2.L (S);
77R4.L = ASHIFT R4.L BY R2.L (S);
78R5.L = ASHIFT R5.L BY R2.L (S);
79R6.L = ASHIFT R6.L BY R2.L (S);
80R7.L = ASHIFT R7.L BY R2.L (S);
81CHECKREG r0, 0x0000ffff;
82CHECKREG r1, 0x0000ffff;
83//CHECKREG r2, 0x0000000f;
84CHECKREG r3, 0x0000ffff;
85CHECKREG r4, 0x0000ffff;
86CHECKREG r5, 0x0000ffff;
87CHECKREG r6, 0x0000ffff;
88CHECKREG r7, 0x0000ffff;
89
90imm32 r0, 0x00008001;
91imm32 r1, 0x00008001;
92imm32 r2, 0x00008002;
93R3.L = -16;
94imm32 r4, 0x00008004;
95imm32 r5, 0x00008005;
96imm32 r6, 0x00008006;
97imm32 r7, 0x00008007;
98R0.L = ASHIFT R0.L BY R3.L (S);
99R1.L = ASHIFT R1.L BY R3.L (S);
100R2.L = ASHIFT R2.L BY R3.L (S);
101//rl3 = ashift (rl3 by rl3);
102R4.L = ASHIFT R4.L BY R3.L (S);
103R5.L = ASHIFT R5.L BY R3.L (S);
104R6.L = ASHIFT R6.L BY R3.L (S);
105R7.L = ASHIFT R7.L BY R3.L (S);
106CHECKREG r0, 0x0000ffff;
107CHECKREG r1, 0x0000ffff;
108CHECKREG r2, 0x0000ffff;
109//CHECKREG r3, 0x00000010;
110CHECKREG r4, 0x0000ffff;
111CHECKREG r5, 0x0000ffff;
112CHECKREG r6, 0x0000ffff;
113CHECKREG r7, 0x0000ffff;
114
115// d_lo = ashft (d_hi BY d_lo)
116// RHx by RLx
117imm32 r0, 0x00000000;
118imm32 r1, 0x80010000;
119imm32 r2, 0x80020000;
120imm32 r3, 0x80030000;
121imm32 r4, 0x80040000;
122imm32 r5, 0x80050000;
123imm32 r6, 0x80060000;
124imm32 r7, 0x80070000;
125R0.L = ASHIFT R0.H BY R0.L (S);
126R1.L = ASHIFT R1.H BY R0.L (S);
127R2.L = ASHIFT R2.H BY R0.L (S);
128R3.L = ASHIFT R3.H BY R0.L (S);
129R4.L = ASHIFT R4.H BY R0.L (S);
130R5.L = ASHIFT R5.H BY R0.L (S);
131R6.L = ASHIFT R6.H BY R0.L (S);
132R7.L = ASHIFT R7.H BY R0.L (S);
133CHECKREG r0, 0x00000000;
134CHECKREG r1, 0x80018001;
135CHECKREG r2, 0x80028002;
136CHECKREG r3, 0x80038003;
137CHECKREG r4, 0x80048004;
138CHECKREG r5, 0x80058005;
139CHECKREG r6, 0x80068006;
140CHECKREG r7, 0x80078007;
141
142imm32 r0, 0x80010000;
143R1.L = -1;
144imm32 r2, 0x80020000;
145imm32 r3, 0x80030000;
146imm32 r4, 0x80040000;
147imm32 r5, 0x80050000;
148imm32 r6, 0x80060000;
149imm32 r7, 0x80070000;
150R0.L = ASHIFT R0.H BY R1.L (S);
151//rl1 = ashift (rh1 by rl1);
152R2.L = ASHIFT R2.H BY R1.L (S);
153R3.L = ASHIFT R3.H BY R1.L (S);
154R4.L = ASHIFT R4.H BY R1.L (S);
155R5.L = ASHIFT R5.H BY R1.L (S);
156R6.L = ASHIFT R6.H BY R1.L (S);
157R7.L = ASHIFT R7.H BY R1.L (S);
158CHECKREG r0, 0x8001c000;
159//CHECKREG r1, 0x00010001;
160CHECKREG r2, 0x8002c001;
161CHECKREG r3, 0x8003c001;
162CHECKREG r4, 0x8004c002;
163CHECKREG r5, 0x8005c002;
164CHECKREG r6, 0x8006c003;
165CHECKREG r7, 0x8007c003;
166
167
168imm32 r0, 0xa0010000;
169imm32 r1, 0xa0010000;
170R2.L = -15;
171imm32 r3, 0xa0030000;
172imm32 r4, 0xa0040000;
173imm32 r5, 0xa0050000;
174imm32 r6, 0xa0060000;
175imm32 r7, 0xa0070000;
176R0.L = ASHIFT R0.H BY R2.L (S);
177R1.L = ASHIFT R1.H BY R2.L (S);
178//rl2 = ashift (rh2 by rl2);
179R3.L = ASHIFT R3.H BY R2.L (S);
180R4.L = ASHIFT R4.H BY R2.L (S);
181R5.L = ASHIFT R5.H BY R2.L (S);
182R6.L = ASHIFT R6.H BY R2.L (S);
183R7.L = ASHIFT R7.H BY R2.L (S);
184CHECKREG r0, 0xa001ffff;
185CHECKREG r1, 0xa001ffff;
186//CHECKREG r2, 0x2002000f;
187CHECKREG r3, 0xa003ffff;
188CHECKREG r4, 0xa004ffff;
189CHECKREG r5, 0xa005ffff;
190CHECKREG r6, 0xa006ffff;
191CHECKREG r7, 0xa007ffff;
192
193imm32 r0, 0xb0010001;
194imm32 r1, 0xb0010001;
195imm32 r2, 0xb0020002;
196R3.L = -16;
197imm32 r4, 0xb0040004;
198imm32 r5, 0xb0050005;
199imm32 r6, 0xb0060006;
200imm32 r7, 0xb0070007;
201R0.L = ASHIFT R0.H BY R3.L (S);
202R1.L = ASHIFT R1.H BY R3.L (S);
203R2.L = ASHIFT R2.H BY R3.L (S);
204//rl3 = ashift (rh3 by rl3);
205R4.L = ASHIFT R4.H BY R3.L (S);
206R5.L = ASHIFT R5.H BY R3.L (S);
207R6.L = ASHIFT R6.H BY R3.L (S);
208R7.L = ASHIFT R7.H BY R3.L (S);
209CHECKREG r0, 0xb001ffff;
210CHECKREG r1, 0xb001ffff;
211CHECKREG r2, 0xb002ffff;
212//CHECKREG r3, 0x30030010;
213CHECKREG r4, 0xb004ffff;
214CHECKREG r5, 0xb005ffff;
215CHECKREG r6, 0xb006ffff;
216CHECKREG r7, 0xb007ffff;
217
218// d_hi = ashft (d_lo BY d_lo)
219// RLx by RLx
220imm32 r0, 0x00000001;
221imm32 r1, 0x00000001;
222imm32 r2, 0x00000002;
223imm32 r3, 0x00000003;
224imm32 r4, 0x00000000;
225imm32 r5, 0x00000005;
226imm32 r6, 0x00000006;
227imm32 r7, 0x00000007;
228R0.H = ASHIFT R0.L BY R4.L (S);
229R1.H = ASHIFT R1.L BY R4.L (S);
230R2.H = ASHIFT R2.L BY R4.L (S);
231R3.H = ASHIFT R3.L BY R4.L (S);
232//rh4 = ashift (rl4 by rl4);
233R5.H = ASHIFT R5.L BY R4.L (S);
234R6.H = ASHIFT R6.L BY R4.L (S);
235R7.H = ASHIFT R7.L BY R4.L (S);
236CHECKREG r0, 0x00010001;
237CHECKREG r1, 0x00010001;
238CHECKREG r2, 0x00020002;
239CHECKREG r3, 0x00030003;
240//CHECKREG r4, 0x00040004;
241CHECKREG r5, 0x00050005;
242CHECKREG r6, 0x00060006;
243CHECKREG r7, 0x00070007;
244
245imm32 r0, 0x00008001;
246imm32 r1, 0x00008001;
247imm32 r2, 0x00008002;
248imm32 r3, 0x00008003;
249imm32 r4, 0x00008004;
250R5.L = -1;
251imm32 r6, 0x00008006;
252imm32 r7, 0x00008007;
253R0.H = ASHIFT R0.L BY R5.L (S);
254R1.H = ASHIFT R1.L BY R5.L (S);
255R2.H = ASHIFT R2.L BY R5.L (S);
256R3.H = ASHIFT R3.L BY R5.L (S);
257R4.H = ASHIFT R4.L BY R5.L (S);
258//rh5 = ashift (rl5 by rl5);
259R6.H = ASHIFT R6.L BY R5.L (S);
260R7.H = ASHIFT R7.L BY R5.L (S);
261CHECKREG r0, 0xc0008001;
262CHECKREG r1, 0xc0008001;
263CHECKREG r2, 0xc0018002;
264CHECKREG r3, 0xc0018003;
265CHECKREG r4, 0xc0028004;
266//CHECKREG r5, 0x00020005;
267CHECKREG r6, 0xc0038006;
268CHECKREG r7, 0xc0038007;
269
270
271imm32 r0, 0x00009001;
272imm32 r1, 0x00009001;
273imm32 r2, 0x00009002;
274imm32 r3, 0x00009003;
275imm32 r4, 0x00009004;
276imm32 r5, 0x00009005;
277R6.L = -15;
278imm32 r7, 0x00009007;
279R0.H = ASHIFT R0.L BY R6.L (S);
280R1.H = ASHIFT R1.L BY R6.L (S);
281R2.H = ASHIFT R2.L BY R6.L (S);
282R3.H = ASHIFT R3.L BY R6.L (S);
283R4.H = ASHIFT R4.L BY R6.L (S);
284R5.H = ASHIFT R5.L BY R6.L (S);
285//rh6 = ashift (rl6 by rl6);
286R7.H = ASHIFT R7.L BY R6.L;
287CHECKREG r0, 0xffff9001;
288CHECKREG r1, 0xffff9001;
289CHECKREG r2, 0xffff9002;
290CHECKREG r3, 0xffff9003;
291CHECKREG r4, 0xffff9004;
292CHECKREG r5, 0xffff9005;
293//CHECKREG r6, 0x00006006;
294CHECKREG r7, 0xffff9007;
295
296imm32 r0, 0x0000a001;
297imm32 r1, 0x0000a001;
298imm32 r2, 0x0000a002;
299imm32 r3, 0x0000a003;
300imm32 r4, 0x0000a004;
301imm32 r5, 0x0000a005;
302imm32 r6, 0x0000a006;
303R7.L = -16;
304R0.H = ASHIFT R0.L BY R7.L (S);
305R1.H = ASHIFT R1.L BY R7.L (S);
306R2.H = ASHIFT R2.L BY R7.L (S);
307R3.H = ASHIFT R3.L BY R7.L (S);
308R4.H = ASHIFT R4.L BY R7.L (S);
309R5.H = ASHIFT R5.L BY R7.L (S);
310R6.H = ASHIFT R6.L BY R7.L (S);
311R7.H = ASHIFT R7.L BY R7.L (S);
312CHECKREG r0, 0xffffa001;
313CHECKREG r1, 0xffffa001;
314CHECKREG r2, 0xffffa002;
315CHECKREG r3, 0xffffa003;
316CHECKREG r4, 0xffffa004;
317CHECKREG r5, 0xffffa005;
318CHECKREG r6, 0xffffa006;
319//CHECKREG r7, 0x00007007;
320
321// d_lo = ashft (d_hi BY d_lo)
322// RHx by RLx
323imm32 r0, 0x80010000;
324imm32 r1, 0x80010000;
325imm32 r2, 0x80020000;
326imm32 r3, 0x80030000;
327R4.L = -1;
328imm32 r5, 0x80050000;
329imm32 r6, 0x80060000;
330imm32 r7, 0x80070000;
331R0.H = ASHIFT R0.H BY R4.L (S);
332R1.H = ASHIFT R1.H BY R4.L (S);
333R2.H = ASHIFT R2.H BY R4.L (S);
334R3.H = ASHIFT R3.H BY R4.L (S);
335//rh4 = ashift (rh4 by rl4);
336R5.H = ASHIFT R5.H BY R4.L (S);
337R6.H = ASHIFT R6.H BY R4.L (S);
338R7.H = ASHIFT R7.H BY R4.L (S);
339CHECKREG r0, 0xc0000000;
340CHECKREG r1, 0xc0000000;
341CHECKREG r2, 0xc0010000;
342CHECKREG r3, 0xc0010000;
343//CHECKREG r4, 0x00020000;
344CHECKREG r5, 0xc0020000;
345CHECKREG r6, 0xc0030000;
346CHECKREG r7, 0xc0030000;
347
348imm32 r0, 0x80010000;
349imm32 r1, 0x80010000;
350imm32 r2, 0x80020000;
351imm32 r3, 0x80030000;
352imm32 r4, 0x80040000;
353R5.L = -1;
354imm32 r6, 0x80060000;
355imm32 r7, 0x80070000;
356R0.H = ASHIFT R0.H BY R5.L (S);
357R1.H = ASHIFT R1.H BY R5.L (S);
358R2.H = ASHIFT R2.H BY R5.L (S);
359R3.H = ASHIFT R3.H BY R5.L (S);
360R4.H = ASHIFT R4.H BY R5.L (S);
361//rh5 = ashift (rh5 by rl5);
362R6.H = ASHIFT R6.H BY R5.L (S);
363R7.H = ASHIFT R7.H BY R5.L (S);
364CHECKREG r0, 0xc0000000;
365CHECKREG r1, 0xc0000000;
366CHECKREG r2, 0xc0010000;
367CHECKREG r3, 0xc0010000;
368CHECKREG r4, 0xc0020000;
369//CHECKREG r5, 0x28020000;
370CHECKREG r6, 0xc0030000;
371CHECKREG r7, 0xc0030000;
372
373
374imm32 r0, 0xd0010000;
375imm32 r1, 0xd0010000;
376imm32 r2, 0xd0020000;
377imm32 r3, 0xd0030000;
378imm32 r4, 0xd0040000;
379imm32 r5, 0xd0050000;
380R6.L = -15;
381imm32 r7, 0xd0070000;
382R0.L = ASHIFT R0.H BY R6.L (S);
383R1.L = ASHIFT R1.H BY R6.L (S);
384R2.L = ASHIFT R2.H BY R6.L (S);
385R3.L = ASHIFT R3.H BY R6.L (S);
386R4.L = ASHIFT R4.H BY R6.L (S);
387R5.L = ASHIFT R5.H BY R6.L (S);
388//rl6 = ashift (rh6 by rl6);
389R7.L = ASHIFT R7.H BY R6.L;
390CHECKREG r0, 0xd001ffff;
391CHECKREG r1, 0xd001ffff;
392CHECKREG r2, 0xd002ffff;
393CHECKREG r3, 0xd003ffff;
394CHECKREG r4, 0xd004ffff;
395CHECKREG r5, 0xd005ffff;
396//CHECKREG r6, 0x60060000;
397CHECKREG r7, 0xd007ffff;
398
399imm32 r0, 0xe0010000;
400imm32 r1, 0xe0010000;
401imm32 r2, 0xe0020000;
402imm32 r3, 0xe0030000;
403imm32 r4, 0xe0040000;
404imm32 r5, 0xe0050000;
405imm32 r6, 0xe0060000;
406R7.L = -16;
407R0.H = ASHIFT R0.H BY R7.L (S);
408R1.H = ASHIFT R1.H BY R7.L (S);
409R2.H = ASHIFT R2.H BY R7.L (S);
410R3.H = ASHIFT R3.H BY R7.L (S);
411R4.H = ASHIFT R4.H BY R7.L (S);
412R5.H = ASHIFT R5.H BY R7.L (S);
413R6.H = ASHIFT R6.H BY R7.L (S);
414//rh7 = ashift (rh7 by rl7);
415CHECKREG r0, 0xffff0000;
416CHECKREG r1, 0xffff0000;
417CHECKREG r2, 0xffff0000;
418CHECKREG r3, 0xffff0000;
419CHECKREG r4, 0xffff0000;
420CHECKREG r5, 0xffff0000;
421CHECKREG r6, 0xffff0000;
422//CHECKREG r7, -16;
423
424pass
425