1//Original:/testcases/core/c_dsp32mult_dr_tu/c_dsp32mult_dr_tu.dsp 2// Spec Reference: dsp32mult single dr tu 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8imm32 r0, 0x8b235625; 9imm32 r1, 0x98ba5127; 10imm32 r2, 0xa3846725; 11imm32 r3, 0x00080027; 12imm32 r4, 0xb0ab8d29; 13imm32 r5, 0x10ace82b; 14imm32 r6, 0xc00c008d; 15imm32 r7, 0xd2467028; 16R4.H = R0.L * R0.L, R4.L = R0.L * R0.L (TFU); 17R5.H = R0.L * R1.L, R5.L = R0.L * R1.H (TFU); 18R6.H = R1.L * R0.L, R6.L = R1.H * R0.L (TFU); 19R7.H = R1.L * R1.L, R7.L = R1.H * R1.H (TFU); 20R0.H = R0.L * R0.L, R0.L = R0.L * R0.L (TFU); 21R1.H = R0.L * R1.L, R1.L = R0.L * R1.H (TFU); 22R2.H = R1.L * R0.L, R2.L = R1.H * R0.L (TFU); 23R3.H = R1.L * R1.L, R3.L = R1.H * R1.H (TFU); 24CHECKREG r0, 0x1CFC1CFC; 25CHECKREG r1, 0x0930114A; 26CHECKREG r2, 0x01F5010A; 27CHECKREG r3, 0x012A0054; 28CHECKREG r4, 0x1CFC1CFC; 29CHECKREG r5, 0x1B4E3364; 30CHECKREG r6, 0x1B4E3364; 31CHECKREG r7, 0x19B95B1D; 32 33imm32 r0, 0x9923a635; 34imm32 r1, 0x6f995137; 35imm32 r2, 0x1324b735; 36imm32 r3, 0x99060037; 37imm32 r4, 0x809bcd39; 38imm32 r5, 0xb0a99f3b; 39imm32 r6, 0xa00c093d; 40imm32 r7, 0x12467093; 41R4.H = R2.L * R2.H, R4.L = R2.H * R2.L (TFU); 42R5.H = R2.L * R3.H, R5.L = R2.H * R3.H (TFU); 43R6.H = R3.L * R2.L, R6.L = R3.L * R2.H (TFU); 44R7.H = R3.L * R3.H, R7.L = R3.L * R3.H (TFU); 45R2.H = R2.L * R2.H, R2.L = R2.H * R2.L (TFU); 46R3.H = R2.L * R3.H, R3.L = R2.H * R3.H (TFU); 47R0.H = R3.L * R2.H, R0.L = R3.L * R2.L (TFU); 48R1.H = R3.L * R3.H, R1.L = R3.L * R3.H (TFU); 49CHECKREG r0, 0x00700070; 50CHECKREG r1, 0x00420042; 51CHECKREG r2, 0x0DB20DB2; 52CHECKREG r3, 0x082F082F; 53CHECKREG r4, 0x0DB20DB2; 54CHECKREG r5, 0x6D820B70; 55CHECKREG r6, 0x00270004; 56CHECKREG r7, 0x00200020; 57 58imm32 r0, 0x19235655; 59imm32 r1, 0xc9ba5157; 60imm32 r2, 0x63246755; 61imm32 r3, 0x0a060055; 62imm32 r4, 0x90abc509; 63imm32 r5, 0x10acef5b; 64imm32 r6, 0xb00a005d; 65imm32 r7, 0x1246a05f; 66R0.H = R4.H * R4.L, R0.L = R4.L * R4.L (TFU); 67R1.H = R4.H * R5.L, R1.L = R4.L * R5.H (TFU); 68R2.H = R5.H * R4.L, R2.L = R5.H * R4.L (TFU); 69R3.H = R5.L * R5.L, R3.L = R5.H * R5.H (TFU); 70R4.H = R4.H * R4.L, R4.L = R4.L * R4.L (TFU); 71R5.H = R4.H * R5.L, R5.L = R4.L * R5.L (TFU); 72R6.H = R5.L * R4.L, R6.L = R5.H * R4.L (TFU); 73R7.H = R5.H * R5.L, R7.L = R5.H * R5.H (TFU); 74CHECKREG r0, 0x6F5897A6; 75CHECKREG r1, 0x87430CD4; 76CHECKREG r2, 0x0CD40CD4; 77CHECKREG r3, 0xDFCB0115; 78CHECKREG r4, 0x6F5897A6; 79CHECKREG r5, 0x681A8DC9; 80CHECKREG r6, 0x53FD3DAA; 81CHECKREG r7, 0x39A82A55; 82 83imm32 r0, 0xbb235666; 84imm32 r1, 0xefba5166; 85imm32 r2, 0x13248766; 86imm32 r3, 0xe0060066; 87imm32 r4, 0x9eab9d69; 88imm32 r5, 0x10ecef6b; 89imm32 r6, 0x800ee06d; 90imm32 r7, 0x12467e6f; 91// test the unsigned U=1 92R0.H = R6.H * R6.H, R0.L = R6.L * R6.L (TFU); 93R1.H = R6.H * R7.H, R1.L = R6.L * R7.H (TFU); 94R2.H = R7.H * R6.H, R2.L = R7.H * R6.L (TFU); 95R3.H = R7.H * R7.H, R3.L = R7.H * R7.H (TFU); 96R6.H = R6.H * R6.H, R6.L = R6.L * R6.L (TFU); 97R7.H = R6.H * R7.H, R7.L = R6.L * R7.H (TFU); 98R4.H = R7.H * R6.H, R4.L = R7.H * R6.L (TFU); 99R5.H = R7.H * R7.H, R5.L = R7.H * R7.H (TFU); 100CHECKREG r0, 0x400EC4BE; 101CHECKREG r1, 0x09231005; 102CHECKREG r2, 0x09231005; 103CHECKREG r3, 0x014D014D; 104CHECKREG r4, 0x01240383; 105CHECKREG r5, 0x00140014; 106CHECKREG r6, 0x400EC4BE; 107CHECKREG r7, 0x04920E0B; 108 109// mix order 110imm32 r0, 0xac23a675; 111imm32 r1, 0xcfba5127; 112imm32 r2, 0x13c46705; 113imm32 r3, 0x00060007; 114imm32 r4, 0x90accd09; 115imm32 r5, 0x10acdfdb; 116imm32 r6, 0x000cc00d; 117imm32 r7, 0x1246fc0f; 118R2.H = R0.L * R7.L, R2.L = R0.H * R7.H (TFU); 119R5.H = R1.L * R6.L, R5.L = R1.L * R6.H (TFU); 120R6.H = R2.H * R5.L, R6.L = R2.H * R5.L (TFU); 121R7.H = R3.L * R4.L, R7.L = R3.L * R4.L (TFU); 122R0.H = R4.L * R3.L, R0.L = R4.L * R3.L (TFU); 123R1.H = R5.H * R2.L, R1.L = R5.H * R2.L (TFU); 124R3.H = R6.L * R1.L, R3.L = R6.L * R1.L (TFU); 125R4.H = R7.H * R0.L, R4.L = R7.H * R0.H (TFU); 126CHECKREG r0, 0x00050005; 127CHECKREG r1, 0x02EB02EB; 128CHECKREG r2, 0xA3E40C49; 129CHECKREG r3, 0x00000000; 130CHECKREG r4, 0x00000000; 131CHECKREG r5, 0x3CE10003; 132CHECKREG r6, 0x00010001; 133CHECKREG r7, 0x00050005; 134 135imm32 r0, 0xab235a75; 136imm32 r1, 0xcfba5127; 137imm32 r2, 0xdd246905; 138imm32 r3, 0x00d6d007; 139imm32 r4, 0x90abcd09; 140imm32 r5, 0x10aceddb; 141imm32 r6, 0x000c0d0d; 142imm32 r7, 0x1246700f; 143R0.H = R7.H * R0.H, R0.L = R7.H * R0.L (TFU); 144R1.H = R6.H * R1.H, R1.L = R6.L * R1.L (TFU); 145R2.H = R5.H * R2.H, R2.L = R5.H * R2.L (TFU); 146R3.H = R4.H * R3.H, R3.L = R4.H * R3.L (TFU); 147R4.H = R3.H * R4.H, R4.L = R3.H * R4.L (TFU); 148R5.H = R2.H * R5.H, R5.L = R2.H * R5.L (TFU); 149R6.H = R1.H * R6.H, R6.L = R1.H * R6.L (TFU); 150R7.H = R0.L * R7.H, R7.L = R0.H * R7.H (TFU); 151CHECKREG r0, 0x0C370674; 152CHECKREG r1, 0x00090423; 153CHECKREG r2, 0x0E6606D6; 154CHECKREG r3, 0x0078758E; 155CHECKREG r4, 0x00430060; 156CHECKREG r5, 0x00F00D60; 157CHECKREG r6, 0x00000000; 158CHECKREG r7, 0x007500DF; 159 160imm32 r0, 0xfb235675; 161imm32 r1, 0xcfba5127; 162imm32 r2, 0x13f46705; 163imm32 r3, 0x000f0007; 164imm32 r4, 0x90abfd09; 165imm32 r5, 0x10acefdb; 166imm32 r6, 0x000c00fd; 167imm32 r7, 0x1246700f; 168R2.H = R0.L * R6.L, R2.L = R0.L * R6.H (TFU); 169R3.H = R2.H * R7.H, R3.L = R2.H * R7.L (TFU); 170R0.H = R1.L * R0.L, R0.L = R1.H * R0.H (TFU); 171R1.H = R3.L * R0.L, R1.L = R3.H * R0.H (TFU); 172R4.H = R4.L * R2.L, R4.L = R4.H * R2.H (TFU); 173R5.H = R5.L * R3.H, R5.L = R5.H * R3.L (TFU); 174R6.H = R6.H * R4.L, R6.L = R6.L * R4.H (TFU); 175R7.H = R7.L * R6.L, R7.L = R7.H * R6.H (TFU); 176CHECKREG r0, 0x1B68CBC7; 177CHECKREG r1, 0x001D0000; 178CHECKREG r2, 0x00550004; 179CHECKREG r3, 0x00060025; 180CHECKREG r4, 0x00030030; 181CHECKREG r5, 0x00050002; 182CHECKREG r6, 0x00000000; 183CHECKREG r7, 0x00000000; 184 185imm32 r0, 0xab2d5675; 186imm32 r1, 0xcfbad127; 187imm32 r2, 0x13246d05; 188imm32 r3, 0x000600d7; 189imm32 r4, 0x908bcd09; 190imm32 r5, 0x10a9efdb; 191imm32 r6, 0x000c500d; 192imm32 r7, 0x1246760f; 193R4.H = R5.L * R2.L, R4.L = R5.L * R2.H (TFU); 194R6.H = R6.H * R3.L, R6.L = R6.H * R3.L (TFU); 195R0.H = R7.L * R4.L, R0.L = R7.L * R4.H (TFU); 196R1.H = R0.L * R5.H, R1.L = R0.L * R5.L (TFU); 197R2.H = R1.L * R6.L, R2.L = R1.H * R6.H (TFU); 198R5.H = R2.L * R7.H, R5.L = R2.H * R7.L (TFU); 199R3.H = R3.L * R0.L, R3.L = R3.L * R0.L (TFU); 200R7.H = R4.H * R1.L, R7.L = R4.H * R1.L (TFU); 201CHECKREG r0, 0x08442F1A; 202CHECKREG r1, 0x03102C21; 203CHECKREG r2, 0x00000000; 204CHECKREG r3, 0x00270027; 205CHECKREG r4, 0x662411EE; 206CHECKREG r5, 0x00000000; 207CHECKREG r6, 0x00000000; 208CHECKREG r7, 0x119B119B; 209 210 211 212pass 213