xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/c_dsp32mult_dr_t.s (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c) 
1//Original:/testcases/core/c_dsp32mult_dr_t/c_dsp32mult_dr_t.dsp
2// Spec Reference: dsp32mult single dr t
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8imm32 r0, 0x8b235625;
9imm32 r1, 0x98ba5127;
10imm32 r2, 0xa3846725;
11imm32 r3, 0x00080027;
12imm32 r4, 0xb0ab8d29;
13imm32 r5, 0x10ace82b;
14imm32 r6, 0xc00c008d;
15imm32 r7, 0xd2467028;
16R4.H = R0.L * R0.L, R4.L = R0.L * R0.L (T);
17R5.H = R0.L * R1.L, R5.L = R0.L * R1.H (T);
18R6.H = R1.L * R0.L, R6.L = R1.H * R0.L (T);
19R7.H = R1.L * R1.L, R7.L = R1.H * R1.H (T);
20R0.H = R0.L * R0.L, R0.L = R0.L * R0.L (T);
21R1.H = R0.L * R1.L, R1.L = R0.L * R1.H (T);
22R2.H = R1.L * R0.L, R2.L = R1.H * R0.L (T);
23R3.H = R1.L * R1.L, R3.L = R1.H * R1.H (T);
24CHECKREG r0, 0x39F939F9;
25CHECKREG r1, 0x24C1D139;
26CHECKREG r2, 0xEAD010A5;
27CHECKREG r3, 0x11180A8D;
28CHECKREG r4, 0x39F939F9;
29CHECKREG r5, 0x369DBA7F;
30CHECKREG r6, 0x369DBA7F;
31CHECKREG r7, 0x33735352;
32
33imm32 r0, 0x9923a635;
34imm32 r1, 0x6f995137;
35imm32 r2, 0x1324b735;
36imm32 r3, 0x99060037;
37imm32 r4, 0x809bcd39;
38imm32 r5, 0xb0a99f3b;
39imm32 r6, 0xa00c093d;
40imm32 r7, 0x12467093;
41R4.H = R2.L * R2.H, R4.L = R2.H * R2.L (T);
42R5.H = R2.L * R3.H, R5.L = R2.H * R3.H (T);
43R6.H = R3.L * R2.L, R6.L = R3.L * R2.H (T);
44R7.H = R3.L * R3.H, R7.L = R3.L * R3.H (T);
45R2.H = R2.L * R2.H, R2.L = R2.H * R2.L (T);
46R3.H = R2.L * R3.H, R3.L = R2.H * R3.H (T);
47R0.H = R3.L * R2.H, R0.L = R3.L * R2.L (T);
48R1.H = R3.L * R3.H, R1.L = R3.L * R3.H (T);
49CHECKREG r0, 0xFF41FF41;
50CHECKREG r1, 0x00990099;
51CHECKREG r2, 0xF51DF51D;
52CHECKREG r3, 0x08C208C2;
53CHECKREG r4, 0xF51DF51D;
54CHECKREG r5, 0x3A8FF099;
55CHECKREG r6, 0xFFE00008;
56CHECKREG r7, 0xFFD3FFD3;
57
58imm32 r0, 0x19235655;
59imm32 r1, 0xc9ba5157;
60imm32 r2, 0x63246755;
61imm32 r3, 0x0a060055;
62imm32 r4, 0x90abc509;
63imm32 r5, 0x10acef5b;
64imm32 r6, 0xb00a005d;
65imm32 r7, 0x1246a05f;
66R0.H = R4.H * R4.L, R0.L = R4.L * R4.L (T);
67R1.H = R4.H * R5.L, R1.L = R4.L * R5.H (T);
68R2.H = R5.H * R4.L, R2.L = R5.H * R4.L (T);
69R3.H = R5.L * R5.L, R3.L = R5.H * R5.H (T);
70R4.H = R4.H * R4.L, R4.L = R4.L * R4.L (T);
71R5.H = R4.H * R5.L, R5.L = R4.L * R5.L (T);
72R6.H = R5.L * R4.L, R6.L = R5.H * R4.L (T);
73R7.H = R5.H * R5.L, R7.L = R5.H * R5.H (T);
74CHECKREG r0, 0x33491B29;
75CHECKREG r1, 0x0E7AF851;
76CHECKREG r2, 0xF851F851;
77CHECKREG r3, 0x022A022B;
78CHECKREG r4, 0x33491B29;
79CHECKREG r5, 0xF954FC77;
80CHECKREG r6, 0xFF3FFE95;
81CHECKREG r7, 0x002F0059;
82
83imm32 r0, 0xbb235666;
84imm32 r1, 0xefba5166;
85imm32 r2, 0x13248766;
86imm32 r3, 0xe0060066;
87imm32 r4, 0x9eab9d69;
88imm32 r5, 0x10ecef6b;
89imm32 r6, 0x800ee06d;
90imm32 r7, 0x12467e6f;
91// test the unsigned U=1
92R0.H = R6.H * R6.H, R0.L = R6.L * R6.L (T);
93R1.H = R6.H * R7.H, R1.L = R6.L * R7.H (T);
94R2.H = R7.H * R6.H, R2.L = R7.H * R6.L (T);
95R3.H = R7.H * R7.H, R3.L = R7.H * R7.H (T);
96R6.H = R6.H * R6.H, R6.L = R6.L * R6.L (T);
97R7.H = R6.H * R7.H, R7.L = R6.L * R7.H (T);
98R4.H = R7.H * R6.H, R4.L = R7.H * R6.L (T);
99R5.H = R7.H * R7.H, R5.L = R7.H * R7.H (T);
100CHECKREG r0, 0x7FE407C9;
101CHECKREG r1, 0xEDBBFB7E;
102CHECKREG r2, 0xEDBBFB7E;
103CHECKREG r3, 0x029B029B;
104CHECKREG r4, 0x123E011C;
105CHECKREG r5, 0x029A029A;
106CHECKREG r6, 0x7FE407C9;
107CHECKREG r7, 0x1242011C;
108
109// mix order
110imm32 r0, 0xac23a675;
111imm32 r1, 0xcfba5127;
112imm32 r2, 0x13c46705;
113imm32 r3, 0x00060007;
114imm32 r4, 0x90accd09;
115imm32 r5, 0x10acdfdb;
116imm32 r6, 0x000cc00d;
117imm32 r7, 0x1246fc0f;
118R0.H = R5.L * R7.L, R0.L = R5.H * R7.H (T);
119R1.H = R7.L * R6.L, R1.L = R7.L * R6.H (T);
120R2.H = R6.H * R5.H, R2.L = R6.H * R5.L (T);
121R3.H = R0.L * R4.L, R3.L = R0.L * R4.L (T);
122R4.H = R1.L * R5.H, R4.L = R1.L * R5.L (T);
123R5.H = R3.H * R4.L, R5.L = R3.H * R4.L (T);
124R6.H = R2.L * R5.L, R6.L = R2.L * R5.L (T);
125R7.H = R4.H * R0.L, R7.L = R4.H * R0.H (T);
126CHECKREG r0, 0x00FD0261;
127CHECKREG r1, 0x01F8FFFF;
128CHECKREG r2, 0x0001FFFC;
129CHECKREG r3, 0xFF0DFF0D;
130CHECKREG r4, 0xFFFF0000;
131CHECKREG r5, 0x00000000;
132CHECKREG r6, 0x00000000;
133CHECKREG r7, 0xFFFFFFFF;
134
135imm32 r0, 0xab235a75;
136imm32 r1, 0xcfba5127;
137imm32 r2, 0xdd246905;
138imm32 r3, 0x00d6d007;
139imm32 r4, 0x90abcd09;
140imm32 r5, 0x10aceddb;
141imm32 r6, 0x000c0d0d;
142imm32 r7, 0x1246700f;
143R4.H = R7.H * R0.H, R4.L = R7.H * R0.L (T);
144R5.H = R6.H * R1.H, R5.L = R6.L * R1.L (T);
145R6.H = R5.H * R2.H, R6.L = R5.H * R2.L (T);
146R7.H = R4.H * R3.H, R7.L = R4.H * R3.L (T);
147R0.H = R3.H * R4.H, R0.L = R3.H * R4.L (T);
148R2.H = R2.H * R5.H, R2.L = R2.H * R5.L (T);
149R1.H = R1.H * R6.H, R1.L = R1.H * R6.L (T);
150R3.H = R0.L * R7.H, R3.L = R0.H * R7.H (T);
151CHECKREG r0, 0xFFEB0015;
152CHECKREG r1, 0xFFFF0001;
153CHECKREG r2, 0x0001FDBF;
154CHECKREG r3, 0xFFFF0000;
155CHECKREG r4, 0xF3E20CE9;
156CHECKREG r5, 0xFFFB0846;
157CHECKREG r6, 0x0001FFFB;
158CHECKREG r7, 0xFFEB048A;
159
160imm32 r0, 0xfb235675;
161imm32 r1, 0xcfba5127;
162imm32 r2, 0x13f46705;
163imm32 r3, 0x000f0007;
164imm32 r4, 0x90abfd09;
165imm32 r5, 0x10acefdb;
166imm32 r6, 0x000c00fd;
167imm32 r7, 0x1246700f;
168R2.H = R0.L * R6.L, R2.L = R0.L * R6.H (T);
169R3.H = R1.H * R7.H, R3.L = R1.H * R7.L (T);
170R0.H = R2.L * R0.L, R0.L = R2.L * R0.H (T);
171R1.H = R3.L * R1.L, R1.L = R3.H * R1.H (T);
172R4.H = R4.L * R2.L, R4.L = R4.L * R2.H (T);
173R5.H = R5.L * R3.H, R5.L = R5.H * R3.L (T);
174R6.H = R6.H * R4.L, R6.L = R6.L * R4.H (T);
175R7.H = R7.L * R5.L, R7.L = R7.H * R5.H (T);
176CHECKREG r0, 0x0005FFFF;
177CHECKREG r1, 0xE5340299;
178CHECKREG r2, 0x00AA0008;
179CHECKREG r3, 0xF91BD5BD;
180CHECKREG r4, 0xFFFFFFFC;
181CHECKREG r5, 0x00DEFA7E;
182CHECKREG r6, 0xFFFFFFFF;
183CHECKREG r7, 0xFB2D001F;
184
185imm32 r0, 0xab2d5675;
186imm32 r1, 0xcfbad127;
187imm32 r2, 0x13246d05;
188imm32 r3, 0x000600d7;
189imm32 r4, 0x908bcd09;
190imm32 r5, 0x10a9efdb;
191imm32 r6, 0x000c500d;
192imm32 r7, 0x1246760f;
193R5.H = R5.L * R2.L, R5.L = R5.L * R2.H (T);
194R6.H = R6.H * R3.L, R6.L = R6.L * R3.H (T);
195R1.H = R7.L * R4.L, R1.L = R7.L * R4.H (T);
196R0.H = R1.L * R5.H, R0.L = R1.L * R5.L (T);
197R2.H = R0.L * R6.L, R2.L = R0.L * R6.H (T);
198R4.H = R2.L * R7.H, R4.L = R2.H * R7.L (T);
199R3.H = R3.L * R0.L, R3.L = R3.L * R0.H (T);
200R7.H = R4.H * R1.L, R7.L = R4.L * R1.H (T);
201CHECKREG r0, 0x0B0B01F1;
202CHECKREG r1, 0xD0FE9933;
203CHECKREG r2, 0x00000000;
204CHECKREG r3, 0x00030012;
205CHECKREG r4, 0x00000000;
206CHECKREG r5, 0xF23FFD95;
207CHECKREG r6, 0x00000003;
208CHECKREG r7, 0x00000000;
209
210
211
212pass
213