1//Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1a0_m/c_dsp32mac_pair_a1a0_m.dsp 2// Spec Reference: dsp32mac pair a1a0 M MNOP 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 A1 = A0 = 0; 9 10// The result accumulated in A , and stored to a reg half 11 12 imm32 r0, 0x63545abd; 13 imm32 r1, 0x86bcfec7; 14 imm32 r2, 0xa8645679; 15 imm32 r3, 0x00860007; 16 imm32 r4, 0xefb86569; 17 imm32 r5, 0x1235860b; 18 imm32 r6, 0x000c086d; 19 imm32 r7, 0x678e0086; 20 R7 = ( A1 += R0.L * R1.L ) (M), R6 = ( A0 = R0.L * R1.L ) (IS); 21 P1 = A1.w; 22 P2 = A0.w; 23 R1 = ( A1 = R3.L * R2.L ) (M), R0 = ( A0 = R3.H * R2.L ) (IS); 24 P3 = A1.w; 25 P4 = A0.w; 26 R3 = ( A1 -= R7.L * R6.L ) (M), R2 = ( A0 += R7.H * R6.H ) (IS); 27 P5 = A1.w; 28 SP = A0.w; 29 R5 = ( A1 += R5.L * R4.L ) (M), R4 = ( A0 += R5.L * R4.H ) (IS); 30 FP = A0.w; 31 CHECKREG r0, 0x002D4356; 32 CHECKREG r1, 0x00025D4F; 33 CHECKREG r2, 0x00061B84; 34 CHECKREG r3, 0xFF23D196; 35 CHECKREG r4, 0x07C7B86C; 36 CHECKREG r5, 0xCED42319; 37 CHECKREG r6, 0xFF910EEB; 38 CHECKREG r7, 0x5A4E0EEB; 39 CHECKREG p1, 0x5A4E0EEB; 40 CHECKREG p2, 0xFF910EEB; 41 CHECKREG p3, 0x00025D4F; 42 CHECKREG p4, 0x002D4356; 43 CHECKREG p5, 0xFF23D196; 44 CHECKREG sp, 0x00061B84; 45 CHECKREG fp, 0x07C7B86C; 46 47 imm32 r0, 0x98764abd; 48 imm32 r1, 0xa1bcf4c7; 49 imm32 r2, 0xa1145649; 50 imm32 r3, 0x00010005; 51 imm32 r4, 0xefbc1569; 52 imm32 r5, 0x1235010b; 53 imm32 r6, 0x000c001d; 54 imm32 r7, 0x678e0001; 55 R5 = A1, R4 = ( A0 = R3.L * R1.L ) (IS); 56 P1 = A1.w; 57 P2 = A0.w; 58 R1 = A1, R0 = ( A0 -= R0.H * R5.L ) (IS); 59 P3 = A1.w; 60 P4 = A0.w; 61 R3 = A1, R2 = ( A0 += R2.H * R7.H ) (IS); 62 P5 = A1.w; 63 SP = A0.w; 64 R1 = A1, R0 = ( A0 -= R4.L * R6.H ) (IS); 65 FP = A1.w; 66 CHECKREG r0, 0xE7CEC8D1; 67 CHECKREG r1, 0xCED42319; 68 CHECKREG r2, 0xE7CC2775; 69 CHECKREG r3, 0xCED42319; 70 CHECKREG r4, 0xFFFFC7E3; 71 CHECKREG r5, 0xCED42319; 72 CHECKREG r6, 0x000C001D; 73 CHECKREG r7, 0x678E0001; 74 CHECKREG p1, 0xCED42319; 75 CHECKREG p2, 0xFFFFC7E3; 76 CHECKREG p3, 0xCED42319; 77 CHECKREG p4, 0x0E31C25D; 78 CHECKREG p5, 0xCED42319; 79 CHECKREG sp, 0xE7CC2775; 80 CHECKREG fp, 0xCED42319; 81 82 imm32 r0, 0x7136459d; 83 imm32 r1, 0xabd69ec7; 84 imm32 r2, 0x71145679; 85 imm32 r3, 0x08010007; 86 imm32 r4, 0xef9c1569; 87 imm32 r5, 0x1225010b; 88 imm32 r6, 0x0003401d; 89 imm32 r7, 0x678e0561; 90 R5 = ( A1 += R4.H * R3.L ) (M), R4 = ( A0 = R4.L * R3.L ) (IS); 91 P1 = A1.w; 92 P2 = A0.w; 93 R7 = A1, R6 = ( A0 = R5.H * R0.L ) (IS); 94 P3 = A1.w; 95 P4 = A0.w; 96 R1 = ( A1 = R2.H * R6.L ) (M), R0 = ( A0 += R2.H * R6.H ) (IS); 97 P5 = A1.w; 98 SP = A0.w; 99 R5 = A1, R4 = ( A0 += R7.L * R1.H ) (IS); 100 FP = A1.w; 101 CHECKREG r0, 0xECB84AE7; 102 CHECKREG r1, 0x5091B70C; 103 CHECKREG r2, 0x71145679; 104 CHECKREG r3, 0x08010007; 105 CHECKREG r4, 0xD3A83F94; 106 CHECKREG r5, 0x5091B70C; 107 CHECKREG r6, 0xF2A0B667; 108 CHECKREG r7, 0xCED3B05D; 109 CHECKREG p1, 0xCED3B05D; 110 CHECKREG p2, 0x000095DF; 111 CHECKREG p3, 0xCED3B05D; 112 CHECKREG p4, 0xF2A0B667; 113 CHECKREG p5, 0x5091B70C; 114 CHECKREG sp, 0xECB84AE7; 115 CHECKREG fp, 0x5091B70C; 116 117 imm32 r0, 0x123489bd; 118 imm32 r1, 0x91bcfec7; 119 imm32 r2, 0xa9145679; 120 imm32 r3, 0xd0910007; 121 imm32 r4, 0xedb91569; 122 imm32 r5, 0xd235910b; 123 imm32 r6, 0x0d0c0999; 124 imm32 r7, 0x67de0009; 125 R1 = A1, R0 = ( A0 = R5.L * R2.L ) (IS); 126 P1 = A1.w; 127 P2 = A0.w; 128 R3 = ( A1 = R3.H * R1.H ) (M), R2 = ( A0 -= R3.H * R1.L ) (IS); 129 P3 = A1.w; 130 P4 = A0.w; 131 R5 = ( A1 = R7.H * R0.H ) (M), R4 = ( A0 += R7.H * R0.H ) (IS); 132 P5 = A0.w; 133 SP = A1.w; 134 R7 = A1, R6 = ( A0 += R4.L * R6.H ) (IS); 135 FP = A0.w; 136 CHECKREG r0, 0xDA854033; 137 CHECKREG r1, 0x5091B70C; 138 CHECKREG r2, 0xCD00D267; 139 CHECKREG r3, 0xF1127221; 140 CHECKREG r4, 0xBDCBD4BD; 141 CHECKREG r5, 0x58A90256; 142 CHECKREG r6, 0xBB976699; 143 CHECKREG r7, 0x58A90256; 144 CHECKREG p1, 0x5091B70C; 145 CHECKREG p2, 0xDA854033; 146 CHECKREG p3, 0xF1127221; 147 CHECKREG p4, 0xCD00D267; 148 CHECKREG p5, 0xBDCBD4BD; 149 CHECKREG sp, 0x58A90256; 150 CHECKREG fp, 0xBB976699; 151 152 pass 153