xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/arm/b.cgs (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c)
1# arm testcase for b$cond $offset24
2# mach: all
3
4# ??? Still need to test edge cases.
5
6	.include "testutils.inc"
7
8	start
9
10	.global b
11b:
12
13# b foo
14
15	b balways1
16	fail
17balways1:
18
19# beq foo
20
21	mvi_h_gr r4,4
22	mvi_h_gr r5,4
23	cmp r4,r5
24	beq beq1
25	fail
26beq1:
27	mvi_h_gr r5,5
28	cmp r4,r5
29	beq beq2
30	b beq3
31beq2:
32	fail
33beq3:
34
35# bne foo
36
37	mvi_h_gr r4,4
38	mvi_h_gr r5,5
39	cmp r4,r5
40	bne bne1
41	fail
42bne1:
43	mvi_h_gr r5,4
44	cmp r4,r5
45	bne bne2
46	b bne3
47bne2:
48	fail
49bne3:
50
51# bcs foo
52
53	mvi_h_cnvz 1,0,0,0
54	bcs bcs1
55	fail
56bcs1:
57	mvi_h_cnvz 0,0,0,0
58	bcs bcs2
59	b bcs3
60bcs2:
61	fail
62bcs3:
63
64# bcc foo
65
66	mvi_h_cnvz 0,0,0,0
67	bcc bcc1
68	fail
69bcc1:
70	mvi_h_cnvz 1,0,0,0
71	bcc bcc2
72	b bcc3
73bcc2:
74	fail
75bcc3:
76
77# bmi foo
78
79	mvi_h_cnvz 0,1,0,0
80	bmi bmi1
81	fail
82bmi1:
83	mvi_h_cnvz 0,0,0,0
84	bmi bmi2
85	b bmi3
86bmi2:
87	fail
88bmi3:
89
90# bpl foo
91
92	mvi_h_cnvz 0,0,0,0
93	bpl bpl1
94	fail
95bpl1:
96	mvi_h_cnvz 0,1,0,0
97	bpl bpl2
98	b bpl3
99bpl2:
100	fail
101bpl3:
102
103# bvs foo
104
105	mvi_h_cnvz 0,0,1,0
106	bvs bvs1
107	fail
108bvs1:
109	mvi_h_cnvz 0,0,0,0
110	bvs bvs2
111	b bvs3
112bvs2:
113	fail
114bvs3:
115
116# bvc foo
117
118	mvi_h_cnvz 0,0,0,0
119	bvc bvc1
120	fail
121bvc1:
122	mvi_h_cnvz 0,0,1,0
123	bvc bvc2
124	b bvc3
125bvc2:
126	fail
127bvc3:
128
129# bhi foo
130
131	mvi_h_gr r4,5
132	mvi_h_gr r5,4
133	cmp r4,r5
134	bhi bhi1
135	fail
136bhi1:
137	mvi_h_gr r5,5
138	cmp r4,r5
139	bhi bhi2
140	b bhi3
141bhi2:
142	fail
143bhi3:
144	mvi_h_gr r5,6
145	cmp r4,r5
146	bhi bhi4
147	b bhi5
148bhi4:
149	fail
150bhi5:
151
152# bls foo
153
154	mvi_h_gr r4,4
155	mvi_h_gr r5,5
156	cmp r4,r5
157	bls bls1
158	fail
159bls1:
160	mvi_h_gr r5,4
161	cmp r4,r5
162	bls bls2
163	fail
164bls2:
165	mvi_h_gr r5,3
166	cmp r4,r5
167	bls bls3
168	b bls4
169bls3:
170	fail
171bls4:
172
173# bge foo
174
175	mvi_h_gr r4,4
176	mvi_h_gr r5,4
177	cmp r4,r5
178	bge bge1
179	fail
180bge1:
181	mvi_h_gr r5,3
182	cmp r4,r5
183	bge bge2
184	fail
185bge2:
186	mvi_h_gr r5,5
187	cmp r4,r5
188	bge bge3
189	b bge4
190bge3:
191	fail
192bge4:
193
194# blt foo
195
196	mvi_h_gr r4,4
197	mvi_h_gr r5,5
198	cmp r4,r5
199	blt blt1
200	fail
201blt1:
202	mvi_h_gr r5,4
203	cmp r4,r5
204	blt blt2
205	b blt3
206blt2:
207	fail
208blt3:
209	mvi_h_gr r5,3
210	cmp r4,r5
211	blt blt4
212	b blt5
213blt4:
214	fail
215blt5:
216
217# bgt foo
218
219	mvi_h_gr r4,4
220	mvi_h_gr r5,3
221	cmp r4,r5
222	bgt bgt1
223	fail
224bgt1:
225	mvi_h_gr r5,4
226	cmp r4,r5
227	bgt bgt2
228	b bgt3
229bgt2:
230	fail
231bgt3:
232	mvi_h_gr r5,5
233	cmp r4,r5
234	bgt bgt4
235	b bgt5
236bgt4:
237	fail
238bgt5:
239
240# ble foo
241
242	mvi_h_gr r4,4
243	mvi_h_gr r5,4
244	cmp r4,r5
245	ble ble1
246	fail
247ble1:
248	mvi_h_gr r5,5
249	cmp r4,r5
250	ble ble2
251	fail
252ble2:
253	mvi_h_gr r5,3
254	cmp r4,r5
255	ble ble3
256	b ble4
257ble3:
258	fail
259ble4:
260
261	pass
262