1 /* Simulator instruction decoder for or1k32bf. 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5 Copyright (C) 1996-2024 Free Software Foundation, Inc. 6 7 This file is part of the GNU simulators. 8 9 This file is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License along 20 with this program; if not, write to the Free Software Foundation, Inc., 21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. 22 23 */ 24 25 #define WANT_CPU or1k32bf 26 #define WANT_CPU_OR1K32BF 27 28 #include "sim-main.h" 29 #include "sim-assert.h" 30 #include "cgen-mem.h" 31 #include "cgen-ops.h" 32 33 /* The instruction descriptor array. 34 This is computed at runtime. Space for it is not malloc'd to save a 35 teensy bit of cpu in the decoder. Moving it to malloc space is trivial 36 but won't be done until necessary (we don't currently support the runtime 37 addition of instructions nor an SMP machine with different cpus). */ 38 static IDESC or1k32bf_insn_data[OR1K32BF_INSN__MAX]; 39 40 /* Commas between elements are contained in the macros. 41 Some of these are conditionally compiled out. */ 42 43 static const struct insn_sem or1k32bf_insn_sem[] = 44 { 45 { VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY }, 46 { VIRTUAL_INSN_X_AFTER, OR1K32BF_INSN_X_AFTER, OR1K32BF_SFMT_EMPTY }, 47 { VIRTUAL_INSN_X_BEFORE, OR1K32BF_INSN_X_BEFORE, OR1K32BF_SFMT_EMPTY }, 48 { VIRTUAL_INSN_X_CTI_CHAIN, OR1K32BF_INSN_X_CTI_CHAIN, OR1K32BF_SFMT_EMPTY }, 49 { VIRTUAL_INSN_X_CHAIN, OR1K32BF_INSN_X_CHAIN, OR1K32BF_SFMT_EMPTY }, 50 { VIRTUAL_INSN_X_BEGIN, OR1K32BF_INSN_X_BEGIN, OR1K32BF_SFMT_EMPTY }, 51 { OR1K_INSN_L_J, OR1K32BF_INSN_L_J, OR1K32BF_SFMT_L_J }, 52 { OR1K_INSN_L_ADRP, OR1K32BF_INSN_L_ADRP, OR1K32BF_SFMT_L_ADRP }, 53 { OR1K_INSN_L_JAL, OR1K32BF_INSN_L_JAL, OR1K32BF_SFMT_L_JAL }, 54 { OR1K_INSN_L_JR, OR1K32BF_INSN_L_JR, OR1K32BF_SFMT_L_JR }, 55 { OR1K_INSN_L_JALR, OR1K32BF_INSN_L_JALR, OR1K32BF_SFMT_L_JALR }, 56 { OR1K_INSN_L_BNF, OR1K32BF_INSN_L_BNF, OR1K32BF_SFMT_L_BNF }, 57 { OR1K_INSN_L_BF, OR1K32BF_INSN_L_BF, OR1K32BF_SFMT_L_BNF }, 58 { OR1K_INSN_L_TRAP, OR1K32BF_INSN_L_TRAP, OR1K32BF_SFMT_L_TRAP }, 59 { OR1K_INSN_L_SYS, OR1K32BF_INSN_L_SYS, OR1K32BF_SFMT_L_TRAP }, 60 { OR1K_INSN_L_MSYNC, OR1K32BF_INSN_L_MSYNC, OR1K32BF_SFMT_L_MSYNC }, 61 { OR1K_INSN_L_PSYNC, OR1K32BF_INSN_L_PSYNC, OR1K32BF_SFMT_L_MSYNC }, 62 { OR1K_INSN_L_CSYNC, OR1K32BF_INSN_L_CSYNC, OR1K32BF_SFMT_L_MSYNC }, 63 { OR1K_INSN_L_RFE, OR1K32BF_INSN_L_RFE, OR1K32BF_SFMT_L_MSYNC }, 64 { OR1K_INSN_L_NOP_IMM, OR1K32BF_INSN_L_NOP_IMM, OR1K32BF_SFMT_L_NOP_IMM }, 65 { OR1K_INSN_L_MOVHI, OR1K32BF_INSN_L_MOVHI, OR1K32BF_SFMT_L_MOVHI }, 66 { OR1K_INSN_L_MACRC, OR1K32BF_INSN_L_MACRC, OR1K32BF_SFMT_L_MACRC }, 67 { OR1K_INSN_L_MFSPR, OR1K32BF_INSN_L_MFSPR, OR1K32BF_SFMT_L_MFSPR }, 68 { OR1K_INSN_L_MTSPR, OR1K32BF_INSN_L_MTSPR, OR1K32BF_SFMT_L_MTSPR }, 69 { OR1K_INSN_L_LWZ, OR1K32BF_INSN_L_LWZ, OR1K32BF_SFMT_L_LWZ }, 70 { OR1K_INSN_L_LWS, OR1K32BF_INSN_L_LWS, OR1K32BF_SFMT_L_LWS }, 71 { OR1K_INSN_L_LWA, OR1K32BF_INSN_L_LWA, OR1K32BF_SFMT_L_LWA }, 72 { OR1K_INSN_L_LBZ, OR1K32BF_INSN_L_LBZ, OR1K32BF_SFMT_L_LBZ }, 73 { OR1K_INSN_L_LBS, OR1K32BF_INSN_L_LBS, OR1K32BF_SFMT_L_LBS }, 74 { OR1K_INSN_L_LHZ, OR1K32BF_INSN_L_LHZ, OR1K32BF_SFMT_L_LHZ }, 75 { OR1K_INSN_L_LHS, OR1K32BF_INSN_L_LHS, OR1K32BF_SFMT_L_LHS }, 76 { OR1K_INSN_L_SW, OR1K32BF_INSN_L_SW, OR1K32BF_SFMT_L_SW }, 77 { OR1K_INSN_L_SB, OR1K32BF_INSN_L_SB, OR1K32BF_SFMT_L_SB }, 78 { OR1K_INSN_L_SH, OR1K32BF_INSN_L_SH, OR1K32BF_SFMT_L_SH }, 79 { OR1K_INSN_L_SWA, OR1K32BF_INSN_L_SWA, OR1K32BF_SFMT_L_SWA }, 80 { OR1K_INSN_L_SLL, OR1K32BF_INSN_L_SLL, OR1K32BF_SFMT_L_SLL }, 81 { OR1K_INSN_L_SLLI, OR1K32BF_INSN_L_SLLI, OR1K32BF_SFMT_L_SLLI }, 82 { OR1K_INSN_L_SRL, OR1K32BF_INSN_L_SRL, OR1K32BF_SFMT_L_SLL }, 83 { OR1K_INSN_L_SRLI, OR1K32BF_INSN_L_SRLI, OR1K32BF_SFMT_L_SLLI }, 84 { OR1K_INSN_L_SRA, OR1K32BF_INSN_L_SRA, OR1K32BF_SFMT_L_SLL }, 85 { OR1K_INSN_L_SRAI, OR1K32BF_INSN_L_SRAI, OR1K32BF_SFMT_L_SLLI }, 86 { OR1K_INSN_L_ROR, OR1K32BF_INSN_L_ROR, OR1K32BF_SFMT_L_SLL }, 87 { OR1K_INSN_L_RORI, OR1K32BF_INSN_L_RORI, OR1K32BF_SFMT_L_SLLI }, 88 { OR1K_INSN_L_AND, OR1K32BF_INSN_L_AND, OR1K32BF_SFMT_L_AND }, 89 { OR1K_INSN_L_OR, OR1K32BF_INSN_L_OR, OR1K32BF_SFMT_L_AND }, 90 { OR1K_INSN_L_XOR, OR1K32BF_INSN_L_XOR, OR1K32BF_SFMT_L_AND }, 91 { OR1K_INSN_L_ADD, OR1K32BF_INSN_L_ADD, OR1K32BF_SFMT_L_ADD }, 92 { OR1K_INSN_L_SUB, OR1K32BF_INSN_L_SUB, OR1K32BF_SFMT_L_ADD }, 93 { OR1K_INSN_L_ADDC, OR1K32BF_INSN_L_ADDC, OR1K32BF_SFMT_L_ADDC }, 94 { OR1K_INSN_L_MUL, OR1K32BF_INSN_L_MUL, OR1K32BF_SFMT_L_MUL }, 95 { OR1K_INSN_L_MULD, OR1K32BF_INSN_L_MULD, OR1K32BF_SFMT_L_MULD }, 96 { OR1K_INSN_L_MULU, OR1K32BF_INSN_L_MULU, OR1K32BF_SFMT_L_MULU }, 97 { OR1K_INSN_L_MULDU, OR1K32BF_INSN_L_MULDU, OR1K32BF_SFMT_L_MULD }, 98 { OR1K_INSN_L_DIV, OR1K32BF_INSN_L_DIV, OR1K32BF_SFMT_L_DIV }, 99 { OR1K_INSN_L_DIVU, OR1K32BF_INSN_L_DIVU, OR1K32BF_SFMT_L_DIVU }, 100 { OR1K_INSN_L_FF1, OR1K32BF_INSN_L_FF1, OR1K32BF_SFMT_L_FF1 }, 101 { OR1K_INSN_L_FL1, OR1K32BF_INSN_L_FL1, OR1K32BF_SFMT_L_FF1 }, 102 { OR1K_INSN_L_ANDI, OR1K32BF_INSN_L_ANDI, OR1K32BF_SFMT_L_MFSPR }, 103 { OR1K_INSN_L_ORI, OR1K32BF_INSN_L_ORI, OR1K32BF_SFMT_L_MFSPR }, 104 { OR1K_INSN_L_XORI, OR1K32BF_INSN_L_XORI, OR1K32BF_SFMT_L_XORI }, 105 { OR1K_INSN_L_ADDI, OR1K32BF_INSN_L_ADDI, OR1K32BF_SFMT_L_ADDI }, 106 { OR1K_INSN_L_ADDIC, OR1K32BF_INSN_L_ADDIC, OR1K32BF_SFMT_L_ADDIC }, 107 { OR1K_INSN_L_MULI, OR1K32BF_INSN_L_MULI, OR1K32BF_SFMT_L_MULI }, 108 { OR1K_INSN_L_EXTHS, OR1K32BF_INSN_L_EXTHS, OR1K32BF_SFMT_L_EXTHS }, 109 { OR1K_INSN_L_EXTBS, OR1K32BF_INSN_L_EXTBS, OR1K32BF_SFMT_L_EXTHS }, 110 { OR1K_INSN_L_EXTHZ, OR1K32BF_INSN_L_EXTHZ, OR1K32BF_SFMT_L_EXTHS }, 111 { OR1K_INSN_L_EXTBZ, OR1K32BF_INSN_L_EXTBZ, OR1K32BF_SFMT_L_EXTHS }, 112 { OR1K_INSN_L_EXTWS, OR1K32BF_INSN_L_EXTWS, OR1K32BF_SFMT_L_EXTHS }, 113 { OR1K_INSN_L_EXTWZ, OR1K32BF_INSN_L_EXTWZ, OR1K32BF_SFMT_L_EXTHS }, 114 { OR1K_INSN_L_CMOV, OR1K32BF_INSN_L_CMOV, OR1K32BF_SFMT_L_CMOV }, 115 { OR1K_INSN_L_SFGTS, OR1K32BF_INSN_L_SFGTS, OR1K32BF_SFMT_L_SFGTS }, 116 { OR1K_INSN_L_SFGTSI, OR1K32BF_INSN_L_SFGTSI, OR1K32BF_SFMT_L_SFGTSI }, 117 { OR1K_INSN_L_SFGTU, OR1K32BF_INSN_L_SFGTU, OR1K32BF_SFMT_L_SFGTS }, 118 { OR1K_INSN_L_SFGTUI, OR1K32BF_INSN_L_SFGTUI, OR1K32BF_SFMT_L_SFGTSI }, 119 { OR1K_INSN_L_SFGES, OR1K32BF_INSN_L_SFGES, OR1K32BF_SFMT_L_SFGTS }, 120 { OR1K_INSN_L_SFGESI, OR1K32BF_INSN_L_SFGESI, OR1K32BF_SFMT_L_SFGTSI }, 121 { OR1K_INSN_L_SFGEU, OR1K32BF_INSN_L_SFGEU, OR1K32BF_SFMT_L_SFGTS }, 122 { OR1K_INSN_L_SFGEUI, OR1K32BF_INSN_L_SFGEUI, OR1K32BF_SFMT_L_SFGTSI }, 123 { OR1K_INSN_L_SFLTS, OR1K32BF_INSN_L_SFLTS, OR1K32BF_SFMT_L_SFGTS }, 124 { OR1K_INSN_L_SFLTSI, OR1K32BF_INSN_L_SFLTSI, OR1K32BF_SFMT_L_SFGTSI }, 125 { OR1K_INSN_L_SFLTU, OR1K32BF_INSN_L_SFLTU, OR1K32BF_SFMT_L_SFGTS }, 126 { OR1K_INSN_L_SFLTUI, OR1K32BF_INSN_L_SFLTUI, OR1K32BF_SFMT_L_SFGTSI }, 127 { OR1K_INSN_L_SFLES, OR1K32BF_INSN_L_SFLES, OR1K32BF_SFMT_L_SFGTS }, 128 { OR1K_INSN_L_SFLESI, OR1K32BF_INSN_L_SFLESI, OR1K32BF_SFMT_L_SFGTSI }, 129 { OR1K_INSN_L_SFLEU, OR1K32BF_INSN_L_SFLEU, OR1K32BF_SFMT_L_SFGTS }, 130 { OR1K_INSN_L_SFLEUI, OR1K32BF_INSN_L_SFLEUI, OR1K32BF_SFMT_L_SFGTSI }, 131 { OR1K_INSN_L_SFEQ, OR1K32BF_INSN_L_SFEQ, OR1K32BF_SFMT_L_SFGTS }, 132 { OR1K_INSN_L_SFEQI, OR1K32BF_INSN_L_SFEQI, OR1K32BF_SFMT_L_SFGTSI }, 133 { OR1K_INSN_L_SFNE, OR1K32BF_INSN_L_SFNE, OR1K32BF_SFMT_L_SFGTS }, 134 { OR1K_INSN_L_SFNEI, OR1K32BF_INSN_L_SFNEI, OR1K32BF_SFMT_L_SFGTSI }, 135 { OR1K_INSN_L_MAC, OR1K32BF_INSN_L_MAC, OR1K32BF_SFMT_L_MAC }, 136 { OR1K_INSN_L_MACI, OR1K32BF_INSN_L_MACI, OR1K32BF_SFMT_L_MACI }, 137 { OR1K_INSN_L_MACU, OR1K32BF_INSN_L_MACU, OR1K32BF_SFMT_L_MACU }, 138 { OR1K_INSN_L_MSB, OR1K32BF_INSN_L_MSB, OR1K32BF_SFMT_L_MAC }, 139 { OR1K_INSN_L_MSBU, OR1K32BF_INSN_L_MSBU, OR1K32BF_SFMT_L_MACU }, 140 { OR1K_INSN_L_CUST1, OR1K32BF_INSN_L_CUST1, OR1K32BF_SFMT_L_MSYNC }, 141 { OR1K_INSN_L_CUST2, OR1K32BF_INSN_L_CUST2, OR1K32BF_SFMT_L_MSYNC }, 142 { OR1K_INSN_L_CUST3, OR1K32BF_INSN_L_CUST3, OR1K32BF_SFMT_L_MSYNC }, 143 { OR1K_INSN_L_CUST4, OR1K32BF_INSN_L_CUST4, OR1K32BF_SFMT_L_MSYNC }, 144 { OR1K_INSN_L_CUST5, OR1K32BF_INSN_L_CUST5, OR1K32BF_SFMT_L_MSYNC }, 145 { OR1K_INSN_L_CUST6, OR1K32BF_INSN_L_CUST6, OR1K32BF_SFMT_L_MSYNC }, 146 { OR1K_INSN_L_CUST7, OR1K32BF_INSN_L_CUST7, OR1K32BF_SFMT_L_MSYNC }, 147 { OR1K_INSN_L_CUST8, OR1K32BF_INSN_L_CUST8, OR1K32BF_SFMT_L_MSYNC }, 148 { OR1K_INSN_LF_ADD_S, OR1K32BF_INSN_LF_ADD_S, OR1K32BF_SFMT_LF_ADD_S }, 149 { OR1K_INSN_LF_ADD_D32, OR1K32BF_INSN_LF_ADD_D32, OR1K32BF_SFMT_LF_ADD_D32 }, 150 { OR1K_INSN_LF_SUB_S, OR1K32BF_INSN_LF_SUB_S, OR1K32BF_SFMT_LF_ADD_S }, 151 { OR1K_INSN_LF_SUB_D32, OR1K32BF_INSN_LF_SUB_D32, OR1K32BF_SFMT_LF_ADD_D32 }, 152 { OR1K_INSN_LF_MUL_S, OR1K32BF_INSN_LF_MUL_S, OR1K32BF_SFMT_LF_ADD_S }, 153 { OR1K_INSN_LF_MUL_D32, OR1K32BF_INSN_LF_MUL_D32, OR1K32BF_SFMT_LF_ADD_D32 }, 154 { OR1K_INSN_LF_DIV_S, OR1K32BF_INSN_LF_DIV_S, OR1K32BF_SFMT_LF_ADD_S }, 155 { OR1K_INSN_LF_DIV_D32, OR1K32BF_INSN_LF_DIV_D32, OR1K32BF_SFMT_LF_ADD_D32 }, 156 { OR1K_INSN_LF_REM_S, OR1K32BF_INSN_LF_REM_S, OR1K32BF_SFMT_LF_ADD_S }, 157 { OR1K_INSN_LF_REM_D32, OR1K32BF_INSN_LF_REM_D32, OR1K32BF_SFMT_LF_ADD_D32 }, 158 { OR1K_INSN_LF_ITOF_S, OR1K32BF_INSN_LF_ITOF_S, OR1K32BF_SFMT_LF_ITOF_S }, 159 { OR1K_INSN_LF_ITOF_D32, OR1K32BF_INSN_LF_ITOF_D32, OR1K32BF_SFMT_LF_ITOF_D32 }, 160 { OR1K_INSN_LF_FTOI_S, OR1K32BF_INSN_LF_FTOI_S, OR1K32BF_SFMT_LF_FTOI_S }, 161 { OR1K_INSN_LF_FTOI_D32, OR1K32BF_INSN_LF_FTOI_D32, OR1K32BF_SFMT_LF_FTOI_D32 }, 162 { OR1K_INSN_LF_SFEQ_S, OR1K32BF_INSN_LF_SFEQ_S, OR1K32BF_SFMT_LF_SFEQ_S }, 163 { OR1K_INSN_LF_SFEQ_D32, OR1K32BF_INSN_LF_SFEQ_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 164 { OR1K_INSN_LF_SFNE_S, OR1K32BF_INSN_LF_SFNE_S, OR1K32BF_SFMT_LF_SFEQ_S }, 165 { OR1K_INSN_LF_SFNE_D32, OR1K32BF_INSN_LF_SFNE_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 166 { OR1K_INSN_LF_SFGE_S, OR1K32BF_INSN_LF_SFGE_S, OR1K32BF_SFMT_LF_SFEQ_S }, 167 { OR1K_INSN_LF_SFGE_D32, OR1K32BF_INSN_LF_SFGE_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 168 { OR1K_INSN_LF_SFGT_S, OR1K32BF_INSN_LF_SFGT_S, OR1K32BF_SFMT_LF_SFEQ_S }, 169 { OR1K_INSN_LF_SFGT_D32, OR1K32BF_INSN_LF_SFGT_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 170 { OR1K_INSN_LF_SFLT_S, OR1K32BF_INSN_LF_SFLT_S, OR1K32BF_SFMT_LF_SFEQ_S }, 171 { OR1K_INSN_LF_SFLT_D32, OR1K32BF_INSN_LF_SFLT_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 172 { OR1K_INSN_LF_SFLE_S, OR1K32BF_INSN_LF_SFLE_S, OR1K32BF_SFMT_LF_SFEQ_S }, 173 { OR1K_INSN_LF_SFLE_D32, OR1K32BF_INSN_LF_SFLE_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 174 { OR1K_INSN_LF_SFUEQ_S, OR1K32BF_INSN_LF_SFUEQ_S, OR1K32BF_SFMT_LF_SFEQ_S }, 175 { OR1K_INSN_LF_SFUEQ_D32, OR1K32BF_INSN_LF_SFUEQ_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 176 { OR1K_INSN_LF_SFUNE_S, OR1K32BF_INSN_LF_SFUNE_S, OR1K32BF_SFMT_LF_SFEQ_S }, 177 { OR1K_INSN_LF_SFUNE_D32, OR1K32BF_INSN_LF_SFUNE_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 178 { OR1K_INSN_LF_SFUGT_S, OR1K32BF_INSN_LF_SFUGT_S, OR1K32BF_SFMT_LF_SFEQ_S }, 179 { OR1K_INSN_LF_SFUGT_D32, OR1K32BF_INSN_LF_SFUGT_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 180 { OR1K_INSN_LF_SFUGE_S, OR1K32BF_INSN_LF_SFUGE_S, OR1K32BF_SFMT_LF_SFEQ_S }, 181 { OR1K_INSN_LF_SFUGE_D32, OR1K32BF_INSN_LF_SFUGE_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 182 { OR1K_INSN_LF_SFULT_S, OR1K32BF_INSN_LF_SFULT_S, OR1K32BF_SFMT_LF_SFEQ_S }, 183 { OR1K_INSN_LF_SFULT_D32, OR1K32BF_INSN_LF_SFULT_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 184 { OR1K_INSN_LF_SFULE_S, OR1K32BF_INSN_LF_SFULE_S, OR1K32BF_SFMT_LF_SFEQ_S }, 185 { OR1K_INSN_LF_SFULE_D32, OR1K32BF_INSN_LF_SFULE_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 186 { OR1K_INSN_LF_SFUN_S, OR1K32BF_INSN_LF_SFUN_S, OR1K32BF_SFMT_LF_SFEQ_S }, 187 { OR1K_INSN_LF_SFUN_D32, OR1K32BF_INSN_LF_SFUN_D32, OR1K32BF_SFMT_LF_SFEQ_D32 }, 188 { OR1K_INSN_LF_MADD_S, OR1K32BF_INSN_LF_MADD_S, OR1K32BF_SFMT_LF_MADD_S }, 189 { OR1K_INSN_LF_MADD_D32, OR1K32BF_INSN_LF_MADD_D32, OR1K32BF_SFMT_LF_MADD_D32 }, 190 { OR1K_INSN_LF_CUST1_S, OR1K32BF_INSN_LF_CUST1_S, OR1K32BF_SFMT_L_MSYNC }, 191 { OR1K_INSN_LF_CUST1_D32, OR1K32BF_INSN_LF_CUST1_D32, OR1K32BF_SFMT_L_MSYNC }, 192 }; 193 194 static const struct insn_sem or1k32bf_insn_sem_invalid = 195 { 196 VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY 197 }; 198 199 /* Initialize an IDESC from the compile-time computable parts. */ 200 201 static INLINE void 202 init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) 203 { 204 const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; 205 206 id->num = t->index; 207 id->sfmt = t->sfmt; 208 if ((int) t->type <= 0) 209 id->idata = & cgen_virtual_insn_table[- (int) t->type]; 210 else 211 id->idata = & insn_table[t->type]; 212 id->attrs = CGEN_INSN_ATTRS (id->idata); 213 /* Oh my god, a magic number. */ 214 id->length = CGEN_INSN_BITSIZE (id->idata) / 8; 215 216 #if WITH_PROFILE_MODEL_P 217 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; 218 { 219 SIM_DESC sd = CPU_STATE (cpu); 220 SIM_ASSERT (t->index == id->timing->num); 221 } 222 #endif 223 224 /* Semantic pointers are initialized elsewhere. */ 225 } 226 227 /* Initialize the instruction descriptor table. */ 228 229 void 230 or1k32bf_init_idesc_table (SIM_CPU *cpu) 231 { 232 IDESC *id,*tabend; 233 const struct insn_sem *t,*tend; 234 int tabsize = OR1K32BF_INSN__MAX; 235 IDESC *table = or1k32bf_insn_data; 236 237 memset (table, 0, tabsize * sizeof (IDESC)); 238 239 /* First set all entries to the `invalid insn'. */ 240 t = & or1k32bf_insn_sem_invalid; 241 for (id = table, tabend = table + tabsize; id < tabend; ++id) 242 init_idesc (cpu, id, t); 243 244 /* Now fill in the values for the chosen cpu. */ 245 for (t = or1k32bf_insn_sem, tend = t + ARRAY_SIZE (or1k32bf_insn_sem); 246 t != tend; ++t) 247 { 248 init_idesc (cpu, & table[t->index], t); 249 } 250 251 /* Link the IDESC table into the cpu. */ 252 CPU_IDESC (cpu) = table; 253 } 254 255 /* Given an instruction, return a pointer to its IDESC entry. */ 256 257 const IDESC * 258 or1k32bf_decode (SIM_CPU *current_cpu, IADDR pc, 259 CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn, 260 ARGBUF *abuf) 261 { 262 /* Result of decoder. */ 263 OR1K32BF_INSN_TYPE itype; 264 265 { 266 CGEN_INSN_WORD insn = base_insn; 267 268 { 269 unsigned int val0 = (((insn >> 21) & (63 << 5)) | ((insn >> 0) & (31 << 0))); 270 switch (val0) 271 { 272 case 0: 273 case 1: 274 case 2: 275 case 3: 276 case 4: 277 case 5: 278 case 6: 279 case 7: 280 case 8: 281 case 9: 282 case 10: 283 case 11: 284 case 12: 285 case 13: 286 case 14: 287 case 15: 288 case 16: 289 case 17: 290 case 18: 291 case 19: 292 case 20: 293 case 21: 294 case 22: 295 case 23: 296 case 24: 297 case 25: 298 case 26: 299 case 27: 300 case 28: 301 case 29: 302 case 30: 303 case 31: itype = OR1K32BF_INSN_L_J; goto extract_sfmt_l_j; 304 case 32: 305 case 33: 306 case 34: 307 case 35: 308 case 36: 309 case 37: 310 case 38: 311 case 39: 312 case 40: 313 case 41: 314 case 42: 315 case 43: 316 case 44: 317 case 45: 318 case 46: 319 case 47: 320 case 48: 321 case 49: 322 case 50: 323 case 51: 324 case 52: 325 case 53: 326 case 54: 327 case 55: 328 case 56: 329 case 57: 330 case 58: 331 case 59: 332 case 60: 333 case 61: 334 case 62: 335 case 63: itype = OR1K32BF_INSN_L_JAL; goto extract_sfmt_l_jal; 336 case 64: 337 case 65: 338 case 66: 339 case 67: 340 case 68: 341 case 69: 342 case 70: 343 case 71: 344 case 72: 345 case 73: 346 case 74: 347 case 75: 348 case 76: 349 case 77: 350 case 78: 351 case 79: 352 case 80: 353 case 81: 354 case 82: 355 case 83: 356 case 84: 357 case 85: 358 case 86: 359 case 87: 360 case 88: 361 case 89: 362 case 90: 363 case 91: 364 case 92: 365 case 93: 366 case 94: 367 case 95: itype = OR1K32BF_INSN_L_ADRP; goto extract_sfmt_l_adrp; 368 case 96: 369 case 97: 370 case 98: 371 case 99: 372 case 100: 373 case 101: 374 case 102: 375 case 103: 376 case 104: 377 case 105: 378 case 106: 379 case 107: 380 case 108: 381 case 109: 382 case 110: 383 case 111: 384 case 112: 385 case 113: 386 case 114: 387 case 115: 388 case 116: 389 case 117: 390 case 118: 391 case 119: 392 case 120: 393 case 121: 394 case 122: 395 case 123: 396 case 124: 397 case 125: 398 case 126: 399 case 127: itype = OR1K32BF_INSN_L_BNF; goto extract_sfmt_l_bnf; 400 case 128: 401 case 129: 402 case 130: 403 case 131: 404 case 132: 405 case 133: 406 case 134: 407 case 135: 408 case 136: 409 case 137: 410 case 138: 411 case 139: 412 case 140: 413 case 141: 414 case 142: 415 case 143: 416 case 144: 417 case 145: 418 case 146: 419 case 147: 420 case 148: 421 case 149: 422 case 150: 423 case 151: 424 case 152: 425 case 153: 426 case 154: 427 case 155: 428 case 156: 429 case 157: 430 case 158: 431 case 159: itype = OR1K32BF_INSN_L_BF; goto extract_sfmt_l_bnf; 432 case 160: 433 case 161: 434 case 162: 435 case 163: 436 case 164: 437 case 165: 438 case 166: 439 case 167: 440 case 168: 441 case 169: 442 case 170: 443 case 171: 444 case 172: 445 case 173: 446 case 174: 447 case 175: 448 case 176: 449 case 177: 450 case 178: 451 case 179: 452 case 180: 453 case 181: 454 case 182: 455 case 183: 456 case 184: 457 case 185: 458 case 186: 459 case 187: 460 case 188: 461 case 189: 462 case 190: 463 case 191: 464 if ((entire_insn & 0xffff0000) == 0x15000000) 465 { itype = OR1K32BF_INSN_L_NOP_IMM; goto extract_sfmt_l_nop_imm; } 466 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 467 case 192: 468 { 469 unsigned int val1 = (((insn >> 16) & (1 << 0))); 470 switch (val1) 471 { 472 case 0: 473 if ((entire_insn & 0xfc1f0000) == 0x18000000) 474 { itype = OR1K32BF_INSN_L_MOVHI; goto extract_sfmt_l_movhi; } 475 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 476 case 1: 477 if ((entire_insn & 0xfc1fffff) == 0x18010000) 478 { itype = OR1K32BF_INSN_L_MACRC; goto extract_sfmt_l_macrc; } 479 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 480 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 481 } 482 } 483 case 193: 484 case 194: 485 case 195: 486 case 196: 487 case 197: 488 case 198: 489 case 199: 490 case 200: 491 case 201: 492 case 202: 493 case 203: 494 case 204: 495 case 205: 496 case 206: 497 case 207: 498 case 208: 499 case 209: 500 case 210: 501 case 211: 502 case 212: 503 case 213: 504 case 214: 505 case 215: 506 case 216: 507 case 217: 508 case 218: 509 case 219: 510 case 220: 511 case 221: 512 case 222: 513 case 223: 514 if ((entire_insn & 0xfc1f0000) == 0x18000000) 515 { itype = OR1K32BF_INSN_L_MOVHI; goto extract_sfmt_l_movhi; } 516 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 517 case 256: 518 { 519 unsigned int val1 = (((insn >> 23) & (7 << 0))); 520 switch (val1) 521 { 522 case 0: 523 if ((entire_insn & 0xffff0000) == 0x20000000) 524 { itype = OR1K32BF_INSN_L_SYS; goto extract_sfmt_l_trap; } 525 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 526 case 2: 527 if ((entire_insn & 0xffff0000) == 0x21000000) 528 { itype = OR1K32BF_INSN_L_TRAP; goto extract_sfmt_l_trap; } 529 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 530 case 4: 531 if ((entire_insn & 0xffffffff) == 0x22000000) 532 { itype = OR1K32BF_INSN_L_MSYNC; goto extract_sfmt_l_msync; } 533 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 534 case 5: 535 if ((entire_insn & 0xffffffff) == 0x22800000) 536 { itype = OR1K32BF_INSN_L_PSYNC; goto extract_sfmt_l_msync; } 537 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 538 case 6: 539 if ((entire_insn & 0xffffffff) == 0x23000000) 540 { itype = OR1K32BF_INSN_L_CSYNC; goto extract_sfmt_l_msync; } 541 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 542 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 543 } 544 } 545 case 257: 546 case 258: 547 case 259: 548 case 260: 549 case 261: 550 case 262: 551 case 263: 552 case 264: 553 case 265: 554 case 266: 555 case 267: 556 case 268: 557 case 269: 558 case 270: 559 case 271: 560 case 272: 561 case 273: 562 case 274: 563 case 275: 564 case 276: 565 case 277: 566 case 278: 567 case 279: 568 case 280: 569 case 281: 570 case 282: 571 case 283: 572 case 284: 573 case 285: 574 case 286: 575 case 287: 576 { 577 unsigned int val1 = (((insn >> 24) & (1 << 0))); 578 switch (val1) 579 { 580 case 0: 581 if ((entire_insn & 0xffff0000) == 0x20000000) 582 { itype = OR1K32BF_INSN_L_SYS; goto extract_sfmt_l_trap; } 583 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 584 case 1: 585 if ((entire_insn & 0xffff0000) == 0x21000000) 586 { itype = OR1K32BF_INSN_L_TRAP; goto extract_sfmt_l_trap; } 587 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 588 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 589 } 590 } 591 case 288: 592 if ((entire_insn & 0xffffffff) == 0x24000000) 593 { itype = OR1K32BF_INSN_L_RFE; goto extract_sfmt_l_msync; } 594 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 595 case 544: 596 if ((entire_insn & 0xffff07ff) == 0x44000000) 597 { itype = OR1K32BF_INSN_L_JR; goto extract_sfmt_l_jr; } 598 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 599 case 576: 600 if ((entire_insn & 0xffff07ff) == 0x48000000) 601 { itype = OR1K32BF_INSN_L_JALR; goto extract_sfmt_l_jalr; } 602 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 603 case 608: 604 case 609: 605 case 610: 606 case 611: 607 case 612: 608 case 613: 609 case 614: 610 case 615: 611 case 616: 612 case 617: 613 case 618: 614 case 619: 615 case 620: 616 case 621: 617 case 622: 618 case 623: 619 case 624: 620 case 625: 621 case 626: 622 case 627: 623 case 628: 624 case 629: 625 case 630: 626 case 631: 627 case 632: 628 case 633: 629 case 634: 630 case 635: 631 case 636: 632 case 637: 633 case 638: 634 case 639: 635 if ((entire_insn & 0xffe00000) == 0x4c000000) 636 { itype = OR1K32BF_INSN_L_MACI; goto extract_sfmt_l_maci; } 637 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 638 case 864: 639 case 865: 640 case 866: 641 case 867: 642 case 868: 643 case 869: 644 case 870: 645 case 871: 646 case 872: 647 case 873: 648 case 874: 649 case 875: 650 case 876: 651 case 877: 652 case 878: 653 case 879: 654 case 880: 655 case 881: 656 case 882: 657 case 883: 658 case 884: 659 case 885: 660 case 886: 661 case 887: 662 case 888: 663 case 889: 664 case 890: 665 case 891: 666 case 892: 667 case 893: 668 case 894: 669 case 895: itype = OR1K32BF_INSN_L_LWA; goto extract_sfmt_l_lwa; 670 case 896: 671 if ((entire_insn & 0xffffffff) == 0x70000000) 672 { itype = OR1K32BF_INSN_L_CUST1; goto extract_sfmt_l_msync; } 673 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 674 case 928: 675 if ((entire_insn & 0xffffffff) == 0x74000000) 676 { itype = OR1K32BF_INSN_L_CUST2; goto extract_sfmt_l_msync; } 677 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 678 case 960: 679 if ((entire_insn & 0xffffffff) == 0x78000000) 680 { itype = OR1K32BF_INSN_L_CUST3; goto extract_sfmt_l_msync; } 681 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 682 case 992: 683 if ((entire_insn & 0xffffffff) == 0x7c000000) 684 { itype = OR1K32BF_INSN_L_CUST4; goto extract_sfmt_l_msync; } 685 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 686 case 1056: 687 case 1057: 688 case 1058: 689 case 1059: 690 case 1060: 691 case 1061: 692 case 1062: 693 case 1063: 694 case 1064: 695 case 1065: 696 case 1066: 697 case 1067: 698 case 1068: 699 case 1069: 700 case 1070: 701 case 1071: 702 case 1072: 703 case 1073: 704 case 1074: 705 case 1075: 706 case 1076: 707 case 1077: 708 case 1078: 709 case 1079: 710 case 1080: 711 case 1081: 712 case 1082: 713 case 1083: 714 case 1084: 715 case 1085: 716 case 1086: 717 case 1087: itype = OR1K32BF_INSN_L_LWZ; goto extract_sfmt_l_lwz; 718 case 1088: 719 case 1089: 720 case 1090: 721 case 1091: 722 case 1092: 723 case 1093: 724 case 1094: 725 case 1095: 726 case 1096: 727 case 1097: 728 case 1098: 729 case 1099: 730 case 1100: 731 case 1101: 732 case 1102: 733 case 1103: 734 case 1104: 735 case 1105: 736 case 1106: 737 case 1107: 738 case 1108: 739 case 1109: 740 case 1110: 741 case 1111: 742 case 1112: 743 case 1113: 744 case 1114: 745 case 1115: 746 case 1116: 747 case 1117: 748 case 1118: 749 case 1119: itype = OR1K32BF_INSN_L_LWS; goto extract_sfmt_l_lws; 750 case 1120: 751 case 1121: 752 case 1122: 753 case 1123: 754 case 1124: 755 case 1125: 756 case 1126: 757 case 1127: 758 case 1128: 759 case 1129: 760 case 1130: 761 case 1131: 762 case 1132: 763 case 1133: 764 case 1134: 765 case 1135: 766 case 1136: 767 case 1137: 768 case 1138: 769 case 1139: 770 case 1140: 771 case 1141: 772 case 1142: 773 case 1143: 774 case 1144: 775 case 1145: 776 case 1146: 777 case 1147: 778 case 1148: 779 case 1149: 780 case 1150: 781 case 1151: itype = OR1K32BF_INSN_L_LBZ; goto extract_sfmt_l_lbz; 782 case 1152: 783 case 1153: 784 case 1154: 785 case 1155: 786 case 1156: 787 case 1157: 788 case 1158: 789 case 1159: 790 case 1160: 791 case 1161: 792 case 1162: 793 case 1163: 794 case 1164: 795 case 1165: 796 case 1166: 797 case 1167: 798 case 1168: 799 case 1169: 800 case 1170: 801 case 1171: 802 case 1172: 803 case 1173: 804 case 1174: 805 case 1175: 806 case 1176: 807 case 1177: 808 case 1178: 809 case 1179: 810 case 1180: 811 case 1181: 812 case 1182: 813 case 1183: itype = OR1K32BF_INSN_L_LBS; goto extract_sfmt_l_lbs; 814 case 1184: 815 case 1185: 816 case 1186: 817 case 1187: 818 case 1188: 819 case 1189: 820 case 1190: 821 case 1191: 822 case 1192: 823 case 1193: 824 case 1194: 825 case 1195: 826 case 1196: 827 case 1197: 828 case 1198: 829 case 1199: 830 case 1200: 831 case 1201: 832 case 1202: 833 case 1203: 834 case 1204: 835 case 1205: 836 case 1206: 837 case 1207: 838 case 1208: 839 case 1209: 840 case 1210: 841 case 1211: 842 case 1212: 843 case 1213: 844 case 1214: 845 case 1215: itype = OR1K32BF_INSN_L_LHZ; goto extract_sfmt_l_lhz; 846 case 1216: 847 case 1217: 848 case 1218: 849 case 1219: 850 case 1220: 851 case 1221: 852 case 1222: 853 case 1223: 854 case 1224: 855 case 1225: 856 case 1226: 857 case 1227: 858 case 1228: 859 case 1229: 860 case 1230: 861 case 1231: 862 case 1232: 863 case 1233: 864 case 1234: 865 case 1235: 866 case 1236: 867 case 1237: 868 case 1238: 869 case 1239: 870 case 1240: 871 case 1241: 872 case 1242: 873 case 1243: 874 case 1244: 875 case 1245: 876 case 1246: 877 case 1247: itype = OR1K32BF_INSN_L_LHS; goto extract_sfmt_l_lhs; 878 case 1248: 879 case 1249: 880 case 1250: 881 case 1251: 882 case 1252: 883 case 1253: 884 case 1254: 885 case 1255: 886 case 1256: 887 case 1257: 888 case 1258: 889 case 1259: 890 case 1260: 891 case 1261: 892 case 1262: 893 case 1263: 894 case 1264: 895 case 1265: 896 case 1266: 897 case 1267: 898 case 1268: 899 case 1269: 900 case 1270: 901 case 1271: 902 case 1272: 903 case 1273: 904 case 1274: 905 case 1275: 906 case 1276: 907 case 1277: 908 case 1278: 909 case 1279: itype = OR1K32BF_INSN_L_ADDI; goto extract_sfmt_l_addi; 910 case 1280: 911 case 1281: 912 case 1282: 913 case 1283: 914 case 1284: 915 case 1285: 916 case 1286: 917 case 1287: 918 case 1288: 919 case 1289: 920 case 1290: 921 case 1291: 922 case 1292: 923 case 1293: 924 case 1294: 925 case 1295: 926 case 1296: 927 case 1297: 928 case 1298: 929 case 1299: 930 case 1300: 931 case 1301: 932 case 1302: 933 case 1303: 934 case 1304: 935 case 1305: 936 case 1306: 937 case 1307: 938 case 1308: 939 case 1309: 940 case 1310: 941 case 1311: itype = OR1K32BF_INSN_L_ADDIC; goto extract_sfmt_l_addic; 942 case 1312: 943 case 1313: 944 case 1314: 945 case 1315: 946 case 1316: 947 case 1317: 948 case 1318: 949 case 1319: 950 case 1320: 951 case 1321: 952 case 1322: 953 case 1323: 954 case 1324: 955 case 1325: 956 case 1326: 957 case 1327: 958 case 1328: 959 case 1329: 960 case 1330: 961 case 1331: 962 case 1332: 963 case 1333: 964 case 1334: 965 case 1335: 966 case 1336: 967 case 1337: 968 case 1338: 969 case 1339: 970 case 1340: 971 case 1341: 972 case 1342: 973 case 1343: itype = OR1K32BF_INSN_L_ANDI; goto extract_sfmt_l_mfspr; 974 case 1344: 975 case 1345: 976 case 1346: 977 case 1347: 978 case 1348: 979 case 1349: 980 case 1350: 981 case 1351: 982 case 1352: 983 case 1353: 984 case 1354: 985 case 1355: 986 case 1356: 987 case 1357: 988 case 1358: 989 case 1359: 990 case 1360: 991 case 1361: 992 case 1362: 993 case 1363: 994 case 1364: 995 case 1365: 996 case 1366: 997 case 1367: 998 case 1368: 999 case 1369: 1000 case 1370: 1001 case 1371: 1002 case 1372: 1003 case 1373: 1004 case 1374: 1005 case 1375: itype = OR1K32BF_INSN_L_ORI; goto extract_sfmt_l_mfspr; 1006 case 1376: 1007 case 1377: 1008 case 1378: 1009 case 1379: 1010 case 1380: 1011 case 1381: 1012 case 1382: 1013 case 1383: 1014 case 1384: 1015 case 1385: 1016 case 1386: 1017 case 1387: 1018 case 1388: 1019 case 1389: 1020 case 1390: 1021 case 1391: 1022 case 1392: 1023 case 1393: 1024 case 1394: 1025 case 1395: 1026 case 1396: 1027 case 1397: 1028 case 1398: 1029 case 1399: 1030 case 1400: 1031 case 1401: 1032 case 1402: 1033 case 1403: 1034 case 1404: 1035 case 1405: 1036 case 1406: 1037 case 1407: itype = OR1K32BF_INSN_L_XORI; goto extract_sfmt_l_xori; 1038 case 1408: 1039 case 1409: 1040 case 1410: 1041 case 1411: 1042 case 1412: 1043 case 1413: 1044 case 1414: 1045 case 1415: 1046 case 1416: 1047 case 1417: 1048 case 1418: 1049 case 1419: 1050 case 1420: 1051 case 1421: 1052 case 1422: 1053 case 1423: 1054 case 1424: 1055 case 1425: 1056 case 1426: 1057 case 1427: 1058 case 1428: 1059 case 1429: 1060 case 1430: 1061 case 1431: 1062 case 1432: 1063 case 1433: 1064 case 1434: 1065 case 1435: 1066 case 1436: 1067 case 1437: 1068 case 1438: 1069 case 1439: itype = OR1K32BF_INSN_L_MULI; goto extract_sfmt_l_muli; 1070 case 1440: 1071 case 1441: 1072 case 1442: 1073 case 1443: 1074 case 1444: 1075 case 1445: 1076 case 1446: 1077 case 1447: 1078 case 1448: 1079 case 1449: 1080 case 1450: 1081 case 1451: 1082 case 1452: 1083 case 1453: 1084 case 1454: 1085 case 1455: 1086 case 1456: 1087 case 1457: 1088 case 1458: 1089 case 1459: 1090 case 1460: 1091 case 1461: 1092 case 1462: 1093 case 1463: 1094 case 1464: 1095 case 1465: 1096 case 1466: 1097 case 1467: 1098 case 1468: 1099 case 1469: 1100 case 1470: 1101 case 1471: itype = OR1K32BF_INSN_L_MFSPR; goto extract_sfmt_l_mfspr; 1102 case 1472: 1103 case 1473: 1104 case 1474: 1105 case 1475: 1106 case 1476: 1107 case 1477: 1108 case 1478: 1109 case 1479: 1110 case 1480: 1111 case 1481: 1112 case 1482: 1113 case 1483: 1114 case 1484: 1115 case 1485: 1116 case 1486: 1117 case 1487: 1118 case 1488: 1119 case 1489: 1120 case 1490: 1121 case 1491: 1122 case 1492: 1123 case 1493: 1124 case 1494: 1125 case 1495: 1126 case 1496: 1127 case 1497: 1128 case 1498: 1129 case 1499: 1130 case 1500: 1131 case 1501: 1132 case 1502: 1133 case 1503: 1134 { 1135 unsigned int val1 = (((insn >> 6) & (3 << 0))); 1136 switch (val1) 1137 { 1138 case 0: 1139 if ((entire_insn & 0xfc00ffc0) == 0xb8000000) 1140 { itype = OR1K32BF_INSN_L_SLLI; goto extract_sfmt_l_slli; } 1141 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1142 case 1: 1143 if ((entire_insn & 0xfc00ffc0) == 0xb8000040) 1144 { itype = OR1K32BF_INSN_L_SRLI; goto extract_sfmt_l_slli; } 1145 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1146 case 2: 1147 if ((entire_insn & 0xfc00ffc0) == 0xb8000080) 1148 { itype = OR1K32BF_INSN_L_SRAI; goto extract_sfmt_l_slli; } 1149 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1150 case 3: 1151 if ((entire_insn & 0xfc00ffc0) == 0xb80000c0) 1152 { itype = OR1K32BF_INSN_L_RORI; goto extract_sfmt_l_slli; } 1153 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1154 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1155 } 1156 } 1157 case 1504: 1158 case 1505: 1159 case 1506: 1160 case 1507: 1161 case 1508: 1162 case 1509: 1163 case 1510: 1164 case 1511: 1165 case 1512: 1166 case 1513: 1167 case 1514: 1168 case 1515: 1169 case 1516: 1170 case 1517: 1171 case 1518: 1172 case 1519: 1173 case 1520: 1174 case 1521: 1175 case 1522: 1176 case 1523: 1177 case 1524: 1178 case 1525: 1179 case 1526: 1180 case 1527: 1181 case 1528: 1182 case 1529: 1183 case 1530: 1184 case 1531: 1185 case 1532: 1186 case 1533: 1187 case 1534: 1188 case 1535: 1189 { 1190 unsigned int val1 = (((insn >> 21) & (15 << 0))); 1191 switch (val1) 1192 { 1193 case 0: 1194 if ((entire_insn & 0xffe00000) == 0xbc000000) 1195 { itype = OR1K32BF_INSN_L_SFEQI; goto extract_sfmt_l_sfgtsi; } 1196 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1197 case 1: 1198 if ((entire_insn & 0xffe00000) == 0xbc200000) 1199 { itype = OR1K32BF_INSN_L_SFNEI; goto extract_sfmt_l_sfgtsi; } 1200 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1201 case 2: 1202 if ((entire_insn & 0xffe00000) == 0xbc400000) 1203 { itype = OR1K32BF_INSN_L_SFGTUI; goto extract_sfmt_l_sfgtsi; } 1204 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1205 case 3: 1206 if ((entire_insn & 0xffe00000) == 0xbc600000) 1207 { itype = OR1K32BF_INSN_L_SFGEUI; goto extract_sfmt_l_sfgtsi; } 1208 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1209 case 4: 1210 if ((entire_insn & 0xffe00000) == 0xbc800000) 1211 { itype = OR1K32BF_INSN_L_SFLTUI; goto extract_sfmt_l_sfgtsi; } 1212 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1213 case 5: 1214 if ((entire_insn & 0xffe00000) == 0xbca00000) 1215 { itype = OR1K32BF_INSN_L_SFLEUI; goto extract_sfmt_l_sfgtsi; } 1216 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1217 case 10: 1218 if ((entire_insn & 0xffe00000) == 0xbd400000) 1219 { itype = OR1K32BF_INSN_L_SFGTSI; goto extract_sfmt_l_sfgtsi; } 1220 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1221 case 11: 1222 if ((entire_insn & 0xffe00000) == 0xbd600000) 1223 { itype = OR1K32BF_INSN_L_SFGESI; goto extract_sfmt_l_sfgtsi; } 1224 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1225 case 12: 1226 if ((entire_insn & 0xffe00000) == 0xbd800000) 1227 { itype = OR1K32BF_INSN_L_SFLTSI; goto extract_sfmt_l_sfgtsi; } 1228 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1229 case 13: 1230 if ((entire_insn & 0xffe00000) == 0xbda00000) 1231 { itype = OR1K32BF_INSN_L_SFLESI; goto extract_sfmt_l_sfgtsi; } 1232 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1233 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1234 } 1235 } 1236 case 1536: 1237 case 1537: 1238 case 1538: 1239 case 1539: 1240 case 1540: 1241 case 1541: 1242 case 1542: 1243 case 1543: 1244 case 1544: 1245 case 1545: 1246 case 1546: 1247 case 1547: 1248 case 1548: 1249 case 1549: 1250 case 1550: 1251 case 1551: 1252 case 1552: 1253 case 1553: 1254 case 1554: 1255 case 1555: 1256 case 1556: 1257 case 1557: 1258 case 1558: 1259 case 1559: 1260 case 1560: 1261 case 1561: 1262 case 1562: 1263 case 1563: 1264 case 1564: 1265 case 1565: 1266 case 1566: 1267 case 1567: itype = OR1K32BF_INSN_L_MTSPR; goto extract_sfmt_l_mtspr; 1268 case 1569: 1269 if ((entire_insn & 0xffe007ff) == 0xc4000001) 1270 { itype = OR1K32BF_INSN_L_MAC; goto extract_sfmt_l_mac; } 1271 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1272 case 1570: 1273 if ((entire_insn & 0xffe007ff) == 0xc4000002) 1274 { itype = OR1K32BF_INSN_L_MSB; goto extract_sfmt_l_mac; } 1275 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1276 case 1571: 1277 if ((entire_insn & 0xffe007ff) == 0xc4000003) 1278 { itype = OR1K32BF_INSN_L_MACU; goto extract_sfmt_l_macu; } 1279 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1280 case 1572: 1281 if ((entire_insn & 0xffe007ff) == 0xc4000004) 1282 { itype = OR1K32BF_INSN_L_MSBU; goto extract_sfmt_l_macu; } 1283 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1284 case 1600: 1285 { 1286 unsigned int val1 = (((insn >> 5) & (7 << 0))); 1287 switch (val1) 1288 { 1289 case 0: 1290 if ((entire_insn & 0xfc0007ff) == 0xc8000000) 1291 { itype = OR1K32BF_INSN_LF_ADD_S; goto extract_sfmt_lf_add_s; } 1292 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1293 case 7: 1294 if ((entire_insn & 0xffe004ff) == 0xc80000e0) 1295 { itype = OR1K32BF_INSN_LF_CUST1_D32; goto extract_sfmt_l_msync; } 1296 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1297 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1298 } 1299 } 1300 case 1601: 1301 if ((entire_insn & 0xfc0007ff) == 0xc8000001) 1302 { itype = OR1K32BF_INSN_LF_SUB_S; goto extract_sfmt_lf_add_s; } 1303 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1304 case 1602: 1305 if ((entire_insn & 0xfc0007ff) == 0xc8000002) 1306 { itype = OR1K32BF_INSN_LF_MUL_S; goto extract_sfmt_lf_add_s; } 1307 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1308 case 1603: 1309 if ((entire_insn & 0xfc0007ff) == 0xc8000003) 1310 { itype = OR1K32BF_INSN_LF_DIV_S; goto extract_sfmt_lf_add_s; } 1311 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1312 case 1604: 1313 if ((entire_insn & 0xfc00ffff) == 0xc8000004) 1314 { itype = OR1K32BF_INSN_LF_ITOF_S; goto extract_sfmt_lf_itof_s; } 1315 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1316 case 1605: 1317 if ((entire_insn & 0xfc00ffff) == 0xc8000005) 1318 { itype = OR1K32BF_INSN_LF_FTOI_S; goto extract_sfmt_lf_ftoi_s; } 1319 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1320 case 1606: 1321 if ((entire_insn & 0xfc0007ff) == 0xc8000006) 1322 { itype = OR1K32BF_INSN_LF_REM_S; goto extract_sfmt_lf_add_s; } 1323 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1324 case 1607: 1325 if ((entire_insn & 0xfc0007ff) == 0xc8000007) 1326 { itype = OR1K32BF_INSN_LF_MADD_S; goto extract_sfmt_lf_madd_s; } 1327 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1328 case 1608: 1329 { 1330 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1331 switch (val1) 1332 { 1333 case 0: 1334 if ((entire_insn & 0xffe007ff) == 0xc8000008) 1335 { itype = OR1K32BF_INSN_LF_SFEQ_S; goto extract_sfmt_lf_sfeq_s; } 1336 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1337 case 1: 1338 if ((entire_insn & 0xffe007ff) == 0xc8000028) 1339 { itype = OR1K32BF_INSN_LF_SFUEQ_S; goto extract_sfmt_lf_sfeq_s; } 1340 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1341 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1342 } 1343 } 1344 case 1609: 1345 { 1346 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1347 switch (val1) 1348 { 1349 case 0: 1350 if ((entire_insn & 0xffe007ff) == 0xc8000009) 1351 { itype = OR1K32BF_INSN_LF_SFNE_S; goto extract_sfmt_lf_sfeq_s; } 1352 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1353 case 1: 1354 if ((entire_insn & 0xffe007ff) == 0xc8000029) 1355 { itype = OR1K32BF_INSN_LF_SFUNE_S; goto extract_sfmt_lf_sfeq_s; } 1356 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1357 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1358 } 1359 } 1360 case 1610: 1361 { 1362 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1363 switch (val1) 1364 { 1365 case 0: 1366 if ((entire_insn & 0xffe007ff) == 0xc800000a) 1367 { itype = OR1K32BF_INSN_LF_SFGT_S; goto extract_sfmt_lf_sfeq_s; } 1368 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1369 case 1: 1370 if ((entire_insn & 0xffe007ff) == 0xc800002a) 1371 { itype = OR1K32BF_INSN_LF_SFUGT_S; goto extract_sfmt_lf_sfeq_s; } 1372 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1373 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1374 } 1375 } 1376 case 1611: 1377 { 1378 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1379 switch (val1) 1380 { 1381 case 0: 1382 if ((entire_insn & 0xffe007ff) == 0xc800000b) 1383 { itype = OR1K32BF_INSN_LF_SFGE_S; goto extract_sfmt_lf_sfeq_s; } 1384 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1385 case 1: 1386 if ((entire_insn & 0xffe007ff) == 0xc800002b) 1387 { itype = OR1K32BF_INSN_LF_SFUGE_S; goto extract_sfmt_lf_sfeq_s; } 1388 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1389 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1390 } 1391 } 1392 case 1612: 1393 { 1394 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1395 switch (val1) 1396 { 1397 case 0: 1398 if ((entire_insn & 0xffe007ff) == 0xc800000c) 1399 { itype = OR1K32BF_INSN_LF_SFLT_S; goto extract_sfmt_lf_sfeq_s; } 1400 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1401 case 1: 1402 if ((entire_insn & 0xffe007ff) == 0xc800002c) 1403 { itype = OR1K32BF_INSN_LF_SFULT_S; goto extract_sfmt_lf_sfeq_s; } 1404 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1405 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1406 } 1407 } 1408 case 1613: 1409 { 1410 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1411 switch (val1) 1412 { 1413 case 0: 1414 if ((entire_insn & 0xffe007ff) == 0xc800000d) 1415 { itype = OR1K32BF_INSN_LF_SFLE_S; goto extract_sfmt_lf_sfeq_s; } 1416 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1417 case 1: 1418 if ((entire_insn & 0xffe007ff) == 0xc800002d) 1419 { itype = OR1K32BF_INSN_LF_SFULE_S; goto extract_sfmt_lf_sfeq_s; } 1420 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1421 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1422 } 1423 } 1424 case 1614: 1425 if ((entire_insn & 0xffe007ff) == 0xc800002e) 1426 { itype = OR1K32BF_INSN_LF_SFUN_S; goto extract_sfmt_lf_sfeq_s; } 1427 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1428 case 1616: 1429 { 1430 unsigned int val1 = (((insn >> 6) & (3 << 0))); 1431 switch (val1) 1432 { 1433 case 0: 1434 if ((entire_insn & 0xfc0000ff) == 0xc8000010) 1435 { itype = OR1K32BF_INSN_LF_ADD_D32; goto extract_sfmt_lf_add_d32; } 1436 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1437 case 3: 1438 if ((entire_insn & 0xffe007ff) == 0xc80000d0) 1439 { itype = OR1K32BF_INSN_LF_CUST1_S; goto extract_sfmt_l_msync; } 1440 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1441 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1442 } 1443 } 1444 case 1617: 1445 if ((entire_insn & 0xfc0000ff) == 0xc8000011) 1446 { itype = OR1K32BF_INSN_LF_SUB_D32; goto extract_sfmt_lf_add_d32; } 1447 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1448 case 1618: 1449 if ((entire_insn & 0xfc0000ff) == 0xc8000012) 1450 { itype = OR1K32BF_INSN_LF_MUL_D32; goto extract_sfmt_lf_add_d32; } 1451 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1452 case 1619: 1453 if ((entire_insn & 0xfc0000ff) == 0xc8000013) 1454 { itype = OR1K32BF_INSN_LF_DIV_D32; goto extract_sfmt_lf_add_d32; } 1455 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1456 case 1620: 1457 if ((entire_insn & 0xfc00f9ff) == 0xc8000014) 1458 { itype = OR1K32BF_INSN_LF_ITOF_D32; goto extract_sfmt_lf_itof_d32; } 1459 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1460 case 1621: 1461 if ((entire_insn & 0xfc00f9ff) == 0xc8000015) 1462 { itype = OR1K32BF_INSN_LF_FTOI_D32; goto extract_sfmt_lf_ftoi_d32; } 1463 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1464 case 1622: 1465 if ((entire_insn & 0xfc0000ff) == 0xc8000016) 1466 { itype = OR1K32BF_INSN_LF_REM_D32; goto extract_sfmt_lf_add_d32; } 1467 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1468 case 1623: 1469 if ((entire_insn & 0xfc0000ff) == 0xc8000017) 1470 { itype = OR1K32BF_INSN_LF_MADD_D32; goto extract_sfmt_lf_madd_d32; } 1471 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1472 case 1624: 1473 { 1474 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1475 switch (val1) 1476 { 1477 case 0: 1478 if ((entire_insn & 0xffe004ff) == 0xc8000018) 1479 { itype = OR1K32BF_INSN_LF_SFEQ_D32; goto extract_sfmt_lf_sfeq_d32; } 1480 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1481 case 1: 1482 if ((entire_insn & 0xffe004ff) == 0xc8000038) 1483 { itype = OR1K32BF_INSN_LF_SFUEQ_D32; goto extract_sfmt_lf_sfeq_d32; } 1484 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1485 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1486 } 1487 } 1488 case 1625: 1489 { 1490 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1491 switch (val1) 1492 { 1493 case 0: 1494 if ((entire_insn & 0xffe004ff) == 0xc8000019) 1495 { itype = OR1K32BF_INSN_LF_SFNE_D32; goto extract_sfmt_lf_sfeq_d32; } 1496 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1497 case 1: 1498 if ((entire_insn & 0xffe004ff) == 0xc8000039) 1499 { itype = OR1K32BF_INSN_LF_SFUNE_D32; goto extract_sfmt_lf_sfeq_d32; } 1500 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1501 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1502 } 1503 } 1504 case 1626: 1505 { 1506 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1507 switch (val1) 1508 { 1509 case 0: 1510 if ((entire_insn & 0xffe004ff) == 0xc800001a) 1511 { itype = OR1K32BF_INSN_LF_SFGT_D32; goto extract_sfmt_lf_sfeq_d32; } 1512 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1513 case 1: 1514 if ((entire_insn & 0xffe004ff) == 0xc800003a) 1515 { itype = OR1K32BF_INSN_LF_SFUGT_D32; goto extract_sfmt_lf_sfeq_d32; } 1516 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1517 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1518 } 1519 } 1520 case 1627: 1521 { 1522 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1523 switch (val1) 1524 { 1525 case 0: 1526 if ((entire_insn & 0xffe004ff) == 0xc800001b) 1527 { itype = OR1K32BF_INSN_LF_SFGE_D32; goto extract_sfmt_lf_sfeq_d32; } 1528 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1529 case 1: 1530 if ((entire_insn & 0xffe004ff) == 0xc800003b) 1531 { itype = OR1K32BF_INSN_LF_SFUGE_D32; goto extract_sfmt_lf_sfeq_d32; } 1532 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1533 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1534 } 1535 } 1536 case 1628: 1537 { 1538 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1539 switch (val1) 1540 { 1541 case 0: 1542 if ((entire_insn & 0xffe004ff) == 0xc800001c) 1543 { itype = OR1K32BF_INSN_LF_SFLT_D32; goto extract_sfmt_lf_sfeq_d32; } 1544 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1545 case 1: 1546 if ((entire_insn & 0xffe004ff) == 0xc800003c) 1547 { itype = OR1K32BF_INSN_LF_SFULT_D32; goto extract_sfmt_lf_sfeq_d32; } 1548 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1549 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1550 } 1551 } 1552 case 1629: 1553 { 1554 unsigned int val1 = (((insn >> 5) & (1 << 0))); 1555 switch (val1) 1556 { 1557 case 0: 1558 if ((entire_insn & 0xffe004ff) == 0xc800001d) 1559 { itype = OR1K32BF_INSN_LF_SFLE_D32; goto extract_sfmt_lf_sfeq_d32; } 1560 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1561 case 1: 1562 if ((entire_insn & 0xffe004ff) == 0xc800003d) 1563 { itype = OR1K32BF_INSN_LF_SFULE_D32; goto extract_sfmt_lf_sfeq_d32; } 1564 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1565 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1566 } 1567 } 1568 case 1630: 1569 if ((entire_insn & 0xffe004ff) == 0xc800003e) 1570 { itype = OR1K32BF_INSN_LF_SFUN_D32; goto extract_sfmt_lf_sfeq_d32; } 1571 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1572 case 1632: 1573 case 1633: 1574 case 1634: 1575 case 1635: 1576 case 1636: 1577 case 1637: 1578 case 1638: 1579 case 1639: 1580 case 1640: 1581 case 1641: 1582 case 1642: 1583 case 1643: 1584 case 1644: 1585 case 1645: 1586 case 1646: 1587 case 1647: 1588 case 1648: 1589 case 1649: 1590 case 1650: 1591 case 1651: 1592 case 1652: 1593 case 1653: 1594 case 1654: 1595 case 1655: 1596 case 1656: 1597 case 1657: 1598 case 1658: 1599 case 1659: 1600 case 1660: 1601 case 1661: 1602 case 1662: 1603 case 1663: itype = OR1K32BF_INSN_L_SWA; goto extract_sfmt_l_swa; 1604 case 1696: 1605 case 1697: 1606 case 1698: 1607 case 1699: 1608 case 1700: 1609 case 1701: 1610 case 1702: 1611 case 1703: 1612 case 1704: 1613 case 1705: 1614 case 1706: 1615 case 1707: 1616 case 1708: 1617 case 1709: 1618 case 1710: 1619 case 1711: 1620 case 1712: 1621 case 1713: 1622 case 1714: 1623 case 1715: 1624 case 1716: 1625 case 1717: 1626 case 1718: 1627 case 1719: 1628 case 1720: 1629 case 1721: 1630 case 1722: 1631 case 1723: 1632 case 1724: 1633 case 1725: 1634 case 1726: 1635 case 1727: itype = OR1K32BF_INSN_L_SW; goto extract_sfmt_l_sw; 1636 case 1728: 1637 case 1729: 1638 case 1730: 1639 case 1731: 1640 case 1732: 1641 case 1733: 1642 case 1734: 1643 case 1735: 1644 case 1736: 1645 case 1737: 1646 case 1738: 1647 case 1739: 1648 case 1740: 1649 case 1741: 1650 case 1742: 1651 case 1743: 1652 case 1744: 1653 case 1745: 1654 case 1746: 1655 case 1747: 1656 case 1748: 1657 case 1749: 1658 case 1750: 1659 case 1751: 1660 case 1752: 1661 case 1753: 1662 case 1754: 1663 case 1755: 1664 case 1756: 1665 case 1757: 1666 case 1758: 1667 case 1759: itype = OR1K32BF_INSN_L_SB; goto extract_sfmt_l_sb; 1668 case 1760: 1669 case 1761: 1670 case 1762: 1671 case 1763: 1672 case 1764: 1673 case 1765: 1674 case 1766: 1675 case 1767: 1676 case 1768: 1677 case 1769: 1678 case 1770: 1679 case 1771: 1680 case 1772: 1681 case 1773: 1682 case 1774: 1683 case 1775: 1684 case 1776: 1685 case 1777: 1686 case 1778: 1687 case 1779: 1688 case 1780: 1689 case 1781: 1690 case 1782: 1691 case 1783: 1692 case 1784: 1693 case 1785: 1694 case 1786: 1695 case 1787: 1696 case 1788: 1697 case 1789: 1698 case 1790: 1699 case 1791: itype = OR1K32BF_INSN_L_SH; goto extract_sfmt_l_sh; 1700 case 1792: 1701 if ((entire_insn & 0xfc0007ff) == 0xe0000000) 1702 { itype = OR1K32BF_INSN_L_ADD; goto extract_sfmt_l_add; } 1703 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1704 case 1793: 1705 if ((entire_insn & 0xfc0007ff) == 0xe0000001) 1706 { itype = OR1K32BF_INSN_L_ADDC; goto extract_sfmt_l_addc; } 1707 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1708 case 1794: 1709 if ((entire_insn & 0xfc0007ff) == 0xe0000002) 1710 { itype = OR1K32BF_INSN_L_SUB; goto extract_sfmt_l_add; } 1711 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1712 case 1795: 1713 if ((entire_insn & 0xfc0007ff) == 0xe0000003) 1714 { itype = OR1K32BF_INSN_L_AND; goto extract_sfmt_l_and; } 1715 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1716 case 1796: 1717 if ((entire_insn & 0xfc0007ff) == 0xe0000004) 1718 { itype = OR1K32BF_INSN_L_OR; goto extract_sfmt_l_and; } 1719 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1720 case 1797: 1721 if ((entire_insn & 0xfc0007ff) == 0xe0000005) 1722 { itype = OR1K32BF_INSN_L_XOR; goto extract_sfmt_l_and; } 1723 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1724 case 1798: 1725 if ((entire_insn & 0xfc0007ff) == 0xe0000306) 1726 { itype = OR1K32BF_INSN_L_MUL; goto extract_sfmt_l_mul; } 1727 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1728 case 1799: 1729 if ((entire_insn & 0xffe007ff) == 0xe0000307) 1730 { itype = OR1K32BF_INSN_L_MULD; goto extract_sfmt_l_muld; } 1731 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1732 case 1800: 1733 { 1734 unsigned int val1 = (((insn >> 6) & (3 << 0))); 1735 switch (val1) 1736 { 1737 case 0: 1738 if ((entire_insn & 0xfc0007ff) == 0xe0000008) 1739 { itype = OR1K32BF_INSN_L_SLL; goto extract_sfmt_l_sll; } 1740 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1741 case 1: 1742 if ((entire_insn & 0xfc0007ff) == 0xe0000048) 1743 { itype = OR1K32BF_INSN_L_SRL; goto extract_sfmt_l_sll; } 1744 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1745 case 2: 1746 if ((entire_insn & 0xfc0007ff) == 0xe0000088) 1747 { itype = OR1K32BF_INSN_L_SRA; goto extract_sfmt_l_sll; } 1748 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1749 case 3: 1750 if ((entire_insn & 0xfc0007ff) == 0xe00000c8) 1751 { itype = OR1K32BF_INSN_L_ROR; goto extract_sfmt_l_sll; } 1752 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1753 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1754 } 1755 } 1756 case 1801: 1757 if ((entire_insn & 0xfc0007ff) == 0xe0000309) 1758 { itype = OR1K32BF_INSN_L_DIV; goto extract_sfmt_l_div; } 1759 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1760 case 1802: 1761 if ((entire_insn & 0xfc0007ff) == 0xe000030a) 1762 { itype = OR1K32BF_INSN_L_DIVU; goto extract_sfmt_l_divu; } 1763 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1764 case 1803: 1765 if ((entire_insn & 0xfc0007ff) == 0xe000030b) 1766 { itype = OR1K32BF_INSN_L_MULU; goto extract_sfmt_l_mulu; } 1767 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1768 case 1804: 1769 { 1770 unsigned int val1 = (((insn >> 6) & (3 << 0))); 1771 switch (val1) 1772 { 1773 case 0: 1774 if ((entire_insn & 0xfc00ffff) == 0xe000000c) 1775 { itype = OR1K32BF_INSN_L_EXTHS; goto extract_sfmt_l_exths; } 1776 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1777 case 1: 1778 if ((entire_insn & 0xfc00ffff) == 0xe000004c) 1779 { itype = OR1K32BF_INSN_L_EXTBS; goto extract_sfmt_l_exths; } 1780 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1781 case 2: 1782 if ((entire_insn & 0xfc00ffff) == 0xe000008c) 1783 { itype = OR1K32BF_INSN_L_EXTHZ; goto extract_sfmt_l_exths; } 1784 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1785 case 3: 1786 if ((entire_insn & 0xfc00ffff) == 0xe00000cc) 1787 { itype = OR1K32BF_INSN_L_EXTBZ; goto extract_sfmt_l_exths; } 1788 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1789 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1790 } 1791 } 1792 case 1805: 1793 { 1794 unsigned int val1 = (((insn >> 7) & (3 << 1)) | ((insn >> 6) & (1 << 0))); 1795 switch (val1) 1796 { 1797 case 0: 1798 if ((entire_insn & 0xfc00ffff) == 0xe000000d) 1799 { itype = OR1K32BF_INSN_L_EXTWS; goto extract_sfmt_l_exths; } 1800 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1801 case 1: 1802 if ((entire_insn & 0xfc00ffff) == 0xe000004d) 1803 { itype = OR1K32BF_INSN_L_EXTWZ; goto extract_sfmt_l_exths; } 1804 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1805 case 6: 1806 if ((entire_insn & 0xffe007ff) == 0xe000030d) 1807 { itype = OR1K32BF_INSN_L_MULDU; goto extract_sfmt_l_muld; } 1808 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1809 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1810 } 1811 } 1812 case 1806: 1813 if ((entire_insn & 0xfc0007ff) == 0xe000000e) 1814 { itype = OR1K32BF_INSN_L_CMOV; goto extract_sfmt_l_cmov; } 1815 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1816 case 1807: 1817 { 1818 unsigned int val1 = (((insn >> 8) & (1 << 0))); 1819 switch (val1) 1820 { 1821 case 0: 1822 if ((entire_insn & 0xfc0007ff) == 0xe000000f) 1823 { itype = OR1K32BF_INSN_L_FF1; goto extract_sfmt_l_ff1; } 1824 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1825 case 1: 1826 if ((entire_insn & 0xfc0007ff) == 0xe000010f) 1827 { itype = OR1K32BF_INSN_L_FL1; goto extract_sfmt_l_ff1; } 1828 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1829 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1830 } 1831 } 1832 case 1824: 1833 { 1834 unsigned int val1 = (((insn >> 21) & (15 << 0))); 1835 switch (val1) 1836 { 1837 case 0: 1838 if ((entire_insn & 0xffe007ff) == 0xe4000000) 1839 { itype = OR1K32BF_INSN_L_SFEQ; goto extract_sfmt_l_sfgts; } 1840 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1841 case 1: 1842 if ((entire_insn & 0xffe007ff) == 0xe4200000) 1843 { itype = OR1K32BF_INSN_L_SFNE; goto extract_sfmt_l_sfgts; } 1844 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1845 case 2: 1846 if ((entire_insn & 0xffe007ff) == 0xe4400000) 1847 { itype = OR1K32BF_INSN_L_SFGTU; goto extract_sfmt_l_sfgts; } 1848 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1849 case 3: 1850 if ((entire_insn & 0xffe007ff) == 0xe4600000) 1851 { itype = OR1K32BF_INSN_L_SFGEU; goto extract_sfmt_l_sfgts; } 1852 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1853 case 4: 1854 if ((entire_insn & 0xffe007ff) == 0xe4800000) 1855 { itype = OR1K32BF_INSN_L_SFLTU; goto extract_sfmt_l_sfgts; } 1856 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1857 case 5: 1858 if ((entire_insn & 0xffe007ff) == 0xe4a00000) 1859 { itype = OR1K32BF_INSN_L_SFLEU; goto extract_sfmt_l_sfgts; } 1860 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1861 case 10: 1862 if ((entire_insn & 0xffe007ff) == 0xe5400000) 1863 { itype = OR1K32BF_INSN_L_SFGTS; goto extract_sfmt_l_sfgts; } 1864 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1865 case 11: 1866 if ((entire_insn & 0xffe007ff) == 0xe5600000) 1867 { itype = OR1K32BF_INSN_L_SFGES; goto extract_sfmt_l_sfgts; } 1868 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1869 case 12: 1870 if ((entire_insn & 0xffe007ff) == 0xe5800000) 1871 { itype = OR1K32BF_INSN_L_SFLTS; goto extract_sfmt_l_sfgts; } 1872 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1873 case 13: 1874 if ((entire_insn & 0xffe007ff) == 0xe5a00000) 1875 { itype = OR1K32BF_INSN_L_SFLES; goto extract_sfmt_l_sfgts; } 1876 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1877 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1878 } 1879 } 1880 case 1920: 1881 if ((entire_insn & 0xffffffff) == 0xf0000000) 1882 { itype = OR1K32BF_INSN_L_CUST5; goto extract_sfmt_l_msync; } 1883 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1884 case 1952: 1885 if ((entire_insn & 0xffffffff) == 0xf4000000) 1886 { itype = OR1K32BF_INSN_L_CUST6; goto extract_sfmt_l_msync; } 1887 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1888 case 1984: 1889 if ((entire_insn & 0xffffffff) == 0xf8000000) 1890 { itype = OR1K32BF_INSN_L_CUST7; goto extract_sfmt_l_msync; } 1891 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1892 case 2016: 1893 if ((entire_insn & 0xffffffff) == 0xfc000000) 1894 { itype = OR1K32BF_INSN_L_CUST8; goto extract_sfmt_l_msync; } 1895 itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1896 default: itype = OR1K32BF_INSN_X_INVALID; goto extract_sfmt_empty; 1897 } 1898 } 1899 } 1900 1901 /* The instruction has been decoded, now extract the fields. */ 1902 1903 extract_sfmt_empty: 1904 { 1905 const IDESC *idesc = &or1k32bf_insn_data[itype]; 1906 #define FLD(f) abuf->fields.sfmt_empty.f 1907 1908 1909 /* Record the fields for the semantic handler. */ 1910 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); 1911 1912 #undef FLD 1913 return idesc; 1914 } 1915 1916 extract_sfmt_l_j: 1917 { 1918 const IDESC *idesc = &or1k32bf_insn_data[itype]; 1919 CGEN_INSN_WORD insn = entire_insn; 1920 #define FLD(f) abuf->fields.sfmt_l_j.f 1921 USI f_disp26; 1922 1923 f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) * (4))) + (pc)); 1924 1925 /* Record the fields for the semantic handler. */ 1926 FLD (i_disp26) = f_disp26; 1927 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_j", "disp26 0x%x", 'x', f_disp26, (char *) 0)); 1928 1929 #undef FLD 1930 return idesc; 1931 } 1932 1933 extract_sfmt_l_adrp: 1934 { 1935 const IDESC *idesc = &or1k32bf_insn_data[itype]; 1936 CGEN_INSN_WORD insn = entire_insn; 1937 #define FLD(f) abuf->fields.sfmt_l_adrp.f 1938 UINT f_r1; 1939 USI f_disp21; 1940 1941 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 1942 f_disp21 = ((((EXTRACT_LSB0_SINT (insn, 32, 20, 21)) + (((SI) (pc) >> (13))))) * (8192)); 1943 1944 /* Record the fields for the semantic handler. */ 1945 FLD (f_r1) = f_r1; 1946 FLD (i_disp21) = f_disp21; 1947 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_adrp", "f_r1 0x%x", 'x', f_r1, "disp21 0x%x", 'x', f_disp21, (char *) 0)); 1948 1949 #undef FLD 1950 return idesc; 1951 } 1952 1953 extract_sfmt_l_jal: 1954 { 1955 const IDESC *idesc = &or1k32bf_insn_data[itype]; 1956 CGEN_INSN_WORD insn = entire_insn; 1957 #define FLD(f) abuf->fields.sfmt_l_j.f 1958 USI f_disp26; 1959 1960 f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) * (4))) + (pc)); 1961 1962 /* Record the fields for the semantic handler. */ 1963 FLD (i_disp26) = f_disp26; 1964 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jal", "disp26 0x%x", 'x', f_disp26, (char *) 0)); 1965 1966 #undef FLD 1967 return idesc; 1968 } 1969 1970 extract_sfmt_l_jr: 1971 { 1972 const IDESC *idesc = &or1k32bf_insn_data[itype]; 1973 CGEN_INSN_WORD insn = entire_insn; 1974 #define FLD(f) abuf->fields.sfmt_l_sll.f 1975 UINT f_r3; 1976 1977 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 1978 1979 /* Record the fields for the semantic handler. */ 1980 FLD (f_r3) = f_r3; 1981 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jr", "f_r3 0x%x", 'x', f_r3, (char *) 0)); 1982 1983 #undef FLD 1984 return idesc; 1985 } 1986 1987 extract_sfmt_l_jalr: 1988 { 1989 const IDESC *idesc = &or1k32bf_insn_data[itype]; 1990 CGEN_INSN_WORD insn = entire_insn; 1991 #define FLD(f) abuf->fields.sfmt_l_sll.f 1992 UINT f_r3; 1993 1994 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 1995 1996 /* Record the fields for the semantic handler. */ 1997 FLD (f_r3) = f_r3; 1998 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_jalr", "f_r3 0x%x", 'x', f_r3, (char *) 0)); 1999 2000 #undef FLD 2001 return idesc; 2002 } 2003 2004 extract_sfmt_l_bnf: 2005 { 2006 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2007 CGEN_INSN_WORD insn = entire_insn; 2008 #define FLD(f) abuf->fields.sfmt_l_j.f 2009 USI f_disp26; 2010 2011 f_disp26 = ((((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) * (4))) + (pc)); 2012 2013 /* Record the fields for the semantic handler. */ 2014 FLD (i_disp26) = f_disp26; 2015 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_bnf", "disp26 0x%x", 'x', f_disp26, (char *) 0)); 2016 2017 #undef FLD 2018 return idesc; 2019 } 2020 2021 extract_sfmt_l_trap: 2022 { 2023 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2024 #define FLD(f) abuf->fields.sfmt_empty.f 2025 2026 2027 /* Record the fields for the semantic handler. */ 2028 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_trap", (char *) 0)); 2029 2030 #undef FLD 2031 return idesc; 2032 } 2033 2034 extract_sfmt_l_msync: 2035 { 2036 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2037 #define FLD(f) abuf->fields.sfmt_empty.f 2038 2039 2040 /* Record the fields for the semantic handler. */ 2041 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_msync", (char *) 0)); 2042 2043 #undef FLD 2044 return idesc; 2045 } 2046 2047 extract_sfmt_l_nop_imm: 2048 { 2049 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2050 CGEN_INSN_WORD insn = entire_insn; 2051 #define FLD(f) abuf->fields.sfmt_l_mfspr.f 2052 UINT f_uimm16; 2053 2054 f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); 2055 2056 /* Record the fields for the semantic handler. */ 2057 FLD (f_uimm16) = f_uimm16; 2058 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_nop_imm", "f_uimm16 0x%x", 'x', f_uimm16, (char *) 0)); 2059 2060 #undef FLD 2061 return idesc; 2062 } 2063 2064 extract_sfmt_l_movhi: 2065 { 2066 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2067 CGEN_INSN_WORD insn = entire_insn; 2068 #define FLD(f) abuf->fields.sfmt_l_mfspr.f 2069 UINT f_r1; 2070 UINT f_uimm16; 2071 2072 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2073 f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); 2074 2075 /* Record the fields for the semantic handler. */ 2076 FLD (f_uimm16) = f_uimm16; 2077 FLD (f_r1) = f_r1; 2078 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_movhi", "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2079 2080 #undef FLD 2081 return idesc; 2082 } 2083 2084 extract_sfmt_l_macrc: 2085 { 2086 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2087 CGEN_INSN_WORD insn = entire_insn; 2088 #define FLD(f) abuf->fields.sfmt_l_adrp.f 2089 UINT f_r1; 2090 2091 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2092 2093 /* Record the fields for the semantic handler. */ 2094 FLD (f_r1) = f_r1; 2095 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_macrc", "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2096 2097 #undef FLD 2098 return idesc; 2099 } 2100 2101 extract_sfmt_l_mfspr: 2102 { 2103 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2104 CGEN_INSN_WORD insn = entire_insn; 2105 #define FLD(f) abuf->fields.sfmt_l_mfspr.f 2106 UINT f_r1; 2107 UINT f_r2; 2108 UINT f_uimm16; 2109 2110 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2111 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2112 f_uimm16 = EXTRACT_LSB0_UINT (insn, 32, 15, 16); 2113 2114 /* Record the fields for the semantic handler. */ 2115 FLD (f_r2) = f_r2; 2116 FLD (f_uimm16) = f_uimm16; 2117 FLD (f_r1) = f_r1; 2118 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mfspr", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2119 2120 #undef FLD 2121 return idesc; 2122 } 2123 2124 extract_sfmt_l_mtspr: 2125 { 2126 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2127 CGEN_INSN_WORD insn = entire_insn; 2128 #define FLD(f) abuf->fields.sfmt_l_mtspr.f 2129 UINT f_imm16_25_5; 2130 UINT f_r2; 2131 UINT f_r3; 2132 UINT f_imm16_10_11; 2133 UINT f_uimm16_split; 2134 2135 f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2136 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2137 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2138 f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); 2139 f_uimm16_split = ((UHI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11)))); 2140 2141 /* Record the fields for the semantic handler. */ 2142 FLD (f_r2) = f_r2; 2143 FLD (f_r3) = f_r3; 2144 FLD (f_uimm16_split) = f_uimm16_split; 2145 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mtspr", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_uimm16_split 0x%x", 'x', f_uimm16_split, (char *) 0)); 2146 2147 #undef FLD 2148 return idesc; 2149 } 2150 2151 extract_sfmt_l_lwz: 2152 { 2153 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2154 CGEN_INSN_WORD insn = entire_insn; 2155 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2156 UINT f_r1; 2157 UINT f_r2; 2158 INT f_simm16; 2159 2160 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2161 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2162 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2163 2164 /* Record the fields for the semantic handler. */ 2165 FLD (f_r2) = f_r2; 2166 FLD (f_simm16) = f_simm16; 2167 FLD (f_r1) = f_r1; 2168 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lwz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2169 2170 #undef FLD 2171 return idesc; 2172 } 2173 2174 extract_sfmt_l_lws: 2175 { 2176 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2177 CGEN_INSN_WORD insn = entire_insn; 2178 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2179 UINT f_r1; 2180 UINT f_r2; 2181 INT f_simm16; 2182 2183 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2184 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2185 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2186 2187 /* Record the fields for the semantic handler. */ 2188 FLD (f_r2) = f_r2; 2189 FLD (f_simm16) = f_simm16; 2190 FLD (f_r1) = f_r1; 2191 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lws", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2192 2193 #undef FLD 2194 return idesc; 2195 } 2196 2197 extract_sfmt_l_lwa: 2198 { 2199 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2200 CGEN_INSN_WORD insn = entire_insn; 2201 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2202 UINT f_r1; 2203 UINT f_r2; 2204 INT f_simm16; 2205 2206 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2207 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2208 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2209 2210 /* Record the fields for the semantic handler. */ 2211 FLD (f_r2) = f_r2; 2212 FLD (f_simm16) = f_simm16; 2213 FLD (f_r1) = f_r1; 2214 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lwa", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2215 2216 #undef FLD 2217 return idesc; 2218 } 2219 2220 extract_sfmt_l_lbz: 2221 { 2222 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2223 CGEN_INSN_WORD insn = entire_insn; 2224 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2225 UINT f_r1; 2226 UINT f_r2; 2227 INT f_simm16; 2228 2229 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2230 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2231 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2232 2233 /* Record the fields for the semantic handler. */ 2234 FLD (f_r2) = f_r2; 2235 FLD (f_simm16) = f_simm16; 2236 FLD (f_r1) = f_r1; 2237 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lbz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2238 2239 #undef FLD 2240 return idesc; 2241 } 2242 2243 extract_sfmt_l_lbs: 2244 { 2245 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2246 CGEN_INSN_WORD insn = entire_insn; 2247 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2248 UINT f_r1; 2249 UINT f_r2; 2250 INT f_simm16; 2251 2252 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2253 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2254 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2255 2256 /* Record the fields for the semantic handler. */ 2257 FLD (f_r2) = f_r2; 2258 FLD (f_simm16) = f_simm16; 2259 FLD (f_r1) = f_r1; 2260 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lbs", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2261 2262 #undef FLD 2263 return idesc; 2264 } 2265 2266 extract_sfmt_l_lhz: 2267 { 2268 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2269 CGEN_INSN_WORD insn = entire_insn; 2270 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2271 UINT f_r1; 2272 UINT f_r2; 2273 INT f_simm16; 2274 2275 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2276 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2277 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2278 2279 /* Record the fields for the semantic handler. */ 2280 FLD (f_r2) = f_r2; 2281 FLD (f_simm16) = f_simm16; 2282 FLD (f_r1) = f_r1; 2283 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lhz", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2284 2285 #undef FLD 2286 return idesc; 2287 } 2288 2289 extract_sfmt_l_lhs: 2290 { 2291 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2292 CGEN_INSN_WORD insn = entire_insn; 2293 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2294 UINT f_r1; 2295 UINT f_r2; 2296 INT f_simm16; 2297 2298 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2299 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2300 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2301 2302 /* Record the fields for the semantic handler. */ 2303 FLD (f_r2) = f_r2; 2304 FLD (f_simm16) = f_simm16; 2305 FLD (f_r1) = f_r1; 2306 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_lhs", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2307 2308 #undef FLD 2309 return idesc; 2310 } 2311 2312 extract_sfmt_l_sw: 2313 { 2314 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2315 CGEN_INSN_WORD insn = entire_insn; 2316 #define FLD(f) abuf->fields.sfmt_l_sw.f 2317 UINT f_imm16_25_5; 2318 UINT f_r2; 2319 UINT f_r3; 2320 UINT f_imm16_10_11; 2321 INT f_simm16_split; 2322 2323 f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2324 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2325 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2326 f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); 2327 f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11)))); 2328 2329 /* Record the fields for the semantic handler. */ 2330 FLD (f_r2) = f_r2; 2331 FLD (f_r3) = f_r3; 2332 FLD (f_simm16_split) = f_simm16_split; 2333 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sw", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0)); 2334 2335 #undef FLD 2336 return idesc; 2337 } 2338 2339 extract_sfmt_l_sb: 2340 { 2341 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2342 CGEN_INSN_WORD insn = entire_insn; 2343 #define FLD(f) abuf->fields.sfmt_l_sw.f 2344 UINT f_imm16_25_5; 2345 UINT f_r2; 2346 UINT f_r3; 2347 UINT f_imm16_10_11; 2348 INT f_simm16_split; 2349 2350 f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2351 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2352 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2353 f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); 2354 f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11)))); 2355 2356 /* Record the fields for the semantic handler. */ 2357 FLD (f_r2) = f_r2; 2358 FLD (f_r3) = f_r3; 2359 FLD (f_simm16_split) = f_simm16_split; 2360 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sb", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0)); 2361 2362 #undef FLD 2363 return idesc; 2364 } 2365 2366 extract_sfmt_l_sh: 2367 { 2368 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2369 CGEN_INSN_WORD insn = entire_insn; 2370 #define FLD(f) abuf->fields.sfmt_l_sw.f 2371 UINT f_imm16_25_5; 2372 UINT f_r2; 2373 UINT f_r3; 2374 UINT f_imm16_10_11; 2375 INT f_simm16_split; 2376 2377 f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2378 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2379 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2380 f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); 2381 f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11)))); 2382 2383 /* Record the fields for the semantic handler. */ 2384 FLD (f_r2) = f_r2; 2385 FLD (f_r3) = f_r3; 2386 FLD (f_simm16_split) = f_simm16_split; 2387 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sh", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0)); 2388 2389 #undef FLD 2390 return idesc; 2391 } 2392 2393 extract_sfmt_l_swa: 2394 { 2395 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2396 CGEN_INSN_WORD insn = entire_insn; 2397 #define FLD(f) abuf->fields.sfmt_l_sw.f 2398 UINT f_imm16_25_5; 2399 UINT f_r2; 2400 UINT f_r3; 2401 UINT f_imm16_10_11; 2402 INT f_simm16_split; 2403 2404 f_imm16_25_5 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2405 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2406 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2407 f_imm16_10_11 = EXTRACT_LSB0_UINT (insn, 32, 10, 11); 2408 f_simm16_split = ((HI) (UINT) (((((f_imm16_25_5) << (11))) | (f_imm16_10_11)))); 2409 2410 /* Record the fields for the semantic handler. */ 2411 FLD (f_r2) = f_r2; 2412 FLD (f_r3) = f_r3; 2413 FLD (f_simm16_split) = f_simm16_split; 2414 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_swa", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_simm16_split 0x%x", 'x', f_simm16_split, (char *) 0)); 2415 2416 #undef FLD 2417 return idesc; 2418 } 2419 2420 extract_sfmt_l_sll: 2421 { 2422 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2423 CGEN_INSN_WORD insn = entire_insn; 2424 #define FLD(f) abuf->fields.sfmt_l_sll.f 2425 UINT f_r1; 2426 UINT f_r2; 2427 UINT f_r3; 2428 2429 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2430 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2431 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2432 2433 /* Record the fields for the semantic handler. */ 2434 FLD (f_r2) = f_r2; 2435 FLD (f_r3) = f_r3; 2436 FLD (f_r1) = f_r1; 2437 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sll", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2438 2439 #undef FLD 2440 return idesc; 2441 } 2442 2443 extract_sfmt_l_slli: 2444 { 2445 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2446 CGEN_INSN_WORD insn = entire_insn; 2447 #define FLD(f) abuf->fields.sfmt_l_slli.f 2448 UINT f_r1; 2449 UINT f_r2; 2450 UINT f_uimm6; 2451 2452 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2453 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2454 f_uimm6 = EXTRACT_LSB0_UINT (insn, 32, 5, 6); 2455 2456 /* Record the fields for the semantic handler. */ 2457 FLD (f_r2) = f_r2; 2458 FLD (f_uimm6) = f_uimm6; 2459 FLD (f_r1) = f_r1; 2460 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_slli", "f_r2 0x%x", 'x', f_r2, "f_uimm6 0x%x", 'x', f_uimm6, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2461 2462 #undef FLD 2463 return idesc; 2464 } 2465 2466 extract_sfmt_l_and: 2467 { 2468 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2469 CGEN_INSN_WORD insn = entire_insn; 2470 #define FLD(f) abuf->fields.sfmt_l_sll.f 2471 UINT f_r1; 2472 UINT f_r2; 2473 UINT f_r3; 2474 2475 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2476 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2477 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2478 2479 /* Record the fields for the semantic handler. */ 2480 FLD (f_r2) = f_r2; 2481 FLD (f_r3) = f_r3; 2482 FLD (f_r1) = f_r1; 2483 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_and", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2484 2485 #undef FLD 2486 return idesc; 2487 } 2488 2489 extract_sfmt_l_add: 2490 { 2491 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2492 CGEN_INSN_WORD insn = entire_insn; 2493 #define FLD(f) abuf->fields.sfmt_l_sll.f 2494 UINT f_r1; 2495 UINT f_r2; 2496 UINT f_r3; 2497 2498 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2499 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2500 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2501 2502 /* Record the fields for the semantic handler. */ 2503 FLD (f_r2) = f_r2; 2504 FLD (f_r3) = f_r3; 2505 FLD (f_r1) = f_r1; 2506 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_add", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2507 2508 #undef FLD 2509 return idesc; 2510 } 2511 2512 extract_sfmt_l_addc: 2513 { 2514 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2515 CGEN_INSN_WORD insn = entire_insn; 2516 #define FLD(f) abuf->fields.sfmt_l_sll.f 2517 UINT f_r1; 2518 UINT f_r2; 2519 UINT f_r3; 2520 2521 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2522 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2523 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2524 2525 /* Record the fields for the semantic handler. */ 2526 FLD (f_r2) = f_r2; 2527 FLD (f_r3) = f_r3; 2528 FLD (f_r1) = f_r1; 2529 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addc", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2530 2531 #undef FLD 2532 return idesc; 2533 } 2534 2535 extract_sfmt_l_mul: 2536 { 2537 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2538 CGEN_INSN_WORD insn = entire_insn; 2539 #define FLD(f) abuf->fields.sfmt_l_sll.f 2540 UINT f_r1; 2541 UINT f_r2; 2542 UINT f_r3; 2543 2544 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2545 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2546 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2547 2548 /* Record the fields for the semantic handler. */ 2549 FLD (f_r2) = f_r2; 2550 FLD (f_r3) = f_r3; 2551 FLD (f_r1) = f_r1; 2552 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mul", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2553 2554 #undef FLD 2555 return idesc; 2556 } 2557 2558 extract_sfmt_l_muld: 2559 { 2560 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2561 CGEN_INSN_WORD insn = entire_insn; 2562 #define FLD(f) abuf->fields.sfmt_l_sll.f 2563 UINT f_r2; 2564 UINT f_r3; 2565 2566 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2567 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2568 2569 /* Record the fields for the semantic handler. */ 2570 FLD (f_r2) = f_r2; 2571 FLD (f_r3) = f_r3; 2572 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_muld", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0)); 2573 2574 #undef FLD 2575 return idesc; 2576 } 2577 2578 extract_sfmt_l_mulu: 2579 { 2580 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2581 CGEN_INSN_WORD insn = entire_insn; 2582 #define FLD(f) abuf->fields.sfmt_l_sll.f 2583 UINT f_r1; 2584 UINT f_r2; 2585 UINT f_r3; 2586 2587 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2588 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2589 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2590 2591 /* Record the fields for the semantic handler. */ 2592 FLD (f_r2) = f_r2; 2593 FLD (f_r3) = f_r3; 2594 FLD (f_r1) = f_r1; 2595 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mulu", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2596 2597 #undef FLD 2598 return idesc; 2599 } 2600 2601 extract_sfmt_l_div: 2602 { 2603 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2604 CGEN_INSN_WORD insn = entire_insn; 2605 #define FLD(f) abuf->fields.sfmt_l_sll.f 2606 UINT f_r1; 2607 UINT f_r2; 2608 UINT f_r3; 2609 2610 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2611 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2612 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2613 2614 /* Record the fields for the semantic handler. */ 2615 FLD (f_r2) = f_r2; 2616 FLD (f_r3) = f_r3; 2617 FLD (f_r1) = f_r1; 2618 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_div", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2619 2620 #undef FLD 2621 return idesc; 2622 } 2623 2624 extract_sfmt_l_divu: 2625 { 2626 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2627 CGEN_INSN_WORD insn = entire_insn; 2628 #define FLD(f) abuf->fields.sfmt_l_sll.f 2629 UINT f_r1; 2630 UINT f_r2; 2631 UINT f_r3; 2632 2633 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2634 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2635 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2636 2637 /* Record the fields for the semantic handler. */ 2638 FLD (f_r2) = f_r2; 2639 FLD (f_r3) = f_r3; 2640 FLD (f_r1) = f_r1; 2641 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_divu", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2642 2643 #undef FLD 2644 return idesc; 2645 } 2646 2647 extract_sfmt_l_ff1: 2648 { 2649 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2650 CGEN_INSN_WORD insn = entire_insn; 2651 #define FLD(f) abuf->fields.sfmt_l_slli.f 2652 UINT f_r1; 2653 UINT f_r2; 2654 2655 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2656 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2657 2658 /* Record the fields for the semantic handler. */ 2659 FLD (f_r2) = f_r2; 2660 FLD (f_r1) = f_r1; 2661 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_ff1", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2662 2663 #undef FLD 2664 return idesc; 2665 } 2666 2667 extract_sfmt_l_xori: 2668 { 2669 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2670 CGEN_INSN_WORD insn = entire_insn; 2671 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2672 UINT f_r1; 2673 UINT f_r2; 2674 INT f_simm16; 2675 2676 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2677 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2678 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2679 2680 /* Record the fields for the semantic handler. */ 2681 FLD (f_r2) = f_r2; 2682 FLD (f_simm16) = f_simm16; 2683 FLD (f_r1) = f_r1; 2684 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_xori", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2685 2686 #undef FLD 2687 return idesc; 2688 } 2689 2690 extract_sfmt_l_addi: 2691 { 2692 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2693 CGEN_INSN_WORD insn = entire_insn; 2694 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2695 UINT f_r1; 2696 UINT f_r2; 2697 INT f_simm16; 2698 2699 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2700 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2701 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2702 2703 /* Record the fields for the semantic handler. */ 2704 FLD (f_r2) = f_r2; 2705 FLD (f_simm16) = f_simm16; 2706 FLD (f_r1) = f_r1; 2707 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addi", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2708 2709 #undef FLD 2710 return idesc; 2711 } 2712 2713 extract_sfmt_l_addic: 2714 { 2715 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2716 CGEN_INSN_WORD insn = entire_insn; 2717 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2718 UINT f_r1; 2719 UINT f_r2; 2720 INT f_simm16; 2721 2722 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2723 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2724 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2725 2726 /* Record the fields for the semantic handler. */ 2727 FLD (f_r2) = f_r2; 2728 FLD (f_simm16) = f_simm16; 2729 FLD (f_r1) = f_r1; 2730 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_addic", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2731 2732 #undef FLD 2733 return idesc; 2734 } 2735 2736 extract_sfmt_l_muli: 2737 { 2738 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2739 CGEN_INSN_WORD insn = entire_insn; 2740 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2741 UINT f_r1; 2742 UINT f_r2; 2743 INT f_simm16; 2744 2745 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2746 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2747 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2748 2749 /* Record the fields for the semantic handler. */ 2750 FLD (f_r2) = f_r2; 2751 FLD (f_simm16) = f_simm16; 2752 FLD (f_r1) = f_r1; 2753 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_muli", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2754 2755 #undef FLD 2756 return idesc; 2757 } 2758 2759 extract_sfmt_l_exths: 2760 { 2761 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2762 CGEN_INSN_WORD insn = entire_insn; 2763 #define FLD(f) abuf->fields.sfmt_l_slli.f 2764 UINT f_r1; 2765 UINT f_r2; 2766 2767 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2768 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2769 2770 /* Record the fields for the semantic handler. */ 2771 FLD (f_r2) = f_r2; 2772 FLD (f_r1) = f_r1; 2773 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_exths", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2774 2775 #undef FLD 2776 return idesc; 2777 } 2778 2779 extract_sfmt_l_cmov: 2780 { 2781 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2782 CGEN_INSN_WORD insn = entire_insn; 2783 #define FLD(f) abuf->fields.sfmt_l_sll.f 2784 UINT f_r1; 2785 UINT f_r2; 2786 UINT f_r3; 2787 2788 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2789 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2790 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2791 2792 /* Record the fields for the semantic handler. */ 2793 FLD (f_r2) = f_r2; 2794 FLD (f_r3) = f_r3; 2795 FLD (f_r1) = f_r1; 2796 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_cmov", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2797 2798 #undef FLD 2799 return idesc; 2800 } 2801 2802 extract_sfmt_l_sfgts: 2803 { 2804 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2805 CGEN_INSN_WORD insn = entire_insn; 2806 #define FLD(f) abuf->fields.sfmt_l_sll.f 2807 UINT f_r2; 2808 UINT f_r3; 2809 2810 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2811 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2812 2813 /* Record the fields for the semantic handler. */ 2814 FLD (f_r2) = f_r2; 2815 FLD (f_r3) = f_r3; 2816 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sfgts", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0)); 2817 2818 #undef FLD 2819 return idesc; 2820 } 2821 2822 extract_sfmt_l_sfgtsi: 2823 { 2824 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2825 CGEN_INSN_WORD insn = entire_insn; 2826 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2827 UINT f_r2; 2828 INT f_simm16; 2829 2830 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2831 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2832 2833 /* Record the fields for the semantic handler. */ 2834 FLD (f_r2) = f_r2; 2835 FLD (f_simm16) = f_simm16; 2836 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_sfgtsi", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, (char *) 0)); 2837 2838 #undef FLD 2839 return idesc; 2840 } 2841 2842 extract_sfmt_l_mac: 2843 { 2844 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2845 CGEN_INSN_WORD insn = entire_insn; 2846 #define FLD(f) abuf->fields.sfmt_l_sll.f 2847 UINT f_r2; 2848 UINT f_r3; 2849 2850 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2851 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2852 2853 /* Record the fields for the semantic handler. */ 2854 FLD (f_r2) = f_r2; 2855 FLD (f_r3) = f_r3; 2856 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_mac", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0)); 2857 2858 #undef FLD 2859 return idesc; 2860 } 2861 2862 extract_sfmt_l_maci: 2863 { 2864 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2865 CGEN_INSN_WORD insn = entire_insn; 2866 #define FLD(f) abuf->fields.sfmt_l_lwz.f 2867 UINT f_r2; 2868 INT f_simm16; 2869 2870 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2871 f_simm16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); 2872 2873 /* Record the fields for the semantic handler. */ 2874 FLD (f_r2) = f_r2; 2875 FLD (f_simm16) = f_simm16; 2876 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_maci", "f_r2 0x%x", 'x', f_r2, "f_simm16 0x%x", 'x', f_simm16, (char *) 0)); 2877 2878 #undef FLD 2879 return idesc; 2880 } 2881 2882 extract_sfmt_l_macu: 2883 { 2884 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2885 CGEN_INSN_WORD insn = entire_insn; 2886 #define FLD(f) abuf->fields.sfmt_l_sll.f 2887 UINT f_r2; 2888 UINT f_r3; 2889 2890 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2891 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2892 2893 /* Record the fields for the semantic handler. */ 2894 FLD (f_r2) = f_r2; 2895 FLD (f_r3) = f_r3; 2896 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_l_macu", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0)); 2897 2898 #undef FLD 2899 return idesc; 2900 } 2901 2902 extract_sfmt_lf_add_s: 2903 { 2904 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2905 CGEN_INSN_WORD insn = entire_insn; 2906 #define FLD(f) abuf->fields.sfmt_l_sll.f 2907 UINT f_r1; 2908 UINT f_r2; 2909 UINT f_r3; 2910 2911 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2912 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2913 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2914 2915 /* Record the fields for the semantic handler. */ 2916 FLD (f_r2) = f_r2; 2917 FLD (f_r3) = f_r3; 2918 FLD (f_r1) = f_r1; 2919 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_add_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2920 2921 #undef FLD 2922 return idesc; 2923 } 2924 2925 extract_sfmt_lf_add_d32: 2926 { 2927 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2928 CGEN_INSN_WORD insn = entire_insn; 2929 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f 2930 UINT f_r1; 2931 UINT f_r2; 2932 UINT f_r3; 2933 UINT f_rdoff_10_1; 2934 UINT f_raoff_9_1; 2935 UINT f_rboff_8_1; 2936 SI f_rdd32; 2937 SI f_rad32; 2938 SI f_rbd32; 2939 2940 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2941 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2942 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 2943 f_rdoff_10_1 = EXTRACT_LSB0_UINT (insn, 32, 10, 1); 2944 f_raoff_9_1 = EXTRACT_LSB0_UINT (insn, 32, 9, 1); 2945 f_rboff_8_1 = EXTRACT_LSB0_UINT (insn, 32, 8, 1); 2946 f_rdd32 = ((f_r1) | (((f_rdoff_10_1) << (5)))); 2947 f_rad32 = ((f_r2) | (((f_raoff_9_1) << (5)))); 2948 f_rbd32 = ((f_r3) | (((f_rboff_8_1) << (5)))); 2949 2950 /* Record the fields for the semantic handler. */ 2951 FLD (f_rad32) = f_rad32; 2952 FLD (f_rbd32) = f_rbd32; 2953 FLD (f_rdd32) = f_rdd32; 2954 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_add_d32", "f_rad32 0x%x", 'x', f_rad32, "f_rbd32 0x%x", 'x', f_rbd32, "f_rdd32 0x%x", 'x', f_rdd32, (char *) 0)); 2955 2956 #undef FLD 2957 return idesc; 2958 } 2959 2960 extract_sfmt_lf_itof_s: 2961 { 2962 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2963 CGEN_INSN_WORD insn = entire_insn; 2964 #define FLD(f) abuf->fields.sfmt_l_slli.f 2965 UINT f_r1; 2966 UINT f_r2; 2967 2968 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2969 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2970 2971 /* Record the fields for the semantic handler. */ 2972 FLD (f_r2) = f_r2; 2973 FLD (f_r1) = f_r1; 2974 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_itof_s", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 2975 2976 #undef FLD 2977 return idesc; 2978 } 2979 2980 extract_sfmt_lf_itof_d32: 2981 { 2982 const IDESC *idesc = &or1k32bf_insn_data[itype]; 2983 CGEN_INSN_WORD insn = entire_insn; 2984 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f 2985 UINT f_r1; 2986 UINT f_r2; 2987 UINT f_rdoff_10_1; 2988 UINT f_raoff_9_1; 2989 SI f_rdd32; 2990 SI f_rad32; 2991 2992 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 2993 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 2994 f_rdoff_10_1 = EXTRACT_LSB0_UINT (insn, 32, 10, 1); 2995 f_raoff_9_1 = EXTRACT_LSB0_UINT (insn, 32, 9, 1); 2996 f_rdd32 = ((f_r1) | (((f_rdoff_10_1) << (5)))); 2997 f_rad32 = ((f_r2) | (((f_raoff_9_1) << (5)))); 2998 2999 /* Record the fields for the semantic handler. */ 3000 FLD (f_rad32) = f_rad32; 3001 FLD (f_rdd32) = f_rdd32; 3002 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_itof_d32", "f_rad32 0x%x", 'x', f_rad32, "f_rdd32 0x%x", 'x', f_rdd32, (char *) 0)); 3003 3004 #undef FLD 3005 return idesc; 3006 } 3007 3008 extract_sfmt_lf_ftoi_s: 3009 { 3010 const IDESC *idesc = &or1k32bf_insn_data[itype]; 3011 CGEN_INSN_WORD insn = entire_insn; 3012 #define FLD(f) abuf->fields.sfmt_l_slli.f 3013 UINT f_r1; 3014 UINT f_r2; 3015 3016 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 3017 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 3018 3019 /* Record the fields for the semantic handler. */ 3020 FLD (f_r2) = f_r2; 3021 FLD (f_r1) = f_r1; 3022 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_ftoi_s", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 3023 3024 #undef FLD 3025 return idesc; 3026 } 3027 3028 extract_sfmt_lf_ftoi_d32: 3029 { 3030 const IDESC *idesc = &or1k32bf_insn_data[itype]; 3031 CGEN_INSN_WORD insn = entire_insn; 3032 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f 3033 UINT f_r1; 3034 UINT f_r2; 3035 UINT f_rdoff_10_1; 3036 UINT f_raoff_9_1; 3037 SI f_rdd32; 3038 SI f_rad32; 3039 3040 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 3041 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 3042 f_rdoff_10_1 = EXTRACT_LSB0_UINT (insn, 32, 10, 1); 3043 f_raoff_9_1 = EXTRACT_LSB0_UINT (insn, 32, 9, 1); 3044 f_rdd32 = ((f_r1) | (((f_rdoff_10_1) << (5)))); 3045 f_rad32 = ((f_r2) | (((f_raoff_9_1) << (5)))); 3046 3047 /* Record the fields for the semantic handler. */ 3048 FLD (f_rad32) = f_rad32; 3049 FLD (f_rdd32) = f_rdd32; 3050 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_ftoi_d32", "f_rad32 0x%x", 'x', f_rad32, "f_rdd32 0x%x", 'x', f_rdd32, (char *) 0)); 3051 3052 #undef FLD 3053 return idesc; 3054 } 3055 3056 extract_sfmt_lf_sfeq_s: 3057 { 3058 const IDESC *idesc = &or1k32bf_insn_data[itype]; 3059 CGEN_INSN_WORD insn = entire_insn; 3060 #define FLD(f) abuf->fields.sfmt_l_sll.f 3061 UINT f_r2; 3062 UINT f_r3; 3063 3064 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 3065 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 3066 3067 /* Record the fields for the semantic handler. */ 3068 FLD (f_r2) = f_r2; 3069 FLD (f_r3) = f_r3; 3070 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_sfeq_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, (char *) 0)); 3071 3072 #undef FLD 3073 return idesc; 3074 } 3075 3076 extract_sfmt_lf_sfeq_d32: 3077 { 3078 const IDESC *idesc = &or1k32bf_insn_data[itype]; 3079 CGEN_INSN_WORD insn = entire_insn; 3080 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f 3081 UINT f_r2; 3082 UINT f_r3; 3083 UINT f_raoff_9_1; 3084 UINT f_rboff_8_1; 3085 SI f_rad32; 3086 SI f_rbd32; 3087 3088 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 3089 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 3090 f_raoff_9_1 = EXTRACT_LSB0_UINT (insn, 32, 9, 1); 3091 f_rboff_8_1 = EXTRACT_LSB0_UINT (insn, 32, 8, 1); 3092 f_rad32 = ((f_r2) | (((f_raoff_9_1) << (5)))); 3093 f_rbd32 = ((f_r3) | (((f_rboff_8_1) << (5)))); 3094 3095 /* Record the fields for the semantic handler. */ 3096 FLD (f_rad32) = f_rad32; 3097 FLD (f_rbd32) = f_rbd32; 3098 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_sfeq_d32", "f_rad32 0x%x", 'x', f_rad32, "f_rbd32 0x%x", 'x', f_rbd32, (char *) 0)); 3099 3100 #undef FLD 3101 return idesc; 3102 } 3103 3104 extract_sfmt_lf_madd_s: 3105 { 3106 const IDESC *idesc = &or1k32bf_insn_data[itype]; 3107 CGEN_INSN_WORD insn = entire_insn; 3108 #define FLD(f) abuf->fields.sfmt_l_sll.f 3109 UINT f_r1; 3110 UINT f_r2; 3111 UINT f_r3; 3112 3113 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 3114 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 3115 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 3116 3117 /* Record the fields for the semantic handler. */ 3118 FLD (f_r2) = f_r2; 3119 FLD (f_r3) = f_r3; 3120 FLD (f_r1) = f_r1; 3121 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_madd_s", "f_r2 0x%x", 'x', f_r2, "f_r3 0x%x", 'x', f_r3, "f_r1 0x%x", 'x', f_r1, (char *) 0)); 3122 3123 #undef FLD 3124 return idesc; 3125 } 3126 3127 extract_sfmt_lf_madd_d32: 3128 { 3129 const IDESC *idesc = &or1k32bf_insn_data[itype]; 3130 CGEN_INSN_WORD insn = entire_insn; 3131 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f 3132 UINT f_r1; 3133 UINT f_r2; 3134 UINT f_r3; 3135 UINT f_rdoff_10_1; 3136 UINT f_raoff_9_1; 3137 UINT f_rboff_8_1; 3138 SI f_rdd32; 3139 SI f_rad32; 3140 SI f_rbd32; 3141 3142 f_r1 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); 3143 f_r2 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); 3144 f_r3 = EXTRACT_LSB0_UINT (insn, 32, 15, 5); 3145 f_rdoff_10_1 = EXTRACT_LSB0_UINT (insn, 32, 10, 1); 3146 f_raoff_9_1 = EXTRACT_LSB0_UINT (insn, 32, 9, 1); 3147 f_rboff_8_1 = EXTRACT_LSB0_UINT (insn, 32, 8, 1); 3148 f_rdd32 = ((f_r1) | (((f_rdoff_10_1) << (5)))); 3149 f_rad32 = ((f_r2) | (((f_raoff_9_1) << (5)))); 3150 f_rbd32 = ((f_r3) | (((f_rboff_8_1) << (5)))); 3151 3152 /* Record the fields for the semantic handler. */ 3153 FLD (f_rad32) = f_rad32; 3154 FLD (f_rbd32) = f_rbd32; 3155 FLD (f_rdd32) = f_rdd32; 3156 CGEN_TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lf_madd_d32", "f_rad32 0x%x", 'x', f_rad32, "f_rbd32 0x%x", 'x', f_rbd32, "f_rdd32 0x%x", 'x', f_rdd32, (char *) 0)); 3157 3158 #undef FLD 3159 return idesc; 3160 } 3161 3162 } 3163